Back to home page

OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2014 Carlo Caione
0004  * Carlo Caione <carlo@caione.org>
0005  */
0006 
0007 #define MESON_AO_UART_WFIFO     0x0
0008 #define MESON_AO_UART_STATUS        0xc
0009 
0010 #define MESON_AO_UART_TX_FIFO_EMPTY (1 << 22)
0011 #define MESON_AO_UART_TX_FIFO_FULL  (1 << 21)
0012 
0013     .macro  addruart, rp, rv, tmp
0014     ldr \rp, =(CONFIG_DEBUG_UART_PHYS)      @ physical
0015     ldr \rv, =(CONFIG_DEBUG_UART_VIRT)      @ virtual
0016     .endm
0017 
0018     .macro  senduart,rd,rx
0019     str \rd, [\rx, #MESON_AO_UART_WFIFO]
0020     .endm
0021 
0022     .macro  busyuart,rd,rx
0023 1002:   ldr \rd, [\rx, #MESON_AO_UART_STATUS]
0024     tst \rd, #MESON_AO_UART_TX_FIFO_EMPTY
0025     beq 1002b
0026     .endm
0027 
0028     .macro  waituartcts,rd,rx
0029     .endm
0030 
0031     .macro  waituarttxrdy,rd,rx
0032 1001:   ldr \rd, [\rx, #MESON_AO_UART_STATUS]
0033     tst \rd, #MESON_AO_UART_TX_FIFO_FULL
0034     bne 1001b
0035     .endm