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0007
0008 #define UA0_STATUS 0x0742
0009 #define UA0_EMI_REC 0x0744
0010
0011 #define UA0_STATUS_TX_READY 0x40
0012
0013 #ifdef CONFIG_DEBUG_UART_PHYS
0014 .macro addruart, rp, rv, tmp
0015 ldr \rp, =CONFIG_DEBUG_UART_PHYS
0016 ldr \rv, =CONFIG_DEBUG_UART_VIRT
0017 .endm
0018 #endif
0019
0020 .macro senduart,rd,rx
0021 strb \rd, [\rx, #UA0_EMI_REC]
0022 .endm
0023
0024 .macro waituartcts,rd,rx
0025 .endm
0026
0027 .macro waituarttxrdy,rd,rx
0028 .endm
0029
0030 .macro busyuart,rd,rx
0031 1001: ldrb \rd, [\rx, #UA0_STATUS]
0032 tst \rd, #UA0_STATUS_TX_READY
0033 beq 1001b
0034 .endm