include/asm/vmlinux.lds.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #include <asm-generic/vmlinux.lds.h>
0003
0004 #ifdef CONFIG_HOTPLUG_CPU
0005 #define ARM_CPU_DISCARD(x)
0006 #define ARM_CPU_KEEP(x)     x
0007 #else
0008 #define ARM_CPU_DISCARD(x)  x
0009 #define ARM_CPU_KEEP(x)
0010 #endif
0011
0012 #if (defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)) || \
0013     defined(CONFIG_GENERIC_BUG) || defined(CONFIG_JUMP_LABEL)
0014 #define ARM_EXIT_KEEP(x)    x
0015 #define ARM_EXIT_DISCARD(x)
0016 #else
0017 #define ARM_EXIT_KEEP(x)
0018 #define ARM_EXIT_DISCARD(x) x
0019 #endif
0020
0021 #ifdef CONFIG_MMU
0022 #define ARM_MMU_KEEP(x)     x
0023 #define ARM_MMU_DISCARD(x)
0024 #else
0025 #define ARM_MMU_KEEP(x)
0026 #define ARM_MMU_DISCARD(x)  x
0027 #endif
0028
0029 /*
0030  * ld.lld does not support NOCROSSREFS:
0031  * https://github.com/ClangBuiltLinux/linux/issues/1609
0032  */
0033 #ifdef CONFIG_LD_IS_LLD
0034 #define NOCROSSREFS
0035 #endif
0036
0037 /* Set start/end symbol names to the LMA for the section */
0038 #define ARM_LMA(sym, section)                       \
0039     sym##_start = LOADADDR(section);                \
0040     sym##_end = LOADADDR(section) + SIZEOF(section)
0041
0042 #define PROC_INFO                           \
0043         . = ALIGN(4);                       \
0044         __proc_info_begin = .;                  \
0045         *(.proc.info.init)                  \
0046         __proc_info_end = .;
0047
0048 #define IDMAP_TEXT                          \
0049         ALIGN_FUNCTION();                   \
0050         __idmap_text_start = .;                 \
0051         *(.idmap.text)                      \
0052         __idmap_text_end = .;                   \
0053
0054 #define ARM_DISCARD                         \
0055         *(.ARM.exidx.exit.text)                 \
0056         *(.ARM.extab.exit.text)                 \
0057         *(.ARM.exidx.text.exit)                 \
0058         *(.ARM.extab.text.exit)                 \
0059         ARM_CPU_DISCARD(*(.ARM.exidx.cpuexit.text))     \
0060         ARM_CPU_DISCARD(*(.ARM.extab.cpuexit.text))     \
0061         ARM_EXIT_DISCARD(EXIT_TEXT)             \
0062         ARM_EXIT_DISCARD(EXIT_DATA)             \
0063         EXIT_CALL                       \
0064         ARM_MMU_DISCARD(*(.text.fixup))             \
0065         ARM_MMU_DISCARD(*(__ex_table))              \
0066         COMMON_DISCARDS
0067
0068 /*
0069  * Sections that should stay zero sized, which is safer to explicitly
0070  * check instead of blindly discarding.
0071  */
0072 #define ARM_ASSERTS                         \
0073     .plt : {                            \
0074         *(.iplt) *(.rel.iplt) *(.iplt) *(.igot.plt)     \
0075     }                               \
0076     ASSERT(SIZEOF(.plt) == 0,                   \
0077            "Unexpected run-time procedure linkages detected!")
0078
0079 #define ARM_DETAILS                         \
0080         ELF_DETAILS                     \
0081         .ARM.attributes 0 : { *(.ARM.attributes) }
0082
0083 #define ARM_STUBS_TEXT                          \
0084         *(.gnu.warning)                     \
0085         *(.glue_7)                      \
0086         *(.glue_7t)                     \
0087         *(.vfp11_veneer)                                        \
0088         *(.v4_bx)
0089
0090 #define ARM_TEXT                            \
0091         IDMAP_TEXT                      \
0092         __entry_text_start = .;                 \
0093         *(.entry.text)                      \
0094         __entry_text_end = .;                   \
0095         IRQENTRY_TEXT                       \
0096         SOFTIRQENTRY_TEXT                   \
0097         TEXT_TEXT                       \
0098         SCHED_TEXT                      \
0099         CPUIDLE_TEXT                        \
0100         LOCK_TEXT                       \
0101         KPROBES_TEXT                        \
0102         ARM_STUBS_TEXT                      \
0103         . = ALIGN(4);                       \
0104         *(.got)         /* Global offset table */   \
0105         ARM_CPU_KEEP(PROC_INFO)
0106
0107 /* Stack unwinding tables */
0108 #define ARM_UNWIND_SECTIONS                     \
0109     . = ALIGN(8);                           \
0110     .ARM.unwind_idx : {                     \
0111         __start_unwind_idx = .;                 \
0112         *(.ARM.exidx*)                      \
0113         __stop_unwind_idx = .;                  \
0114     }                               \
0115     .ARM.unwind_tab : {                     \
0116         __start_unwind_tab = .;                 \
0117         *(.ARM.extab*)                      \
0118         __stop_unwind_tab = .;                  \
0119     }
0120
0121 /*
0122  * The vectors and stubs are relocatable code, and the
0123  * only thing that matters is their relative offsets
0124  */
0125 #define ARM_VECTORS                         \
0126     __vectors_lma = .;                      \
0127     OVERLAY 0xffff0000 : NOCROSSREFS AT(__vectors_lma) {        \
0128         .vectors {                      \
0129             *(.vectors)                 \
0130         }                           \
0131         .vectors.bhb.loop8 {                    \
0132             *(.vectors.bhb.loop8)               \
0133         }                           \
0134         .vectors.bhb.bpiall {                   \
0135             *(.vectors.bhb.bpiall)              \
0136         }                           \
0137     }                               \
0138     ARM_LMA(__vectors, .vectors);                   \
0139     ARM_LMA(__vectors_bhb_loop8, .vectors.bhb.loop8);       \
0140     ARM_LMA(__vectors_bhb_bpiall, .vectors.bhb.bpiall);     \
0141     . = __vectors_lma + SIZEOF(.vectors) +              \
0142         SIZEOF(.vectors.bhb.loop8) +                \
0143         SIZEOF(.vectors.bhb.bpiall);                \
0144                                     \
0145     __stubs_lma = .;                        \
0146     .stubs ADDR(.vectors) + 0x1000 : AT(__stubs_lma) {      \
0147         *(.stubs)                       \
0148     }                               \
0149     ARM_LMA(__stubs, .stubs);                   \
0150     . = __stubs_lma + SIZEOF(.stubs);               \
0151                                     \
0152     PROVIDE(vector_fiq_offset = vector_fiq - ADDR(.vectors));
0153
0154 #define ARM_TCM                             \
0155     __itcm_start = ALIGN(4);                    \
0156     .text_itcm ITCM_OFFSET : AT(__itcm_start - LOAD_OFFSET) {   \
0157         __sitcm_text = .;                   \
0158         *(.tcm.text)                        \
0159         *(.tcm.rodata)                      \
0160         . = ALIGN(4);                       \
0161         __eitcm_text = .;                   \
0162     }                               \
0163     . = __itcm_start + SIZEOF(.text_itcm);              \
0164                                     \
0165     __dtcm_start = .;                       \
0166     .data_dtcm DTCM_OFFSET : AT(__dtcm_start - LOAD_OFFSET) {   \
0167         __sdtcm_data = .;                   \
0168         *(.tcm.data)                        \
0169         . = ALIGN(4);                       \
0170         __edtcm_data = .;                   \
0171     }                               \
0172     . = __dtcm_start + SIZEOF(.data_dtcm);