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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright (c) 2012 Linaro Limited.
0004  */
0005 
0006 #ifndef VIRT_H
0007 #define VIRT_H
0008 
0009 #include <asm/ptrace.h>
0010 
0011 /*
0012  * Flag indicating that the kernel was not entered in the same mode on every
0013  * CPU.  The zImage loader stashes this value in an SPSR, so we need an
0014  * architecturally defined flag bit here.
0015  */
0016 #define BOOT_CPU_MODE_MISMATCH  PSR_N_BIT
0017 
0018 #ifndef __ASSEMBLY__
0019 #include <asm/cacheflush.h>
0020 
0021 #ifdef CONFIG_ARM_VIRT_EXT
0022 /*
0023  * __boot_cpu_mode records what mode the primary CPU was booted in.
0024  * A correctly-implemented bootloader must start all CPUs in the same mode:
0025  * if it fails to do this, the flag BOOT_CPU_MODE_MISMATCH is set to indicate
0026  * that some CPU(s) were booted in a different mode.
0027  *
0028  * This allows the kernel to flag an error when the secondaries have come up.
0029  */
0030 extern int __boot_cpu_mode;
0031 
0032 static inline void sync_boot_mode(void)
0033 {
0034     /*
0035      * As secondaries write to __boot_cpu_mode with caches disabled, we
0036      * must flush the corresponding cache entries to ensure the visibility
0037      * of their writes.
0038      */
0039     sync_cache_r(&__boot_cpu_mode);
0040 }
0041 
0042 #else
0043 #define __boot_cpu_mode (SVC_MODE)
0044 #define sync_boot_mode()
0045 #endif
0046 
0047 #ifndef ZIMAGE
0048 void hyp_mode_check(void);
0049 
0050 /* Reports the availability of HYP mode */
0051 static inline bool is_hyp_mode_available(void)
0052 {
0053     return ((__boot_cpu_mode & MODE_MASK) == HYP_MODE &&
0054         !(__boot_cpu_mode & BOOT_CPU_MODE_MISMATCH));
0055 }
0056 
0057 /* Check if the bootloader has booted CPUs in different modes */
0058 static inline bool is_hyp_mode_mismatched(void)
0059 {
0060     return !!(__boot_cpu_mode & BOOT_CPU_MODE_MISMATCH);
0061 }
0062 
0063 static inline bool is_kernel_in_hyp_mode(void)
0064 {
0065     return false;
0066 }
0067 
0068 #endif
0069 
0070 #else
0071 
0072 /* Only assembly code should need those */
0073 
0074 #define HVC_SET_VECTORS 0
0075 #define HVC_SOFT_RESTART 1
0076 
0077 #endif /* __ASSEMBLY__ */
0078 
0079 #define HVC_STUB_ERR    0xbadca11
0080 
0081 #endif /* ! VIRT_H */