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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * arch/arm/include/asm/vfp.h
0004  *
0005  * VFP register definitions.
0006  * First, the standard VFP set.
0007  */
0008 
0009 #ifndef __ASM_VFP_H
0010 #define __ASM_VFP_H
0011 
0012 #ifndef CONFIG_AS_VFP_VMRS_FPINST
0013 #define FPSID           cr0
0014 #define FPSCR           cr1
0015 #define MVFR1           cr6
0016 #define MVFR0           cr7
0017 #define FPEXC           cr8
0018 #define FPINST          cr9
0019 #define FPINST2         cr10
0020 #endif
0021 
0022 /* FPSID bits */
0023 #define FPSID_IMPLEMENTER_BIT   (24)
0024 #define FPSID_IMPLEMENTER_MASK  (0xff << FPSID_IMPLEMENTER_BIT)
0025 #define FPSID_SOFTWARE      (1<<23)
0026 #define FPSID_FORMAT_BIT    (21)
0027 #define FPSID_FORMAT_MASK   (0x3  << FPSID_FORMAT_BIT)
0028 #define FPSID_NODOUBLE      (1<<20)
0029 #define FPSID_ARCH_BIT      (16)
0030 #define FPSID_ARCH_MASK     (0xF  << FPSID_ARCH_BIT)
0031 #define FPSID_CPUID_ARCH_MASK   (0x7F  << FPSID_ARCH_BIT)
0032 #define FPSID_PART_BIT      (8)
0033 #define FPSID_PART_MASK     (0xFF << FPSID_PART_BIT)
0034 #define FPSID_VARIANT_BIT   (4)
0035 #define FPSID_VARIANT_MASK  (0xF  << FPSID_VARIANT_BIT)
0036 #define FPSID_REV_BIT       (0)
0037 #define FPSID_REV_MASK      (0xF  << FPSID_REV_BIT)
0038 
0039 /* FPEXC bits */
0040 #define FPEXC_EX        (1 << 31)
0041 #define FPEXC_EN        (1 << 30)
0042 #define FPEXC_DEX       (1 << 29)
0043 #define FPEXC_FP2V      (1 << 28)
0044 #define FPEXC_VV        (1 << 27)
0045 #define FPEXC_TFV       (1 << 26)
0046 #define FPEXC_LENGTH_BIT    (8)
0047 #define FPEXC_LENGTH_MASK   (7 << FPEXC_LENGTH_BIT)
0048 #define FPEXC_IDF       (1 << 7)
0049 #define FPEXC_IXF       (1 << 4)
0050 #define FPEXC_UFF       (1 << 3)
0051 #define FPEXC_OFF       (1 << 2)
0052 #define FPEXC_DZF       (1 << 1)
0053 #define FPEXC_IOF       (1 << 0)
0054 #define FPEXC_TRAP_MASK     (FPEXC_IDF|FPEXC_IXF|FPEXC_UFF|FPEXC_OFF|FPEXC_DZF|FPEXC_IOF)
0055 
0056 /* FPSCR bits */
0057 #define FPSCR_DEFAULT_NAN   (1<<25)
0058 #define FPSCR_FLUSHTOZERO   (1<<24)
0059 #define FPSCR_ROUND_NEAREST (0<<22)
0060 #define FPSCR_ROUND_PLUSINF (1<<22)
0061 #define FPSCR_ROUND_MINUSINF    (2<<22)
0062 #define FPSCR_ROUND_TOZERO  (3<<22)
0063 #define FPSCR_RMODE_BIT     (22)
0064 #define FPSCR_RMODE_MASK    (3 << FPSCR_RMODE_BIT)
0065 #define FPSCR_STRIDE_BIT    (20)
0066 #define FPSCR_STRIDE_MASK   (3 << FPSCR_STRIDE_BIT)
0067 #define FPSCR_LENGTH_BIT    (16)
0068 #define FPSCR_LENGTH_MASK   (7 << FPSCR_LENGTH_BIT)
0069 #define FPSCR_IOE       (1<<8)
0070 #define FPSCR_DZE       (1<<9)
0071 #define FPSCR_OFE       (1<<10)
0072 #define FPSCR_UFE       (1<<11)
0073 #define FPSCR_IXE       (1<<12)
0074 #define FPSCR_IDE       (1<<15)
0075 #define FPSCR_IOC       (1<<0)
0076 #define FPSCR_DZC       (1<<1)
0077 #define FPSCR_OFC       (1<<2)
0078 #define FPSCR_UFC       (1<<3)
0079 #define FPSCR_IXC       (1<<4)
0080 #define FPSCR_IDC       (1<<7)
0081 
0082 /* MVFR0 bits */
0083 #define MVFR0_A_SIMD_BIT    (0)
0084 #define MVFR0_A_SIMD_MASK   (0xf << MVFR0_A_SIMD_BIT)
0085 #define MVFR0_SP_BIT        (4)
0086 #define MVFR0_SP_MASK       (0xf << MVFR0_SP_BIT)
0087 #define MVFR0_DP_BIT        (8)
0088 #define MVFR0_DP_MASK       (0xf << MVFR0_DP_BIT)
0089 
0090 /* Bit patterns for decoding the packaged operation descriptors */
0091 #define VFPOPDESC_LENGTH_BIT    (9)
0092 #define VFPOPDESC_LENGTH_MASK   (0x07 << VFPOPDESC_LENGTH_BIT)
0093 #define VFPOPDESC_UNUSED_BIT    (24)
0094 #define VFPOPDESC_UNUSED_MASK   (0xFF << VFPOPDESC_UNUSED_BIT)
0095 #define VFPOPDESC_OPDESC_MASK   (~(VFPOPDESC_LENGTH_MASK | VFPOPDESC_UNUSED_MASK))
0096 
0097 #ifndef __ASSEMBLY__
0098 void vfp_disable(void);
0099 #endif
0100 
0101 #endif /* __ASM_VFP_H */