include/asm/smp_scu.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __ASMARM_ARCH_SCU_H
0003 #define __ASMARM_ARCH_SCU_H
0004
0005 #define SCU_PM_NORMAL   0
0006 #define SCU_PM_DORMANT  2
0007 #define SCU_PM_POWEROFF 3
0008
0009 #ifndef __ASSEMBLER__
0010
0011 #include <linux/errno.h>
0012 #include <asm/cputype.h>
0013
0014 static inline bool scu_a9_has_base(void)
0015 {
0016     return read_cpuid_part() == ARM_CPU_PART_CORTEX_A9;
0017 }
0018
0019 static inline unsigned long scu_a9_get_base(void)
0020 {
0021     unsigned long pa;
0022
0023     asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (pa));
0024
0025     return pa;
0026 }
0027
0028 #ifdef CONFIG_HAVE_ARM_SCU
0029 unsigned int scu_get_core_count(void __iomem *);
0030 int scu_power_mode(void __iomem *, unsigned int);
0031 int scu_cpu_power_enable(void __iomem *, unsigned int);
0032 int scu_get_cpu_power_mode(void __iomem *scu_base, unsigned int logical_cpu);
0033 #else
0034 static inline unsigned int scu_get_core_count(void __iomem *scu_base)
0035 {
0036     return 0;
0037 }
0038 static inline int scu_power_mode(void __iomem *scu_base, unsigned int mode)
0039 {
0040     return -EINVAL;
0041 }
0042 static inline int scu_cpu_power_enable(void __iomem *scu_base,
0043                        unsigned int mode)
0044 {
0045     return -EINVAL;
0046 }
0047 static inline int scu_get_cpu_power_mode(void __iomem *scu_base,
0048                      unsigned int logical_cpu)
0049 {
0050     return -EINVAL;
0051 }
0052 #endif
0053
0054 #if defined(CONFIG_SMP) && defined(CONFIG_HAVE_ARM_SCU)
0055 void scu_enable(void __iomem *scu_base);
0056 #else
0057 static inline void scu_enable(void __iomem *scu_base) {}
0058 #endif
0059
0060 #endif
0061
0062 #endif