include/asm/smp.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *  arch/arm/include/asm/smp.h
0004  *
0005  *  Copyright (C) 2004-2005 ARM Ltd.
0006  */
0007 #ifndef __ASM_ARM_SMP_H
0008 #define __ASM_ARM_SMP_H
0009
0010 #include <linux/threads.h>
0011 #include <linux/cpumask.h>
0012 #include <linux/thread_info.h>
0013
0014 #ifndef CONFIG_SMP
0015 # error "<asm/smp.h> included in non-SMP build"
0016 #endif
0017
0018 #define raw_smp_processor_id() (current_thread_info()->cpu)
0019
0020 struct seq_file;
0021
0022 /*
0023  * generate IPI list text
0024  */
0025 extern void show_ipi_list(struct seq_file *, int);
0026
0027 /*
0028  * Called from C code, this handles an IPI.
0029  */
0030 void handle_IPI(int ipinr, struct pt_regs *regs);
0031
0032 /*
0033  * Setup the set of possible CPUs (via set_cpu_possible)
0034  */
0035 extern void smp_init_cpus(void);
0036
0037 /*
0038  * Register IPI interrupts with the arch SMP code
0039  */
0040 extern void set_smp_ipi_range(int ipi_base, int nr_ipi);
0041
0042 /*
0043  * Called from platform specific assembly code, this is the
0044  * secondary CPU entry point.
0045  */
0046 asmlinkage void secondary_start_kernel(struct task_struct *task);
0047
0048
0049 /*
0050  * Initial data for bringing up a secondary CPU.
0051  */
0052 struct secondary_data {
0053     union {
0054         struct mpu_rgn_info *mpu_rgn_info;
0055         u64 pgdir;
0056     };
0057     unsigned long swapper_pg_dir;
0058     void *stack;
0059     struct task_struct *task;
0060 };
0061 extern struct secondary_data secondary_data;
0062 extern void secondary_startup(void);
0063 extern void secondary_startup_arm(void);
0064
0065 extern int __cpu_disable(void);
0066
0067 extern void __cpu_die(unsigned int cpu);
0068
0069 extern void arch_send_call_function_single_ipi(int cpu);
0070 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
0071 extern void arch_send_wakeup_ipi_mask(const struct cpumask *mask);
0072
0073 extern int register_ipi_completion(struct completion *completion, int cpu);
0074
0075 struct smp_operations {
0076 #ifdef CONFIG_SMP
0077     /*
0078      * Setup the set of possible CPUs (via set_cpu_possible)
0079      */
0080     void (*smp_init_cpus)(void);
0081     /*
0082      * Initialize cpu_possible map, and enable coherency
0083      */
0084     void (*smp_prepare_cpus)(unsigned int max_cpus);
0085
0086     /*
0087      * Perform platform specific initialisation of the specified CPU.
0088      */
0089     void (*smp_secondary_init)(unsigned int cpu);
0090     /*
0091      * Boot a secondary CPU, and assign it the specified idle task.
0092      * This also gives us the initial stack to use for this CPU.
0093      */
0094     int  (*smp_boot_secondary)(unsigned int cpu, struct task_struct *idle);
0095 #ifdef CONFIG_HOTPLUG_CPU
0096     int  (*cpu_kill)(unsigned int cpu);
0097     void (*cpu_die)(unsigned int cpu);
0098     bool  (*cpu_can_disable)(unsigned int cpu);
0099     int  (*cpu_disable)(unsigned int cpu);
0100 #endif
0101 #endif
0102 };
0103
0104 struct of_cpu_method {
0105     const char *method;
0106     const struct smp_operations *ops;
0107 };
0108
0109 #define CPU_METHOD_OF_DECLARE(name, _method, _ops)          \
0110     static const struct of_cpu_method __cpu_method_of_table_##name  \
0111         __used __section("__cpu_method_of_table")       \
0112         = { .method = _method, .ops = _ops }
0113 /*
0114  * set platform specific SMP operations
0115  */
0116 extern void smp_set_ops(const struct smp_operations *);
0117
0118 #endif /* ifndef __ASM_ARM_SMP_H */