0001
0002 #ifndef __ARM_MPU_H
0003 #define __ARM_MPU_H
0004
0005
0006 #define MPUIR_nU 1
0007 #define MPUIR_DREGION 8
0008 #define MPUIR_IREGION 16
0009 #define MPUIR_DREGION_SZMASK (0xFF << MPUIR_DREGION)
0010 #define MPUIR_IREGION_SZMASK (0xFF << MPUIR_IREGION)
0011
0012
0013 #define MMFR0_PMSA (0xF << 4)
0014 #define MMFR0_PMSAv7 (3 << 4)
0015 #define MMFR0_PMSAv8 (4 << 4)
0016
0017
0018 #define PMSAv7_RSR_SZ 1
0019 #define PMSAv7_RSR_EN 0
0020 #define PMSAv7_RSR_SD 8
0021
0022
0023 #define PMSAv7_NR_SUBREGS 8
0024 #define PMSAv7_MIN_SUBREG_SIZE 256
0025
0026
0027 #define PMSAv7_RSR_ALL_MEM 63
0028
0029
0030 #define PMSAv7_ACR_XN (1 << 12)
0031 #define PMSAv7_ACR_SHARED (1 << 2)
0032
0033
0034 #define PMSAv7_RGN_CACHEABLE 0xB
0035 #define PMSAv7_RGN_SHARED_CACHEABLE (PMSAv7_RGN_CACHEABLE | PMSAv7_ACR_SHARED)
0036 #define PMSAv7_RGN_STRONGLY_ORDERED 0
0037
0038
0039 #ifdef CONFIG_SMP
0040 #define PMSAv7_RGN_NORMAL (PMSAv7_RGN_CACHEABLE | PMSAv7_ACR_SHARED)
0041 #else
0042 #define PMSAv7_RGN_NORMAL PMSAv7_RGN_CACHEABLE
0043 #endif
0044
0045
0046 #define PMSAv7_AP_PL1RO_PL0NA (0x5 << 8)
0047 #define PMSAv7_AP_PL1RW_PL0RW (0x3 << 8)
0048 #define PMSAv7_AP_PL1RW_PL0R0 (0x2 << 8)
0049 #define PMSAv7_AP_PL1RW_PL0NA (0x1 << 8)
0050
0051 #define PMSAv8_BAR_XN 1
0052
0053 #define PMSAv8_LAR_EN 1
0054 #define PMSAv8_LAR_IDX(n) (((n) & 0x7) << 1)
0055
0056
0057 #define PMSAv8_AP_PL1RW_PL0NA (0 << 1)
0058 #define PMSAv8_AP_PL1RW_PL0RW (1 << 1)
0059 #define PMSAv8_AP_PL1RO_PL0RO (3 << 1)
0060
0061 #ifdef CONFIG_SMP
0062 #define PMSAv8_RGN_SHARED (3 << 3)
0063 #else
0064 #define PMSAv8_RGN_SHARED (0 << 3)
0065 #endif
0066
0067 #define PMSAv8_RGN_DEVICE_nGnRnE 0
0068 #define PMSAv8_RGN_NORMAL 1
0069
0070 #define PMSAv8_MAIR(attr, mt) ((attr) << ((mt) * 8))
0071
0072 #ifdef CONFIG_CPU_V7M
0073 #define PMSAv8_MINALIGN 32
0074 #else
0075 #define PMSAv8_MINALIGN 64
0076 #endif
0077
0078
0079 #define PMSAv7_PROBE_REGION 0
0080 #define PMSAv7_BG_REGION 1
0081 #define PMSAv7_RAM_REGION 2
0082 #define PMSAv7_ROM_REGION 3
0083
0084
0085 #define PMSAv8_XIP_REGION 0
0086 #define PMSAv8_KERNEL_REGION 1
0087
0088
0089 #define MPU_MAX_REGIONS 16
0090
0091 #define PMSAv7_DATA_SIDE 0
0092 #define PMSAv7_INSTR_SIDE 1
0093
0094 #ifndef __ASSEMBLY__
0095
0096 struct mpu_rgn {
0097
0098 union {
0099 u32 drbar;
0100 u32 prbar;
0101 };
0102 union {
0103 u32 drsr;
0104 u32 prlar;
0105 };
0106 union {
0107 u32 dracr;
0108 u32 unused;
0109 };
0110 };
0111
0112 struct mpu_rgn_info {
0113 unsigned int used;
0114 struct mpu_rgn rgns[MPU_MAX_REGIONS];
0115 };
0116 extern struct mpu_rgn_info mpu_rgn_info;
0117
0118 #ifdef CONFIG_ARM_MPU
0119 extern void __init pmsav7_adjust_lowmem_bounds(void);
0120 extern void __init pmsav8_adjust_lowmem_bounds(void);
0121
0122 extern void __init pmsav7_setup(void);
0123 extern void __init pmsav8_setup(void);
0124 #else
0125 static inline void pmsav7_adjust_lowmem_bounds(void) {};
0126 static inline void pmsav8_adjust_lowmem_bounds(void) {};
0127 static inline void pmsav7_setup(void) {};
0128 static inline void pmsav8_setup(void) {};
0129 #endif
0130
0131 #endif
0132
0133 #endif