include/asm/insn.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __ASM_ARM_INSN_H
0003 #define __ASM_ARM_INSN_H
0004
0005 #include <linux/types.h>
0006
0007 /*
0008  * Avoid a literal load by emitting a sequence of ADD/LDR instructions with the
0009  * appropriate relocations. The combined sequence has a range of -/+ 256 MiB,
0010  * which should be sufficient for the core kernel as well as modules loaded
0011  * into the module region. (Not supported by LLD before release 14)
0012  */
0013 #define LOAD_SYM_ARMV6(reg, sym)                    \
0014     "   .globl  " #sym "                \n\t"   \
0015     "   .reloc  10f, R_ARM_ALU_PC_G0_NC, " #sym "   \n\t"   \
0016     "   .reloc  11f, R_ARM_ALU_PC_G1_NC, " #sym "   \n\t"   \
0017     "   .reloc  12f, R_ARM_LDR_PC_G2, " #sym "      \n\t"   \
0018     "10:    sub " #reg ", pc, #8            \n\t"   \
0019     "11:    sub " #reg ", " #reg ", #4          \n\t"   \
0020     "12:    ldr " #reg ", [" #reg ", #0]        \n\t"
0021
0022 static inline unsigned long
0023 arm_gen_nop(void)
0024 {
0025 #ifdef CONFIG_THUMB2_KERNEL
0026     return 0xf3af8000; /* nop.w */
0027 #else
0028     return 0xe1a00000; /* mov r0, r0 */
0029 #endif
0030 }
0031
0032 unsigned long
0033 __arm_gen_branch(unsigned long pc, unsigned long addr, bool link, bool warn);
0034
0035 static inline unsigned long
0036 arm_gen_branch(unsigned long pc, unsigned long addr)
0037 {
0038     return __arm_gen_branch(pc, addr, false, true);
0039 }
0040
0041 static inline unsigned long
0042 arm_gen_branch_link(unsigned long pc, unsigned long addr, bool warn)
0043 {
0044     return __arm_gen_branch(pc, addr, true, warn);
0045 }
0046
0047 #endif