include/asm/domain.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *  arch/arm/include/asm/domain.h
0004  *
0005  *  Copyright (C) 1999 Russell King.
0006  */
0007 #ifndef __ASM_PROC_DOMAIN_H
0008 #define __ASM_PROC_DOMAIN_H
0009
0010 #ifndef __ASSEMBLY__
0011 #include <asm/barrier.h>
0012 #include <asm/thread_info.h>
0013 #endif
0014
0015 /*
0016  * Domain numbers
0017  *
0018  *  DOMAIN_IO     - domain 2 includes all IO only
0019  *  DOMAIN_USER   - domain 1 includes all user memory only
0020  *  DOMAIN_KERNEL - domain 0 includes all kernel memory only
0021  *
0022  * The domain numbering depends on whether we support 36 physical
0023  * address for I/O or not.  Addresses above the 32 bit boundary can
0024  * only be mapped using supersections and supersections can only
0025  * be set for domain 0.  We could just default to DOMAIN_IO as zero,
0026  * but there may be systems with supersection support and no 36-bit
0027  * addressing.  In such cases, we want to map system memory with
0028  * supersections to reduce TLB misses and footprint.
0029  *
0030  * 36-bit addressing and supersections are only available on
0031  * CPUs based on ARMv6+ or the Intel XSC3 core.
0032  */
0033 #ifndef CONFIG_IO_36
0034 #define DOMAIN_KERNEL   0
0035 #define DOMAIN_USER 1
0036 #define DOMAIN_IO   2
0037 #else
0038 #define DOMAIN_KERNEL   2
0039 #define DOMAIN_USER 1
0040 #define DOMAIN_IO   0
0041 #endif
0042 #define DOMAIN_VECTORS  3
0043
0044 /*
0045  * Domain types
0046  */
0047 #define DOMAIN_NOACCESS 0
0048 #define DOMAIN_CLIENT   1
0049 #ifdef CONFIG_CPU_USE_DOMAINS
0050 #define DOMAIN_MANAGER  3
0051 #else
0052 #define DOMAIN_MANAGER  1
0053 #endif
0054
0055 #define domain_mask(dom)    ((3) << (2 * (dom)))
0056 #define domain_val(dom,type)    ((type) << (2 * (dom)))
0057
0058 #ifdef CONFIG_CPU_SW_DOMAIN_PAN
0059 #define DACR_INIT \
0060     (domain_val(DOMAIN_USER, DOMAIN_NOACCESS) | \
0061      domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
0062      domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \
0063      domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT))
0064 #else
0065 #define DACR_INIT \
0066     (domain_val(DOMAIN_USER, DOMAIN_CLIENT) | \
0067      domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
0068      domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \
0069      domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT))
0070 #endif
0071
0072 #define __DACR_DEFAULT \
0073     domain_val(DOMAIN_KERNEL, DOMAIN_CLIENT) | \
0074     domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \
0075     domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT)
0076
0077 #define DACR_UACCESS_DISABLE    \
0078     (__DACR_DEFAULT | domain_val(DOMAIN_USER, DOMAIN_NOACCESS))
0079 #define DACR_UACCESS_ENABLE \
0080     (__DACR_DEFAULT | domain_val(DOMAIN_USER, DOMAIN_CLIENT))
0081
0082 #ifndef __ASSEMBLY__
0083
0084 #ifdef CONFIG_CPU_CP15_MMU
0085 static __always_inline unsigned int get_domain(void)
0086 {
0087     unsigned int domain;
0088
0089     asm(
0090     "mrc    p15, 0, %0, c3, c0  @ get domain"
0091      : "=r" (domain)
0092      : "m" (current_thread_info()->cpu_domain));
0093
0094     return domain;
0095 }
0096
0097 static __always_inline void set_domain(unsigned int val)
0098 {
0099     asm volatile(
0100     "mcr    p15, 0, %0, c3, c0  @ set domain"
0101       : : "r" (val) : "memory");
0102     isb();
0103 }
0104 #else
0105 static __always_inline unsigned int get_domain(void)
0106 {
0107     return 0;
0108 }
0109
0110 static __always_inline void set_domain(unsigned int val)
0111 {
0112 }
0113 #endif
0114
0115 /*
0116  * Generate the T (user) versions of the LDR/STR and related
0117  * instructions (inline assembly)
0118  */
0119 #ifdef CONFIG_CPU_USE_DOMAINS
0120 #define TUSER(instr)        TUSERCOND(instr, )
0121 #define TUSERCOND(instr, cond)  #instr "t" #cond
0122 #else
0123 #define TUSER(instr)        TUSERCOND(instr, )
0124 #define TUSERCOND(instr, cond)  #instr #cond
0125 #endif
0126
0127 #else /* __ASSEMBLY__ */
0128
0129 /*
0130  * Generate the T (user) versions of the LDR/STR and related
0131  * instructions
0132  */
0133 #ifdef CONFIG_CPU_USE_DOMAINS
0134 #define TUSER(instr)    instr ## t
0135 #else
0136 #define TUSER(instr)    instr
0137 #endif
0138
0139 #endif /* __ASSEMBLY__ */
0140
0141 #endif /* !__ASM_PROC_DOMAIN_H */