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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __ASM_ARM_CP15_H
0003 #define __ASM_ARM_CP15_H
0004 
0005 #include <asm/barrier.h>
0006 
0007 /*
0008  * CR1 bits (CP#15 CR1)
0009  */
0010 #define CR_M    (1 << 0)    /* MMU enable               */
0011 #define CR_A    (1 << 1)    /* Alignment abort enable       */
0012 #define CR_C    (1 << 2)    /* Dcache enable            */
0013 #define CR_W    (1 << 3)    /* Write buffer enable          */
0014 #define CR_P    (1 << 4)    /* 32-bit exception handler     */
0015 #define CR_D    (1 << 5)    /* 32-bit data address range        */
0016 #define CR_L    (1 << 6)    /* Implementation defined       */
0017 #define CR_B    (1 << 7)    /* Big endian               */
0018 #define CR_S    (1 << 8)    /* System MMU protection        */
0019 #define CR_R    (1 << 9)    /* ROM MMU protection           */
0020 #define CR_F    (1 << 10)   /* Implementation defined       */
0021 #define CR_Z    (1 << 11)   /* Implementation defined       */
0022 #define CR_I    (1 << 12)   /* Icache enable            */
0023 #define CR_V    (1 << 13)   /* Vectors relocated to 0xffff0000  */
0024 #define CR_RR   (1 << 14)   /* Round Robin cache replacement    */
0025 #define CR_L4   (1 << 15)   /* LDR pc can set T bit         */
0026 #define CR_DT   (1 << 16)
0027 #ifdef CONFIG_MMU
0028 #define CR_HA   (1 << 17)   /* Hardware management of Access Flag   */
0029 #else
0030 #define CR_BR   (1 << 17)   /* MPU Background region enable (PMSA)  */
0031 #endif
0032 #define CR_IT   (1 << 18)
0033 #define CR_ST   (1 << 19)
0034 #define CR_FI   (1 << 21)   /* Fast interrupt (lower latency mode)  */
0035 #define CR_U    (1 << 22)   /* Unaligned access operation       */
0036 #define CR_XP   (1 << 23)   /* Extended page tables         */
0037 #define CR_VE   (1 << 24)   /* Vectored interrupts          */
0038 #define CR_EE   (1 << 25)   /* Exception (Big) Endian       */
0039 #define CR_TRE  (1 << 28)   /* TEX remap enable         */
0040 #define CR_AFE  (1 << 29)   /* Access flag enable           */
0041 #define CR_TE   (1 << 30)   /* Thumb exception enable       */
0042 
0043 #ifndef __ASSEMBLY__
0044 
0045 #if __LINUX_ARM_ARCH__ >= 4
0046 #define vectors_high()  (get_cr() & CR_V)
0047 #else
0048 #define vectors_high()  (0)
0049 #endif
0050 
0051 #ifdef CONFIG_CPU_CP15
0052 
0053 #include <asm/vdso/cp15.h>
0054 
0055 extern unsigned long cr_alignment;  /* defined in entry-armv.S */
0056 
0057 static inline unsigned long get_cr(void)
0058 {
0059     unsigned long val;
0060     asm("mrc p15, 0, %0, c1, c0, 0  @ get CR" : "=r" (val) : : "cc");
0061     return val;
0062 }
0063 
0064 static inline void set_cr(unsigned long val)
0065 {
0066     asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR"
0067       : : "r" (val) : "cc");
0068     isb();
0069 }
0070 
0071 static inline unsigned int get_auxcr(void)
0072 {
0073     unsigned int val;
0074     asm("mrc p15, 0, %0, c1, c0, 1  @ get AUXCR" : "=r" (val));
0075     return val;
0076 }
0077 
0078 static inline void set_auxcr(unsigned int val)
0079 {
0080     asm volatile("mcr p15, 0, %0, c1, c0, 1 @ set AUXCR"
0081       : : "r" (val));
0082     isb();
0083 }
0084 
0085 #define CPACC_FULL(n)       (3 << (n * 2))
0086 #define CPACC_SVC(n)        (1 << (n * 2))
0087 #define CPACC_DISABLE(n)    (0 << (n * 2))
0088 
0089 static inline unsigned int get_copro_access(void)
0090 {
0091     unsigned int val;
0092     asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access"
0093       : "=r" (val) : : "cc");
0094     return val;
0095 }
0096 
0097 static inline void set_copro_access(unsigned int val)
0098 {
0099     asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access"
0100       : : "r" (val) : "cc");
0101     isb();
0102 }
0103 
0104 #else /* ifdef CONFIG_CPU_CP15 */
0105 
0106 /*
0107  * cr_alignment is tightly coupled to cp15 (at least in the minds of the
0108  * developers). Yielding 0 for machines without a cp15 (and making it
0109  * read-only) is fine for most cases and saves quite some #ifdeffery.
0110  */
0111 #define cr_alignment    UL(0)
0112 
0113 static inline unsigned long get_cr(void)
0114 {
0115     return 0;
0116 }
0117 
0118 #endif /* ifdef CONFIG_CPU_CP15 / else */
0119 
0120 #endif /* ifndef __ASSEMBLY__ */
0121 
0122 #endif