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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (C) 2014 Renesas Electronics Corporation
0004  *
0005  * Initialization of CNTVOFF register from secure mode
0006  *
0007  */
0008 
0009 #include <linux/linkage.h>
0010 #include <asm/assembler.h>
0011 
0012 ENTRY(secure_cntvoff_init)
0013     .arch   armv7-a
0014     /*
0015      * CNTVOFF has to be initialized either from non-secure Hypervisor
0016      * mode or secure Monitor mode with SCR.NS==1. If TrustZone is enabled
0017      * then it should be handled by the secure code. The CPU must implement
0018      * the virtualization extensions.
0019      */
0020     cps #MON_MODE
0021     mrc p15, 0, r1, c1, c1, 0       /* Get Secure Config */
0022     orr r0, r1, #1
0023     mcr p15, 0, r0, c1, c1, 0       /* Set Non Secure bit */
0024     isb
0025     mov r0, #0
0026     mcrr    p15, 4, r0, r0, c14     /* CNTVOFF = 0 */
0027     isb
0028     mcr p15, 0, r1, c1, c1, 0       /* Set Secure bit */
0029     isb
0030     cps #SVC_MODE
0031     ret lr
0032 ENDPROC(secure_cntvoff_init)