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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2011 - 2014 Xilinx
0004  * Copyright (C) 2016 Jagan Teki <jteki@openedev.com>
0005  */
0006 /dts-v1/;
0007 /include/ "zynq-7000.dtsi"
0008 
0009 / {
0010         model = "Avnet MicroZed board";
0011         compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000";
0012 
0013         aliases {
0014                 ethernet0 = &gem0;
0015                 serial0 = &uart1;
0016         };
0017 
0018         memory@0 {
0019                 device_type = "memory";
0020                 reg = <0x0 0x40000000>;
0021         };
0022 
0023         chosen {
0024                 bootargs = "earlycon";
0025                 stdout-path = "serial0:115200n8";
0026         };
0027 
0028         usb_phy0: phy0 {
0029                 compatible = "usb-nop-xceiv";
0030                 #phy-cells = <0>;
0031         };
0032 };
0033 
0034 &clkc {
0035         ps-clk-frequency = <33333333>;
0036 };
0037 
0038 &gem0 {
0039         status = "okay";
0040         phy-mode = "rgmii-id";
0041         phy-handle = <&ethernet_phy>;
0042 
0043         ethernet_phy: ethernet-phy@0 {
0044                 reg = <0>;
0045         };
0046 };
0047 
0048 &sdhci0 {
0049         status = "okay";
0050 };
0051 
0052 &uart1 {
0053         status = "okay";
0054 };
0055 
0056 &usb0 {
0057         status = "okay";
0058         dr_mode = "host";
0059         usb-phy = <&usb_phy0>;
0060         pinctrl-names = "default";
0061         pinctrl-0 = <&pinctrl_usb0_default>;
0062 };
0063 
0064 &pinctrl0 {
0065         pinctrl_usb0_default: usb0-default {
0066                 mux {
0067                         groups = "usb0_0_grp";
0068                         function = "usb0";
0069                 };
0070 
0071                 conf {
0072                         groups = "usb0_0_grp";
0073                         slew-rate = <0>;
0074                         io-standard = <1>;
0075                 };
0076 
0077                 conf-rx {
0078                         pins = "MIO29", "MIO31", "MIO36";
0079                         bias-high-impedance;
0080                 };
0081 
0082                 conf-tx {
0083                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
0084                                "MIO35", "MIO37", "MIO38", "MIO39";
0085                         bias-disable;
0086                 };
0087         };
0088 };