0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * vt8500.dtsi - Device tree file for VIA VT8500 SoC
0004 *
0005 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
0006 */
0007
0008 / {
0009 #address-cells = <1>;
0010 #size-cells = <1>;
0011 compatible = "via,vt8500";
0012
0013 cpus {
0014 #address-cells = <0>;
0015 #size-cells = <0>;
0016
0017 cpu {
0018 device_type = "cpu";
0019 compatible = "arm,arm926ej-s";
0020 };
0021 };
0022
0023 memory {
0024 device_type = "memory";
0025 reg = <0x0 0x0>;
0026 };
0027
0028 aliases {
0029 serial0 = &uart0;
0030 serial1 = &uart1;
0031 serial2 = &uart2;
0032 serial3 = &uart3;
0033 };
0034
0035 soc {
0036 #address-cells = <1>;
0037 #size-cells = <1>;
0038 compatible = "simple-bus";
0039 ranges;
0040 interrupt-parent = <&intc>;
0041
0042 intc: interrupt-controller@d8140000 {
0043 compatible = "via,vt8500-intc";
0044 interrupt-controller;
0045 reg = <0xd8140000 0x10000>;
0046 #interrupt-cells = <1>;
0047 };
0048
0049 pinctrl: pinctrl@d8110000 {
0050 compatible = "via,vt8500-pinctrl";
0051 reg = <0xd8110000 0x10000>;
0052 interrupt-controller;
0053 #interrupt-cells = <2>;
0054 gpio-controller;
0055 #gpio-cells = <2>;
0056 };
0057
0058 pmc@d8130000 {
0059 compatible = "via,vt8500-pmc";
0060 reg = <0xd8130000 0x1000>;
0061
0062 clocks {
0063 #address-cells = <1>;
0064 #size-cells = <0>;
0065
0066 ref24: ref24M {
0067 #clock-cells = <0>;
0068 compatible = "fixed-clock";
0069 clock-frequency = <24000000>;
0070 };
0071
0072 clkuart0: uart0 {
0073 #clock-cells = <0>;
0074 compatible = "via,vt8500-device-clock";
0075 clocks = <&ref24>;
0076 enable-reg = <0x250>;
0077 enable-bit = <1>;
0078 };
0079
0080 clkuart1: uart1 {
0081 #clock-cells = <0>;
0082 compatible = "via,vt8500-device-clock";
0083 clocks = <&ref24>;
0084 enable-reg = <0x250>;
0085 enable-bit = <2>;
0086 };
0087
0088 clkuart2: uart2 {
0089 #clock-cells = <0>;
0090 compatible = "via,vt8500-device-clock";
0091 clocks = <&ref24>;
0092 enable-reg = <0x250>;
0093 enable-bit = <3>;
0094 };
0095
0096 clkuart3: uart3 {
0097 #clock-cells = <0>;
0098 compatible = "via,vt8500-device-clock";
0099 clocks = <&ref24>;
0100 enable-reg = <0x250>;
0101 enable-bit = <4>;
0102 };
0103 };
0104 };
0105
0106 timer@d8130100 {
0107 compatible = "via,vt8500-timer";
0108 reg = <0xd8130100 0x28>;
0109 interrupts = <36>;
0110 };
0111
0112 ehci@d8007900 {
0113 compatible = "via,vt8500-ehci";
0114 reg = <0xd8007900 0x200>;
0115 interrupts = <43>;
0116 };
0117
0118 uhci@d8007b00 {
0119 compatible = "platform-uhci";
0120 reg = <0xd8007b00 0x200>;
0121 interrupts = <43>;
0122 };
0123
0124 fb: fb@d8050800 {
0125 compatible = "via,vt8500-fb";
0126 reg = <0xd800e400 0x400>;
0127 interrupts = <12>;
0128 };
0129
0130 ge_rops@d8050400 {
0131 compatible = "wm,prizm-ge-rops";
0132 reg = <0xd8050400 0x100>;
0133 };
0134
0135 uart0: serial@d8200000 {
0136 compatible = "via,vt8500-uart";
0137 reg = <0xd8200000 0x1040>;
0138 interrupts = <32>;
0139 clocks = <&clkuart0>;
0140 status = "disabled";
0141 };
0142
0143 uart1: serial@d82b0000 {
0144 compatible = "via,vt8500-uart";
0145 reg = <0xd82b0000 0x1040>;
0146 interrupts = <33>;
0147 clocks = <&clkuart1>;
0148 status = "disabled";
0149 };
0150
0151 uart2: serial@d8210000 {
0152 compatible = "via,vt8500-uart";
0153 reg = <0xd8210000 0x1040>;
0154 interrupts = <47>;
0155 clocks = <&clkuart2>;
0156 status = "disabled";
0157 };
0158
0159 uart3: serial@d82c0000 {
0160 compatible = "via,vt8500-uart";
0161 reg = <0xd82c0000 0x1040>;
0162 interrupts = <50>;
0163 clocks = <&clkuart3>;
0164 status = "disabled";
0165 };
0166
0167 rtc@d8100000 {
0168 compatible = "via,vt8500-rtc";
0169 reg = <0xd8100000 0x10000>;
0170 interrupts = <48>;
0171 };
0172
0173 ethernet@d8004000 {
0174 compatible = "via,vt8500-rhine";
0175 reg = <0xd8004000 0x100>;
0176 interrupts = <10>;
0177 };
0178 };
0179 };
