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0001 /*
0002  * Copyright (C) 2015, 2016 Zodiac Inflight Innovations
0003  *
0004  * Based on an original 'vf610-twr.dts' which is Copyright 2015,
0005  * Freescale Semiconductor, Inc.
0006  *
0007  * This file is dual-licensed: you can use it either under the terms
0008  * of the GPL or the X11 license, at your option. Note that this dual
0009  * licensing only applies to this file, and not this project as a
0010  * whole.
0011  *
0012  *  a) This file is free software; you can redistribute it and/or
0013  *     modify it under the terms of the GNU General Public License
0014  *     version 2 as published by the Free Software Foundation.
0015  *
0016  *     This file is distributed in the hope that it will be useful,
0017  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
0018  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0019  *     GNU General Public License for more details.
0020  *
0021  * Or, alternatively,
0022  *
0023  *  b) Permission is hereby granted, free of charge, to any person
0024  *     obtaining a copy of this software and associated documentation
0025  *     files (the "Software"), to deal in the Software without
0026  *     restriction, including without limitation the rights to use,
0027  *     copy, modify, merge, publish, distribute, sublicense, and/or
0028  *     sell copies of the Software, and to permit persons to whom the
0029  *     Software is furnished to do so, subject to the following
0030  *     conditions:
0031  *
0032  *     The above copyright notice and this permission notice shall be
0033  *     included in all copies or substantial portions of the Software.
0034  *
0035  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
0036  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
0037  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0038  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
0039  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
0040  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0041  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0042  *     OTHER DEALINGS IN THE SOFTWARE.
0043  */
0044 
0045 #include "vf610.dtsi"
0046 
0047 / {
0048         chosen {
0049                 stdout-path = "serial0:115200n8";
0050         };
0051 
0052         memory@80000000 {
0053                 device_type = "memory";
0054                 reg = <0x80000000 0x20000000>;
0055         };
0056 
0057         gpio-leds {
0058                 compatible = "gpio-leds";
0059                 pinctrl-0 = <&pinctrl_leds_debug>;
0060                 pinctrl-names = "default";
0061 
0062                 debug {
0063                         label = "zii:green:debug1";
0064                         gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
0065                         linux,default-trigger = "heartbeat";
0066                 };
0067         };
0068 
0069         reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu {
0070                 compatible = "regulator-fixed";
0071                 regulator-name = "vcc_3v3_mcu";
0072                 regulator-min-microvolt = <3300000>;
0073                 regulator-max-microvolt = <3300000>;
0074         };
0075 
0076         usb0_vbus: regulator-usb0-vbus {
0077                 compatible = "regulator-fixed";
0078                 pinctrl-0 = <&pinctrl_usb_vbus>;
0079                 regulator-name = "usb_vbus";
0080                 regulator-min-microvolt = <5000000>;
0081                 regulator-max-microvolt = <5000000>;
0082                 enable-active-high;
0083                 regulator-always-on;
0084                 regulator-boot-on;
0085                 gpio = <&gpio0 6 0>;
0086         };
0087 
0088         supply-voltage-monitor {
0089                 compatible = "iio-hwmon";
0090                 io-channels = <&adc0 8>, /* VCC_1V5 */
0091                               <&adc0 9>, /* VCC_1V8 */
0092                               <&adc1 8>, /* VCC_1V0 */
0093                               <&adc1 9>; /* VCC_1V2 */
0094         };
0095 };
0096 
0097 &adc0 {
0098         pinctrl-names = "default";
0099         pinctrl-0 = <&pinctrl_adc0_ad5>;
0100         vref-supply = <&reg_vcc_3v3_mcu>;
0101         status = "okay";
0102 };
0103 
0104 &edma0 {
0105         status = "okay";
0106 };
0107 
0108 &edma1 {
0109         status = "okay";
0110 };
0111 
0112 &esdhc1 {
0113         pinctrl-names = "default";
0114         pinctrl-0 = <&pinctrl_esdhc1>;
0115         bus-width = <4>;
0116         status = "okay";
0117 };
0118 
0119 &fec0 {
0120         phy-mode = "rmii";
0121         pinctrl-names = "default";
0122         pinctrl-0 = <&pinctrl_fec0>;
0123         status = "okay";
0124 };
0125 
0126 &fec1 {
0127         phy-mode = "rmii";
0128         pinctrl-names = "default";
0129         pinctrl-0 = <&pinctrl_fec1>;
0130         status = "okay";
0131 
0132         fixed-link {
0133                    speed = <100>;
0134                    full-duplex;
0135         };
0136 
0137         mdio1: mdio {
0138                 #address-cells = <1>;
0139                 #size-cells = <0>;
0140                 clock-frequency = <12500000>;
0141                 suppress-preamble;
0142                 status = "okay";
0143         };
0144 };
0145 
0146 &i2c0 {
0147         clock-frequency = <100000>;
0148         pinctrl-names = "default", "gpio";
0149         pinctrl-0 = <&pinctrl_i2c0>;
0150         pinctrl-1 = <&pinctrl_i2c0_gpio>;
0151         scl-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0152         sda-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
0153         status = "okay";
0154 
0155         lm75@48 {
0156                 compatible = "national,lm75";
0157                 reg = <0x48>;
0158         };
0159 
0160         eeprom@50 {
0161                 compatible = "atmel,24c04";
0162                 reg = <0x50>;
0163         };
0164 
0165         eeprom@52 {
0166                 compatible = "atmel,24c04";
0167                 reg = <0x52>;
0168         };
0169 
0170         ds1682@6b {
0171                 compatible = "dallas,ds1682";
0172                 reg = <0x6b>;
0173         };
0174 };
0175 
0176 &i2c1 {
0177         clock-frequency = <100000>;
0178         pinctrl-names = "default";
0179         pinctrl-0 = <&pinctrl_i2c1>;
0180         status = "okay";
0181 };
0182 
0183 &i2c2 {
0184         clock-frequency = <100000>;
0185         pinctrl-names = "default";
0186         pinctrl-0 = <&pinctrl_i2c2>;
0187         status = "okay";
0188 };
0189 
0190 &qspi0 {
0191         pinctrl-names = "default";
0192         pinctrl-0 = <&pinctrl_qspi0>;
0193         status = "okay";
0194 
0195         /*
0196          * Attached MT25QL02 can go up to 90Mhz in DTR and 166 in STR
0197          * modes, so, spi-max-frequency is limited to 90MHz
0198          */
0199         flash@0 {
0200                 compatible = "jedec,spi-nor";
0201                 #address-cells = <1>;
0202                 #size-cells = <1>;
0203                 spi-max-frequency = <90000000>;
0204                 spi-rx-bus-width = <4>;
0205                 reg = <0>;
0206                 m25p,fast-read;
0207         };
0208 
0209         flash@2 {
0210                 compatible = "jedec,spi-nor";
0211                 #address-cells = <1>;
0212                 #size-cells = <1>;
0213                 spi-max-frequency = <90000000>;
0214                 spi-rx-bus-width = <4>;
0215                 reg = <2>;
0216                 m25p,fast-read;
0217         };
0218 };
0219 
0220 &uart0 {
0221         pinctrl-names = "default";
0222         pinctrl-0 = <&pinctrl_uart0>;
0223         status = "okay";
0224 };
0225 
0226 &uart1 {
0227         pinctrl-names = "default";
0228         pinctrl-0 = <&pinctrl_uart1>;
0229         status = "okay";
0230 };
0231 
0232 &uart2 {
0233         pinctrl-names = "default";
0234         pinctrl-0 = <&pinctrl_uart2>;
0235         status = "okay";
0236 };
0237 
0238 &usbdev0 {
0239         disable-over-current;
0240         vbus-supply = <&usb0_vbus>;
0241         dr_mode = "host";
0242         status = "okay";
0243 };
0244 
0245 &usbh1 {
0246         disable-over-current;
0247         status = "okay";
0248 };
0249 
0250 &usbmisc0 {
0251         status = "okay";
0252 };
0253 
0254 &usbmisc1 {
0255         status = "okay";
0256 };
0257 
0258 &usbphy0 {
0259         status = "okay";
0260 };
0261 
0262 &usbphy1 {
0263         status = "okay";
0264 };
0265 
0266 &tempsensor {
0267         io-channels = <&adc0 16>;
0268 };
0269 
0270 &iomuxc {
0271         pinctrl_adc0_ad5: adc0ad5grp {
0272                 fsl,pins = <
0273                         VF610_PAD_PTC30__ADC0_SE5       0x00a1
0274                 >;
0275         };
0276 
0277         pinctrl_dspi0: dspi0grp {
0278                 fsl,pins = <
0279                         VF610_PAD_PTB18__DSPI0_CS1      0x1182
0280                         VF610_PAD_PTB19__DSPI0_CS0      0x1182
0281                         VF610_PAD_PTB20__DSPI0_SIN      0x1181
0282                         VF610_PAD_PTB21__DSPI0_SOUT     0x1182
0283                         VF610_PAD_PTB22__DSPI0_SCK      0x1182
0284                 >;
0285         };
0286 
0287         pinctrl_dspi2: dspi2grp {
0288                 fsl,pins = <
0289                         VF610_PAD_PTD31__DSPI2_CS1      0x1182
0290                         VF610_PAD_PTD30__DSPI2_CS0      0x1182
0291                         VF610_PAD_PTD29__DSPI2_SIN      0x1181
0292                         VF610_PAD_PTD28__DSPI2_SOUT     0x1182
0293                         VF610_PAD_PTD27__DSPI2_SCK      0x1182
0294                 >;
0295         };
0296 
0297         pinctrl_esdhc1: esdhc1grp {
0298                 fsl,pins = <
0299                         VF610_PAD_PTA24__ESDHC1_CLK     0x31ef
0300                         VF610_PAD_PTA25__ESDHC1_CMD     0x31ef
0301                         VF610_PAD_PTA26__ESDHC1_DAT0    0x31ef
0302                         VF610_PAD_PTA27__ESDHC1_DAT1    0x31ef
0303                         VF610_PAD_PTA28__ESDHC1_DATA2   0x31ef
0304                         VF610_PAD_PTA29__ESDHC1_DAT3    0x31ef
0305                         VF610_PAD_PTA7__GPIO_134        0x219d
0306                 >;
0307         };
0308 
0309         pinctrl_fec0: fec0grp {
0310                 fsl,pins = <
0311                         VF610_PAD_PTC0__ENET_RMII0_MDC  0x30d2
0312                         VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d3
0313                         VF610_PAD_PTC2__ENET_RMII0_CRS  0x30d1
0314                         VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
0315                         VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
0316                         VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
0317                         VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
0318                         VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
0319                         VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
0320                 >;
0321         };
0322 
0323         pinctrl_fec1: fec1grp {
0324                 fsl,pins = <
0325                         VF610_PAD_PTA6__RMII_CLKIN              0x30d1
0326                         VF610_PAD_PTC9__ENET_RMII1_MDC          0x30d2
0327                         VF610_PAD_PTC10__ENET_RMII1_MDIO        0x30d3
0328                         VF610_PAD_PTC11__ENET_RMII1_CRS         0x30d1
0329                         VF610_PAD_PTC12__ENET_RMII1_RXD1        0x30d1
0330                         VF610_PAD_PTC13__ENET_RMII1_RXD0        0x30d1
0331                         VF610_PAD_PTC14__ENET_RMII1_RXER        0x30d1
0332                         VF610_PAD_PTC15__ENET_RMII1_TXD1        0x30d2
0333                         VF610_PAD_PTC16__ENET_RMII1_TXD0        0x30d2
0334                         VF610_PAD_PTC17__ENET_RMII1_TXEN        0x30d2
0335                 >;
0336         };
0337 
0338         pinctrl_gpio_spi0: pinctrl-gpio-spi0 {
0339                 fsl,pins = <
0340                         VF610_PAD_PTB22__GPIO_44        0x33e2
0341                         VF610_PAD_PTB21__GPIO_43        0x33e2
0342                         VF610_PAD_PTB20__GPIO_42        0x33e1
0343                         VF610_PAD_PTB19__GPIO_41        0x33e2
0344                         VF610_PAD_PTB18__GPIO_40        0x33e2
0345                 >;
0346         };
0347 
0348         pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
0349                 fsl,pins = <
0350                         VF610_PAD_PTB5__GPIO_27         0x219d
0351                 >;
0352         };
0353 
0354         pinctrl_gpio_switch1: pinctrl-gpio-switch1 {
0355                 fsl,pins = <
0356                         VF610_PAD_PTB4__GPIO_26         0x219d
0357                 >;
0358         };
0359 
0360         pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset {
0361                 fsl,pins = <
0362                          VF610_PAD_PTE14__GPIO_119      0x31c2
0363                          >;
0364         };
0365 
0366         pinctrl_i2c0: i2c0grp {
0367                 fsl,pins = <
0368                         VF610_PAD_PTB14__I2C0_SCL       0x37ff
0369                         VF610_PAD_PTB15__I2C0_SDA       0x37ff
0370                 >;
0371         };
0372 
0373         pinctrl_i2c0_gpio: i2c0grp-gpio {
0374                 fsl,pins = <
0375                         VF610_PAD_PTB14__GPIO_36        0x31c2
0376                         VF610_PAD_PTB15__GPIO_37        0x31c2
0377                 >;
0378         };
0379 
0380 
0381         pinctrl_i2c1: i2c1grp {
0382                 fsl,pins = <
0383                         VF610_PAD_PTB16__I2C1_SCL       0x37ff
0384                         VF610_PAD_PTB17__I2C1_SDA       0x37ff
0385                 >;
0386         };
0387 
0388         pinctrl_i2c2: i2c2grp {
0389                 fsl,pins = <
0390                         VF610_PAD_PTA22__I2C2_SCL       0x37ff
0391                         VF610_PAD_PTA23__I2C2_SDA       0x37ff
0392                 >;
0393         };
0394 
0395         pinctrl_leds_debug: pinctrl-leds-debug {
0396                 fsl,pins = <
0397                          VF610_PAD_PTD20__GPIO_74       0x31c2
0398                          >;
0399         };
0400 
0401         pinctrl_qspi0: qspi0grp {
0402                 fsl,pins = <
0403                         VF610_PAD_PTD0__QSPI0_A_QSCK    0x38c2
0404                         VF610_PAD_PTD1__QSPI0_A_CS0     0x38c2
0405                         VF610_PAD_PTD2__QSPI0_A_DATA3   0x38c3
0406                         VF610_PAD_PTD3__QSPI0_A_DATA2   0x38c3
0407                         VF610_PAD_PTD4__QSPI0_A_DATA1   0x38c3
0408                         VF610_PAD_PTD5__QSPI0_A_DATA0   0x38c3
0409                         VF610_PAD_PTD7__QSPI0_B_QSCK    0x38c2
0410                         VF610_PAD_PTD8__QSPI0_B_CS0     0x38c2
0411                         VF610_PAD_PTD9__QSPI0_B_DATA3   0x38c3
0412                         VF610_PAD_PTD10__QSPI0_B_DATA2  0x38c3
0413                         VF610_PAD_PTD11__QSPI0_B_DATA1  0x38c3
0414                         VF610_PAD_PTD12__QSPI0_B_DATA0  0x38c3
0415                 >;
0416         };
0417 
0418         pinctrl_uart0: uart0grp {
0419                 fsl,pins = <
0420                         VF610_PAD_PTB10__UART0_TX       0x21a2
0421                         VF610_PAD_PTB11__UART0_RX       0x21a1
0422                 >;
0423         };
0424 
0425         pinctrl_uart1: uart1grp {
0426                 fsl,pins = <
0427                         VF610_PAD_PTB23__UART1_TX       0x21a2
0428                         VF610_PAD_PTB24__UART1_RX       0x21a1
0429                 >;
0430         };
0431 
0432         pinctrl_uart2: uart2grp {
0433                 fsl,pins = <
0434                         VF610_PAD_PTD23__UART2_TX       0x21a2
0435                         VF610_PAD_PTD22__UART2_RX       0x21a1
0436                 >;
0437         };
0438 
0439         pinctrl_usb_vbus: pinctrl-usb-vbus {
0440                 fsl,pins = <
0441                         VF610_PAD_PTA16__GPIO_6 0x31c2
0442                 >;
0443         };
0444 
0445         pinctrl_usb0_host: usb0-host-grp {
0446                 fsl,pins = <
0447                         VF610_PAD_PTD6__GPIO_85         0x0062
0448                 >;
0449         };
0450 };