OSCL-LXR |
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0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /*
0003 * Copyright (C) 2015, 2016 Zodiac Inflight Innovations
0004 */
0005
0006 /dts-v1/;
0007 #include "vf610-zii-dev.dtsi"
0008
0009 / {
0010 model = "ZII VF610 Development Board, Rev B";
0011 compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610";
0012
0013 mdio-mux {
0014 compatible = "mdio-mux-gpio";
0015 pinctrl-0 = <&pinctrl_mdio_mux>;
0016 pinctrl-names = "default";
0017 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH
0018 &gpio0 9 GPIO_ACTIVE_HIGH
0019 &gpio0 24 GPIO_ACTIVE_HIGH
0020 &gpio0 25 GPIO_ACTIVE_HIGH>;
0021 mdio-parent-bus = <&mdio1>;
0022 #address-cells = <1>;
0023 #size-cells = <0>;
0024
0025 mdio_mux_1: mdio@1 {
0026 reg = <1>;
0027 #address-cells = <1>;
0028 #size-cells = <0>;
0029
0030 switch0: switch@0 {
0031 compatible = "marvell,mv88e6085";
0032 pinctrl-0 = <&pinctrl_gpio_switch0>;
0033 pinctrl-names = "default";
0034 reg = <0>;
0035 dsa,member = <0 0>;
0036 interrupt-parent = <&gpio0>;
0037 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
0038 interrupt-controller;
0039 #interrupt-cells = <2>;
0040 eeprom-length = <512>;
0041
0042 ports {
0043 #address-cells = <1>;
0044 #size-cells = <0>;
0045
0046 port@0 {
0047 reg = <0>;
0048 label = "lan0";
0049 phy-handle = <&switch0phy0>;
0050 };
0051
0052 port@1 {
0053 reg = <1>;
0054 label = "lan1";
0055 phy-handle = <&switch0phy1>;
0056 };
0057
0058 port@2 {
0059 reg = <2>;
0060 label = "lan2";
0061 phy-handle = <&switch0phy2>;
0062 };
0063
0064 switch0port5: port@5 {
0065 reg = <5>;
0066 label = "dsa";
0067 phy-mode = "rgmii-txid";
0068 link = <&switch1port6
0069 &switch2port9>;
0070 fixed-link {
0071 speed = <1000>;
0072 full-duplex;
0073 };
0074 };
0075
0076 port@6 {
0077 reg = <6>;
0078 label = "cpu";
0079 ethernet = <&fec1>;
0080
0081 fixed-link {
0082 speed = <100>;
0083 full-duplex;
0084 };
0085 };
0086 };
0087 mdio {
0088 #address-cells = <1>;
0089 #size-cells = <0>;
0090 switch0phy0: switch0phy0@0 {
0091 reg = <0>;
0092 interrupt-parent = <&switch0>;
0093 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
0094 };
0095 switch0phy1: switch1phy0@1 {
0096 reg = <1>;
0097 interrupt-parent = <&switch0>;
0098 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
0099 };
0100 switch0phy2: switch1phy0@2 {
0101 reg = <2>;
0102 interrupt-parent = <&switch0>;
0103 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
0104 };
0105 };
0106 };
0107 };
0108
0109 mdio_mux_2: mdio@2 {
0110 reg = <2>;
0111 #address-cells = <1>;
0112 #size-cells = <0>;
0113
0114 switch1: switch@0 {
0115 compatible = "marvell,mv88e6085";
0116 pinctrl-0 = <&pinctrl_gpio_switch1>;
0117 pinctrl-names = "default";
0118 reg = <0>;
0119 dsa,member = <0 1>;
0120 interrupt-parent = <&gpio0>;
0121 interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
0122 interrupt-controller;
0123 #interrupt-cells = <2>;
0124 eeprom-length = <512>;
0125
0126 ports {
0127 #address-cells = <1>;
0128 #size-cells = <0>;
0129
0130 port@0 {
0131 reg = <0>;
0132 label = "lan3";
0133 phy-handle = <&switch1phy0>;
0134 };
0135
0136 port@1 {
0137 reg = <1>;
0138 label = "lan4";
0139 phy-handle = <&switch1phy1>;
0140 };
0141
0142 port@2 {
0143 reg = <2>;
0144 label = "lan5";
0145 phy-handle = <&switch1phy2>;
0146 };
0147
0148 switch1port5: port@5 {
0149 reg = <5>;
0150 label = "dsa";
0151 link = <&switch2port9>;
0152 phy-mode = "1000base-x";
0153
0154 fixed-link {
0155 speed = <1000>;
0156 full-duplex;
0157 };
0158 };
0159
0160 switch1port6: port@6 {
0161 reg = <6>;
0162 label = "dsa";
0163 phy-mode = "rgmii-txid";
0164 link = <&switch0port5>;
0165 fixed-link {
0166 speed = <1000>;
0167 full-duplex;
0168 };
0169 };
0170 };
0171 mdio {
0172 #address-cells = <1>;
0173 #size-cells = <0>;
0174
0175 switch1phy0: switch1phy0@0 {
0176 reg = <0>;
0177 interrupt-parent = <&switch1>;
0178 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
0179 };
0180
0181 switch1phy1: switch1phy0@1 {
0182 reg = <1>;
0183 interrupt-parent = <&switch1>;
0184 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
0185 };
0186
0187 switch1phy2: switch1phy0@2 {
0188 reg = <2>;
0189 interrupt-parent = <&switch1>;
0190 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
0191 };
0192 };
0193 };
0194 };
0195
0196 mdio_mux_4: mdio@4 {
0197 #address-cells = <1>;
0198 #size-cells = <0>;
0199 reg = <4>;
0200
0201 switch2: switch@0 {
0202 compatible = "marvell,mv88e6085";
0203 reg = <0>;
0204 dsa,member = <0 2>;
0205
0206 ports {
0207 #address-cells = <1>;
0208 #size-cells = <0>;
0209
0210 port@0 {
0211 reg = <0>;
0212 label = "lan6";
0213 phy-handle = <&switch2phy0>;
0214 phy-mode = "sgmii";
0215 };
0216
0217 port@1 {
0218 reg = <1>;
0219 label = "lan7";
0220 phy-handle = <&switch2phy1>;
0221 phy-mode = "sgmii";
0222 };
0223
0224 port@2 {
0225 reg = <2>;
0226 label = "lan8";
0227 phy-handle = <&switch2phy2>;
0228 };
0229
0230 port@3 {
0231 reg = <3>;
0232 label = "optical3";
0233
0234 fixed-link {
0235 speed = <1000>;
0236 full-duplex;
0237 link-gpios = <&gpio6 2
0238 GPIO_ACTIVE_HIGH>;
0239 };
0240 };
0241
0242 port@4 {
0243 reg = <4>;
0244 label = "optical4";
0245
0246 fixed-link {
0247 speed = <1000>;
0248 full-duplex;
0249 link-gpios = <&gpio6 3
0250 GPIO_ACTIVE_HIGH>;
0251 };
0252 };
0253
0254 switch2port9: port@9 {
0255 reg = <9>;
0256 label = "dsa";
0257 phy-mode = "1000base-x";
0258 link = <&switch1port5
0259 &switch0port5>;
0260
0261 fixed-link {
0262 speed = <1000>;
0263 full-duplex;
0264 };
0265 };
0266 };
0267 mdio {
0268 #address-cells = <1>;
0269 #size-cells = <0>;
0270
0271 switch2phy0: phy@0 {
0272 reg = <0>;
0273 };
0274 switch2phy1: phy@1 {
0275 reg = <1>;
0276 };
0277 switch2phy2: phy@2 {
0278 reg = <2>;
0279 };
0280 };
0281 };
0282 };
0283
0284 mdio_mux_8: mdio@8 {
0285 reg = <8>;
0286 #address-cells = <1>;
0287 #size-cells = <0>;
0288 };
0289 };
0290
0291 spi0 {
0292 compatible = "spi-gpio";
0293 pinctrl-0 = <&pinctrl_gpio_spi0>;
0294 pinctrl-names = "default";
0295 #address-cells = <1>;
0296 #size-cells = <0>;
0297 gpio-sck = <&gpio1 12 GPIO_ACTIVE_HIGH>;
0298 gpio-mosi = <&gpio1 11 GPIO_ACTIVE_HIGH>;
0299 gpio-miso = <&gpio1 10 GPIO_ACTIVE_HIGH>;
0300 cs-gpios = <&gpio1 9 GPIO_ACTIVE_LOW
0301 &gpio1 8 GPIO_ACTIVE_HIGH>;
0302 num-chipselects = <2>;
0303
0304 flash@0 {
0305 compatible = "m25p128", "jedec,spi-nor";
0306 #address-cells = <1>;
0307 #size-cells = <1>;
0308 reg = <0>;
0309 spi-max-frequency = <1000000>;
0310 };
0311
0312 at93c46d@1 {
0313 compatible = "atmel,at93c46d";
0314 pinctrl-0 = <&pinctrl_gpio_e6185_eeprom_sel>;
0315 pinctrl-names = "default";
0316 reg = <1>;
0317 spi-max-frequency = <500000>;
0318 spi-cs-high;
0319 data-size = <16>;
0320 select-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
0321 };
0322 };
0323 };
0324
0325 &i2c0 {
0326 gpio5: io-expander@20 {
0327 compatible = "nxp,pca9554";
0328 reg = <0x20>;
0329 gpio-controller;
0330 #gpio-cells = <2>;
0331
0332 };
0333
0334 gpio6: io-expander@22 {
0335 compatible = "nxp,pca9554";
0336 pinctrl-names = "default";
0337 pinctrl-0 = <&pinctrl_pca9554_22>;
0338 reg = <0x22>;
0339 gpio-controller;
0340 #gpio-cells = <2>;
0341 interrupt-controller;
0342 interrupt-parent = <&gpio3>;
0343 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
0344 };
0345 };
0346
0347 &i2c2 {
0348 tca9548@70 {
0349 compatible = "nxp,pca9548";
0350 pinctrl-0 = <&pinctrl_i2c_mux_reset>;
0351 pinctrl-names = "default";
0352 #address-cells = <1>;
0353 #size-cells = <0>;
0354 reg = <0x70>;
0355 reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
0356
0357 i2c@0 {
0358 #address-cells = <1>;
0359 #size-cells = <0>;
0360 reg = <0>;
0361
0362 sfp1: eeprom@50 {
0363 compatible = "atmel,24c02";
0364 reg = <0x50>;
0365 };
0366 };
0367
0368 i2c@1 {
0369 #address-cells = <1>;
0370 #size-cells = <0>;
0371 reg = <1>;
0372
0373 sfp2: eeprom@50 {
0374 compatible = "atmel,24c02";
0375 reg = <0x50>;
0376 };
0377 };
0378
0379 i2c@2 {
0380 #address-cells = <1>;
0381 #size-cells = <0>;
0382 reg = <2>;
0383
0384 sfp3: eeprom@50 {
0385 compatible = "atmel,24c02";
0386 reg = <0x50>;
0387 };
0388 };
0389
0390 i2c@3 {
0391 #address-cells = <1>;
0392 #size-cells = <0>;
0393 reg = <3>;
0394
0395 sfp4: eeprom@50 {
0396 compatible = "atmel,24c02";
0397 reg = <0x50>;
0398 };
0399 };
0400
0401 i2c@4 {
0402 #address-cells = <1>;
0403 #size-cells = <0>;
0404 reg = <4>;
0405 };
0406 };
0407 };
0408
0409 &mdio1 {
0410 clock-frequency = <5000000>;
0411 };
0412
0413 &iomuxc {
0414 pinctrl_gpio_e6185_eeprom_sel: pinctrl-gpio-e6185-eeprom-spi0 {
0415 fsl,pins = <
0416 VF610_PAD_PTE27__GPIO_132 0x33e2
0417 >;
0418 };
0419
0420 pinctrl_gpio_spi0: pinctrl-gpio-spi0 {
0421 fsl,pins = <
0422 VF610_PAD_PTB22__GPIO_44 0x33e2
0423 VF610_PAD_PTB21__GPIO_43 0x33e2
0424 VF610_PAD_PTB20__GPIO_42 0x33e1
0425 VF610_PAD_PTB19__GPIO_41 0x33e2
0426 VF610_PAD_PTB18__GPIO_40 0x33e2
0427 >;
0428 };
0429
0430 pinctrl_mdio_mux: pinctrl-mdio-mux {
0431 fsl,pins = <
0432 VF610_PAD_PTA18__GPIO_8 0x31c2
0433 VF610_PAD_PTA19__GPIO_9 0x31c2
0434 VF610_PAD_PTB2__GPIO_24 0x31c2
0435 VF610_PAD_PTB3__GPIO_25 0x31c2
0436 >;
0437 };
0438
0439 pinctrl_pca9554_22: pinctrl-pca95540-22 {
0440 fsl,pins = <
0441 VF610_PAD_PTB28__GPIO_98 0x219d
0442 >;
0443 };
0444 };
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