0001 // SPDX-License-Identifier: GPL-2.0
0002 #include "versatile-ab.dts"
0003
0004 / {
0005 model = "ARM Versatile PB";
0006 compatible = "arm,versatile-pb";
0007
0008 amba {
0009 /* The Versatile PB is using more SIC IRQ lines than the AB */
0010 sic: interrupt-controller@10003000 {
0011 clear-mask = <0xffffffff>;
0012 /*
0013 * Valid interrupt lines mask according to
0014 * figure 3-30 page 3-74 of ARM DUI 0224B
0015 */
0016 valid-mask = <0x7fe003ff>;
0017 };
0018
0019 gpio2: gpio@101e6000 {
0020 compatible = "arm,pl061", "arm,primecell";
0021 reg = <0x101e6000 0x1000>;
0022 interrupts = <8>;
0023 gpio-controller;
0024 #gpio-cells = <2>;
0025 interrupt-controller;
0026 #interrupt-cells = <2>;
0027 clocks = <&pclk>;
0028 clock-names = "apb_pclk";
0029 };
0030
0031 gpio3: gpio@101e7000 {
0032 compatible = "arm,pl061", "arm,primecell";
0033 reg = <0x101e7000 0x1000>;
0034 interrupts = <9>;
0035 gpio-controller;
0036 #gpio-cells = <2>;
0037 interrupt-controller;
0038 #interrupt-cells = <2>;
0039 clocks = <&pclk>;
0040 clock-names = "apb_pclk";
0041 };
0042
0043 pci@10001000 {
0044 compatible = "arm,versatile-pci";
0045 device_type = "pci";
0046 reg = <0x10001000 0x1000
0047 0x41000000 0x10000
0048 0x42000000 0x100000>;
0049 bus-range = <0 0xff>;
0050 #address-cells = <3>;
0051 #size-cells = <2>;
0052 #interrupt-cells = <1>;
0053
0054 ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */
0055 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */
0056 0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
0057
0058 interrupt-map-mask = <0x1800 0 0 7>;
0059 interrupt-map = <0x1800 0 0 1 &sic 28
0060 0x1800 0 0 2 &sic 29
0061 0x1800 0 0 3 &sic 30
0062 0x1800 0 0 4 &sic 27
0063
0064 0x1000 0 0 1 &sic 27
0065 0x1000 0 0 2 &sic 28
0066 0x1000 0 0 3 &sic 29
0067 0x1000 0 0 4 &sic 30
0068
0069 0x0800 0 0 1 &sic 30
0070 0x0800 0 0 2 &sic 27
0071 0x0800 0 0 3 &sic 28
0072 0x0800 0 0 4 &sic 29
0073
0074 0x0000 0 0 1 &sic 29
0075 0x0000 0 0 2 &sic 30
0076 0x0000 0 0 3 &sic 27
0077 0x0000 0 0 4 &sic 28>;
0078 };
0079
0080 fpga {
0081 mmc@5000 {
0082 /*
0083 * Overrides the interrupt assignment from
0084 * the Versatile AB board file.
0085 */
0086 interrupts-extended = <&sic 22 &sic 23>;
0087 };
0088 uart@9000 {
0089 compatible = "arm,pl011", "arm,primecell";
0090 reg = <0x9000 0x1000>;
0091 interrupt-parent = <&sic>;
0092 interrupts = <6>;
0093 clocks = <&xtal24mhz>, <&pclk>;
0094 clock-names = "uartclk", "apb_pclk";
0095 };
0096 sci@a000 {
0097 compatible = "arm,primecell";
0098 reg = <0xa000 0x1000>;
0099 interrupt-parent = <&sic>;
0100 interrupts = <5>;
0101 clocks = <&xtal24mhz>;
0102 clock-names = "apb_pclk";
0103 };
0104 mmc@b000 {
0105 compatible = "arm,pl180", "arm,primecell";
0106 reg = <0xb000 0x1000>;
0107 interrupt-parent = <&sic>;
0108 interrupts = <1>, <2>;
0109 clocks = <&xtal24mhz>, <&pclk>;
0110 clock-names = "mclk", "apb_pclk";
0111 };
0112 };
0113 };
0114 };
