0001 // SPDX-License-Identifier: GPL-2.0 OR MIT
0002 #include "tegra30.dtsi"
0003
0004 /*
0005 * Toradex Apalis T30 Module Device Tree
0006 * Compatible for Revisions 1GB: V1.1A, V1.1B; 1GB IT: V1.1A, V1.1B;
0007 * 2GB: V1.1A, V1.1B
0008 */
0009 / {
0010 memory@80000000 {
0011 reg = <0x80000000 0x40000000>;
0012 };
0013
0014 pcie@3000 {
0015 status = "okay";
0016 avdd-pexa-supply = <&vdd2_reg>;
0017 avdd-pexb-supply = <&vdd2_reg>;
0018 avdd-pex-pll-supply = <&vdd2_reg>;
0019 avdd-plle-supply = <&ldo6_reg>;
0020 hvdd-pex-supply = <®_module_3v3>;
0021 vddio-pex-ctl-supply = <®_module_3v3>;
0022 vdd-pexa-supply = <&vdd2_reg>;
0023 vdd-pexb-supply = <&vdd2_reg>;
0024
0025 /* Apalis type specific */
0026 pci@1,0 {
0027 nvidia,num-lanes = <4>;
0028 };
0029
0030 /* Apalis PCIe */
0031 pci@2,0 {
0032 nvidia,num-lanes = <1>;
0033 };
0034
0035 /* I210/I211 Gigabit Ethernet Controller (on-module) */
0036 pci@3,0 {
0037 status = "okay";
0038 nvidia,num-lanes = <1>;
0039
0040 ethernet@0,0 {
0041 reg = <0 0 0 0 0>;
0042 local-mac-address = [00 00 00 00 00 00];
0043 };
0044 };
0045 };
0046
0047 host1x@50000000 {
0048 hdmi@54280000 {
0049 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
0050 nvidia,hpd-gpio =
0051 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
0052 pll-supply = <®_1v8_avdd_hdmi_pll>;
0053 vdd-supply = <®_3v3_avdd_hdmi>;
0054 };
0055 };
0056
0057 pinmux@70000868 {
0058 pinctrl-names = "default";
0059 pinctrl-0 = <&state_default>;
0060
0061 state_default: pinmux {
0062 /* Analogue Audio (On-module) */
0063 clk1-out-pw4 {
0064 nvidia,pins = "clk1_out_pw4";
0065 nvidia,function = "extperiph1";
0066 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0067 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0068 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0069 };
0070 dap3-fs-pp0 {
0071 nvidia,pins = "dap3_fs_pp0",
0072 "dap3_sclk_pp3",
0073 "dap3_din_pp1",
0074 "dap3_dout_pp2";
0075 nvidia,function = "i2s2";
0076 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0077 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0078 };
0079
0080 /* Apalis BKL1_ON */
0081 pv2 {
0082 nvidia,pins = "pv2";
0083 nvidia,function = "rsvd4";
0084 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0085 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0086 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0087 };
0088
0089 /* Apalis BKL1_PWM */
0090 uart3-rts-n-pc0 {
0091 nvidia,pins = "uart3_rts_n_pc0";
0092 nvidia,function = "pwm0";
0093 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0094 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0095 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0096 };
0097 /* BKL1_PWM_EN#, disable TPS65911 PMIC PWM backlight */
0098 uart3-cts-n-pa1 {
0099 nvidia,pins = "uart3_cts_n_pa1";
0100 nvidia,function = "rsvd2";
0101 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0102 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0103 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0104 };
0105
0106 /* Apalis CAN1 on SPI6 */
0107 spi2-cs0-n-px3 {
0108 nvidia,pins = "spi2_cs0_n_px3",
0109 "spi2_miso_px1",
0110 "spi2_mosi_px0",
0111 "spi2_sck_px2";
0112 nvidia,function = "spi6";
0113 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0114 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0115 };
0116 /* CAN_INT1 */
0117 spi2-cs1-n-pw2 {
0118 nvidia,pins = "spi2_cs1_n_pw2";
0119 nvidia,function = "spi3";
0120 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0121 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0122 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0123 };
0124
0125 /* Apalis CAN2 on SPI4 */
0126 gmi-a16-pj7 {
0127 nvidia,pins = "gmi_a16_pj7",
0128 "gmi_a17_pb0",
0129 "gmi_a18_pb1",
0130 "gmi_a19_pk7";
0131 nvidia,function = "spi4";
0132 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0133 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0134 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0135 };
0136 /* CAN_INT2 */
0137 spi2-cs2-n-pw3 {
0138 nvidia,pins = "spi2_cs2_n_pw3";
0139 nvidia,function = "spi3";
0140 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0141 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0142 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0143 };
0144
0145 /* Apalis Digital Audio */
0146 clk1-req-pee2 {
0147 nvidia,pins = "clk1_req_pee2";
0148 nvidia,function = "hda";
0149 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0150 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0151 };
0152 clk2-out-pw5 {
0153 nvidia,pins = "clk2_out_pw5";
0154 nvidia,function = "extperiph2";
0155 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0156 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0157 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0158 };
0159 dap1-fs-pn0 {
0160 nvidia,pins = "dap1_fs_pn0",
0161 "dap1_din_pn1",
0162 "dap1_dout_pn2",
0163 "dap1_sclk_pn3";
0164 nvidia,function = "hda";
0165 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0166 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0167 };
0168
0169 /* Apalis GPIO */
0170 kb-col0-pq0 {
0171 nvidia,pins = "kb_col0_pq0",
0172 "kb_col1_pq1",
0173 "kb_row10_ps2",
0174 "kb_row11_ps3",
0175 "kb_row12_ps4",
0176 "kb_row13_ps5",
0177 "kb_row14_ps6",
0178 "kb_row15_ps7";
0179 nvidia,function = "kbc";
0180 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0181 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0182 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0183 };
0184 /* Multiplexed and therefore disabled */
0185 owr {
0186 nvidia,pins = "owr";
0187 nvidia,function = "rsvd3";
0188 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0189 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0190 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0191 };
0192
0193 /* Apalis HDMI1 */
0194 hdmi-cec-pee3 {
0195 nvidia,pins = "hdmi_cec_pee3";
0196 nvidia,function = "cec";
0197 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0198 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0199 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0200 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
0201 };
0202 hdmi-int-pn7 {
0203 nvidia,pins = "hdmi_int_pn7";
0204 nvidia,function = "hdmi";
0205 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0206 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0207 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0208 };
0209
0210 /* Apalis I2C1 */
0211 gen1-i2c-scl-pc4 {
0212 nvidia,pins = "gen1_i2c_scl_pc4",
0213 "gen1_i2c_sda_pc5";
0214 nvidia,function = "i2c1";
0215 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0216 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0217 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0218 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0219 };
0220
0221 /* Apalis I2C2 (DDC) */
0222 ddc-scl-pv4 {
0223 nvidia,pins = "ddc_scl_pv4",
0224 "ddc_sda_pv5";
0225 nvidia,function = "i2c4";
0226 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0227 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0228 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0229 };
0230
0231 /* Apalis I2C3 (CAM) */
0232 cam-i2c-scl-pbb1 {
0233 nvidia,pins = "cam_i2c_scl_pbb1",
0234 "cam_i2c_sda_pbb2";
0235 nvidia,function = "i2c3";
0236 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0237 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0238 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0239 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0240 };
0241
0242 /* Apalis LCD1 */
0243 lcd-d0-pe0 {
0244 nvidia,pins = "lcd_d0_pe0",
0245 "lcd_d1_pe1",
0246 "lcd_d2_pe2",
0247 "lcd_d3_pe3",
0248 "lcd_d4_pe4",
0249 "lcd_d5_pe5",
0250 "lcd_d6_pe6",
0251 "lcd_d7_pe7",
0252 "lcd_d8_pf0",
0253 "lcd_d9_pf1",
0254 "lcd_d10_pf2",
0255 "lcd_d11_pf3",
0256 "lcd_d12_pf4",
0257 "lcd_d13_pf5",
0258 "lcd_d14_pf6",
0259 "lcd_d15_pf7",
0260 "lcd_d16_pm0",
0261 "lcd_d17_pm1",
0262 "lcd_d18_pm2",
0263 "lcd_d19_pm3",
0264 "lcd_d20_pm4",
0265 "lcd_d21_pm5",
0266 "lcd_d22_pm6",
0267 "lcd_d23_pm7",
0268 "lcd_de_pj1",
0269 "lcd_hsync_pj3",
0270 "lcd_pclk_pb3",
0271 "lcd_vsync_pj4";
0272 nvidia,function = "displaya";
0273 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0274 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0275 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0276 };
0277
0278 /* Apalis MMC1 */
0279 sdmmc3-clk-pa6 {
0280 nvidia,pins = "sdmmc3_clk_pa6";
0281 nvidia,function = "sdmmc3";
0282 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0283 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0284 };
0285 sdmmc3-dat0-pb7 {
0286 nvidia,pins = "sdmmc3_cmd_pa7",
0287 "sdmmc3_dat0_pb7",
0288 "sdmmc3_dat1_pb6",
0289 "sdmmc3_dat2_pb5",
0290 "sdmmc3_dat3_pb4",
0291 "sdmmc3_dat4_pd1",
0292 "sdmmc3_dat5_pd0",
0293 "sdmmc3_dat6_pd3",
0294 "sdmmc3_dat7_pd4";
0295 nvidia,function = "sdmmc3";
0296 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0297 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0298 };
0299 /* Apalis MMC1_CD# */
0300 pv3 {
0301 nvidia,pins = "pv3";
0302 nvidia,function = "rsvd2";
0303 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0304 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0305 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0306 };
0307
0308 /* Apalis Parallel Camera */
0309 cam-mclk-pcc0 {
0310 nvidia,pins = "cam_mclk_pcc0";
0311 nvidia,function = "vi_alt3";
0312 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0313 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0314 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0315 };
0316 vi-vsync-pd6 {
0317 nvidia,pins = "vi_d0_pt4",
0318 "vi_d1_pd5",
0319 "vi_d2_pl0",
0320 "vi_d3_pl1",
0321 "vi_d4_pl2",
0322 "vi_d5_pl3",
0323 "vi_d6_pl4",
0324 "vi_d7_pl5",
0325 "vi_d8_pl6",
0326 "vi_d9_pl7",
0327 "vi_d10_pt2",
0328 "vi_d11_pt3",
0329 "vi_hsync_pd7",
0330 "vi_pclk_pt0",
0331 "vi_vsync_pd6";
0332 nvidia,function = "vi";
0333 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0334 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0335 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0336 };
0337 /* Multiplexed and therefore disabled */
0338 kb-col2-pq2 {
0339 nvidia,pins = "kb_col2_pq2",
0340 "kb_col3_pq3",
0341 "kb_col4_pq4",
0342 "kb_row4_pr4";
0343 nvidia,function = "rsvd4";
0344 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0345 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0346 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0347 };
0348 kb-row0-pr0 {
0349 nvidia,pins = "kb_row0_pr0",
0350 "kb_row1_pr1",
0351 "kb_row2_pr2",
0352 "kb_row3_pr3";
0353 nvidia,function = "rsvd3";
0354 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0355 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0356 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0357 };
0358 kb-row5-pr5 {
0359 nvidia,pins = "kb_row5_pr5",
0360 "kb_row6_pr6",
0361 "kb_row7_pr7";
0362 nvidia,function = "kbc";
0363 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0364 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0365 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0366 };
0367 /*
0368 * VI level-shifter direction
0369 * (pull-down => default direction input)
0370 */
0371 vi-mclk-pt1 {
0372 nvidia,pins = "vi_mclk_pt1";
0373 nvidia,function = "vi_alt3";
0374 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0375 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0376 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0377 };
0378
0379 /* Apalis PWM1 */
0380 pu6 {
0381 nvidia,pins = "pu6";
0382 nvidia,function = "pwm3";
0383 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0384 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0385 };
0386
0387 /* Apalis PWM2 */
0388 pu5 {
0389 nvidia,pins = "pu5";
0390 nvidia,function = "pwm2";
0391 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0392 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0393 };
0394
0395 /* Apalis PWM3 */
0396 pu4 {
0397 nvidia,pins = "pu4";
0398 nvidia,function = "pwm1";
0399 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0400 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0401 };
0402
0403 /* Apalis PWM4 */
0404 pu3 {
0405 nvidia,pins = "pu3";
0406 nvidia,function = "pwm0";
0407 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0408 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0409 };
0410
0411 /* Apalis RESET_MOCI# */
0412 gmi-rst-n-pi4 {
0413 nvidia,pins = "gmi_rst_n_pi4";
0414 nvidia,function = "gmi";
0415 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0416 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0417 };
0418
0419 /* Apalis SATA1_ACT# */
0420 pex-l0-prsnt-n-pdd0 {
0421 nvidia,pins = "pex_l0_prsnt_n_pdd0";
0422 nvidia,function = "rsvd3";
0423 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0424 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0425 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0426 };
0427
0428 /* Apalis SD1 */
0429 sdmmc1-clk-pz0 {
0430 nvidia,pins = "sdmmc1_clk_pz0";
0431 nvidia,function = "sdmmc1";
0432 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0433 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0434 };
0435 sdmmc1-cmd-pz1 {
0436 nvidia,pins = "sdmmc1_cmd_pz1",
0437 "sdmmc1_dat0_py7",
0438 "sdmmc1_dat1_py6",
0439 "sdmmc1_dat2_py5",
0440 "sdmmc1_dat3_py4";
0441 nvidia,function = "sdmmc1";
0442 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0443 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0444 };
0445 /* Apalis SD1_CD# */
0446 clk2-req-pcc5 {
0447 nvidia,pins = "clk2_req_pcc5";
0448 nvidia,function = "rsvd2";
0449 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0450 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0451 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0452 };
0453
0454 /* Apalis SPDIF1 */
0455 spdif-out-pk5 {
0456 nvidia,pins = "spdif_out_pk5",
0457 "spdif_in_pk6";
0458 nvidia,function = "spdif";
0459 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0460 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0461 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0462 };
0463
0464 /* Apalis SPI1 */
0465 spi1-sck-px5 {
0466 nvidia,pins = "spi1_sck_px5",
0467 "spi1_mosi_px4",
0468 "spi1_miso_px7",
0469 "spi1_cs0_n_px6";
0470 nvidia,function = "spi1";
0471 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0472 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0473 };
0474
0475 /* Apalis SPI2 */
0476 lcd-sck-pz4 {
0477 nvidia,pins = "lcd_sck_pz4",
0478 "lcd_sdout_pn5",
0479 "lcd_sdin_pz2",
0480 "lcd_cs0_n_pn4";
0481 nvidia,function = "spi5";
0482 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0483 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0484 };
0485
0486 /*
0487 * Apalis TS (Low-speed type specific)
0488 * pins may be used as GPIOs
0489 */
0490 kb-col5-pq5 {
0491 nvidia,pins = "kb_col5_pq5";
0492 nvidia,function = "rsvd4";
0493 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0494 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0495 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0496 };
0497 kb-col6-pq6 {
0498 nvidia,pins = "kb_col6_pq6",
0499 "kb_col7_pq7",
0500 "kb_row8_ps0",
0501 "kb_row9_ps1";
0502 nvidia,function = "kbc";
0503 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0504 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0505 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0506 };
0507
0508 /* Apalis UART1 */
0509 ulpi-data0 {
0510 nvidia,pins = "ulpi_data0_po1",
0511 "ulpi_data1_po2",
0512 "ulpi_data2_po3",
0513 "ulpi_data3_po4",
0514 "ulpi_data4_po5",
0515 "ulpi_data5_po6",
0516 "ulpi_data6_po7",
0517 "ulpi_data7_po0";
0518 nvidia,function = "uarta";
0519 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0520 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0521 };
0522
0523 /* Apalis UART2 */
0524 ulpi-clk-py0 {
0525 nvidia,pins = "ulpi_clk_py0",
0526 "ulpi_dir_py1",
0527 "ulpi_nxt_py2",
0528 "ulpi_stp_py3";
0529 nvidia,function = "uartd";
0530 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0531 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0532 };
0533
0534 /* Apalis UART3 */
0535 uart2-rxd-pc3 {
0536 nvidia,pins = "uart2_rxd_pc3",
0537 "uart2_txd_pc2";
0538 nvidia,function = "uartb";
0539 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0540 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0541 };
0542
0543 /* Apalis UART4 */
0544 uart3-rxd-pw7 {
0545 nvidia,pins = "uart3_rxd_pw7",
0546 "uart3_txd_pw6";
0547 nvidia,function = "uartc";
0548 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0549 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0550 };
0551
0552 /* Apalis USBH_EN */
0553 pex-l0-rst-n-pdd1 {
0554 nvidia,pins = "pex_l0_rst_n_pdd1";
0555 nvidia,function = "rsvd3";
0556 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0557 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0558 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0559 };
0560
0561 /* Apalis USBH_OC# */
0562 pex-l0-clkreq-n-pdd2 {
0563 nvidia,pins = "pex_l0_clkreq_n_pdd2";
0564 nvidia,function = "rsvd3";
0565 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0566 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0567 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0568 };
0569
0570 /* Apalis USBO1_EN */
0571 gen2-i2c-scl-pt5 {
0572 nvidia,pins = "gen2_i2c_scl_pt5";
0573 nvidia,function = "rsvd4";
0574 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
0575 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0576 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0577 };
0578
0579 /* Apalis USBO1_OC# */
0580 gen2-i2c-sda-pt6 {
0581 nvidia,pins = "gen2_i2c_sda_pt6";
0582 nvidia,function = "rsvd4";
0583 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
0584 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0585 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0586 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0587 };
0588
0589 /* Apalis VGA1 not supported and therefore disabled */
0590 crt-hsync-pv6 {
0591 nvidia,pins = "crt_hsync_pv6",
0592 "crt_vsync_pv7";
0593 nvidia,function = "rsvd2";
0594 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0595 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0596 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0597 };
0598
0599 /* Apalis WAKE1_MICO */
0600 pv1 {
0601 nvidia,pins = "pv1";
0602 nvidia,function = "rsvd1";
0603 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0604 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0605 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0606 };
0607
0608 /* eMMC (On-module) */
0609 sdmmc4-clk-pcc4 {
0610 nvidia,pins = "sdmmc4_clk_pcc4",
0611 "sdmmc4_cmd_pt7",
0612 "sdmmc4_rst_n_pcc3";
0613 nvidia,function = "sdmmc4";
0614 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0615 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0616 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0617 };
0618 sdmmc4-dat0-paa0 {
0619 nvidia,pins = "sdmmc4_dat0_paa0",
0620 "sdmmc4_dat1_paa1",
0621 "sdmmc4_dat2_paa2",
0622 "sdmmc4_dat3_paa3",
0623 "sdmmc4_dat4_paa4",
0624 "sdmmc4_dat5_paa5",
0625 "sdmmc4_dat6_paa6",
0626 "sdmmc4_dat7_paa7";
0627 nvidia,function = "sdmmc4";
0628 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0629 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0630 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0631 };
0632
0633 /* EN_+3.3_SDMMC3 */
0634 uart2-cts-n-pj5 {
0635 nvidia,pins = "uart2_cts_n_pj5";
0636 nvidia,function = "gmi";
0637 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0638 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0639 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0640 };
0641
0642 /* LAN i210/i211 DEV_OFF_N, PE_RST_N (On-module) */
0643 pex-l2-prsnt-n-pdd7 {
0644 nvidia,pins = "pex_l2_prsnt_n_pdd7",
0645 "pex_l2_rst_n_pcc6";
0646 nvidia,function = "pcie";
0647 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0648 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0649 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0650 };
0651 /* LAN i210/i211 PE_WAKE_N, SDP3 (On-module) */
0652 pex-wake-n-pdd3 {
0653 nvidia,pins = "pex_wake_n_pdd3",
0654 "pex_l2_clkreq_n_pcc7";
0655 nvidia,function = "pcie";
0656 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0657 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0658 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0659 };
0660 /* LAN i210/i211 SMB_ALERT_N (On-module) */
0661 sys-clk-req-pz5 {
0662 nvidia,pins = "sys_clk_req_pz5";
0663 nvidia,function = "rsvd2";
0664 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0665 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0666 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0667 };
0668
0669 /* LVDS Transceiver Configuration */
0670 pbb0 {
0671 nvidia,pins = "pbb0",
0672 "pbb7",
0673 "pcc1",
0674 "pcc2";
0675 nvidia,function = "rsvd2";
0676 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0677 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0678 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0679 };
0680 pbb3 {
0681 nvidia,pins = "pbb3",
0682 "pbb4",
0683 "pbb5",
0684 "pbb6";
0685 nvidia,function = "displayb";
0686 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0687 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0688 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0689 };
0690
0691 /* Not connected and therefore disabled */
0692 clk-32k-out-pa0 {
0693 nvidia,pins = "clk3_out_pee0",
0694 "clk3_req_pee1",
0695 "clk_32k_out_pa0",
0696 "dap4_din_pp5",
0697 "dap4_dout_pp6",
0698 "dap4_fs_pp4",
0699 "dap4_sclk_pp7";
0700 nvidia,function = "rsvd2";
0701 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0702 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0703 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0704 };
0705 dap2-fs-pa2 {
0706 nvidia,pins = "dap2_fs_pa2",
0707 "dap2_sclk_pa3",
0708 "dap2_din_pa4",
0709 "dap2_dout_pa5",
0710 "lcd_dc0_pn6",
0711 "lcd_m1_pw1",
0712 "lcd_pwr1_pc1",
0713 "pex_l1_clkreq_n_pdd6",
0714 "pex_l1_prsnt_n_pdd4",
0715 "pex_l1_rst_n_pdd5";
0716 nvidia,function = "rsvd3";
0717 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0718 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0719 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0720 };
0721 gmi-ad0-pg0 {
0722 nvidia,pins = "gmi_ad0_pg0",
0723 "gmi_ad2_pg2",
0724 "gmi_ad3_pg3",
0725 "gmi_ad4_pg4",
0726 "gmi_ad5_pg5",
0727 "gmi_ad6_pg6",
0728 "gmi_ad7_pg7",
0729 "gmi_ad8_ph0",
0730 "gmi_ad9_ph1",
0731 "gmi_ad10_ph2",
0732 "gmi_ad11_ph3",
0733 "gmi_ad12_ph4",
0734 "gmi_ad13_ph5",
0735 "gmi_ad14_ph6",
0736 "gmi_ad15_ph7",
0737 "gmi_adv_n_pk0",
0738 "gmi_clk_pk1",
0739 "gmi_cs4_n_pk2",
0740 "gmi_cs2_n_pk3",
0741 "gmi_dqs_pi2",
0742 "gmi_iordy_pi5",
0743 "gmi_oe_n_pi1",
0744 "gmi_wait_pi7",
0745 "gmi_wr_n_pi0",
0746 "lcd_cs1_n_pw0",
0747 "pu0",
0748 "pu1",
0749 "pu2";
0750 nvidia,function = "rsvd4";
0751 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0752 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0753 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0754 };
0755 gmi-cs0-n-pj0 {
0756 nvidia,pins = "gmi_cs0_n_pj0",
0757 "gmi_cs1_n_pj2",
0758 "gmi_cs3_n_pk4";
0759 nvidia,function = "rsvd1";
0760 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0761 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0762 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0763 };
0764 gmi-cs6-n-pi3 {
0765 nvidia,pins = "gmi_cs6_n_pi3";
0766 nvidia,function = "sata";
0767 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0768 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0769 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0770 };
0771 gmi-cs7-n-pi6 {
0772 nvidia,pins = "gmi_cs7_n_pi6";
0773 nvidia,function = "gmi_alt";
0774 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0775 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0776 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0777 };
0778 lcd-pwr0-pb2 {
0779 nvidia,pins = "lcd_pwr0_pb2",
0780 "lcd_pwr2_pc6",
0781 "lcd_wr_n_pz3";
0782 nvidia,function = "hdcp";
0783 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0784 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0785 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0786 };
0787 uart2-rts-n-pj6 {
0788 nvidia,pins = "uart2_rts_n_pj6";
0789 nvidia,function = "gmi";
0790 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0791 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0792 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0793 };
0794
0795 /* Power I2C (On-module) */
0796 pwr-i2c-scl-pz6 {
0797 nvidia,pins = "pwr_i2c_scl_pz6",
0798 "pwr_i2c_sda_pz7";
0799 nvidia,function = "i2cpwr";
0800 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0801 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0802 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0803 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0804 };
0805
0806 /*
0807 * THERMD_ALERT#, unlatched I2C address pin of LM95245
0808 * temperature sensor therefore requires disabling for
0809 * now
0810 */
0811 lcd-dc1-pd2 {
0812 nvidia,pins = "lcd_dc1_pd2";
0813 nvidia,function = "rsvd3";
0814 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0815 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0816 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0817 };
0818
0819 /* TOUCH_PEN_INT# (On-module) */
0820 pv0 {
0821 nvidia,pins = "pv0";
0822 nvidia,function = "rsvd1";
0823 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0824 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0825 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0826 };
0827 };
0828 };
0829
0830 serial@70006040 {
0831 compatible = "nvidia,tegra30-hsuart";
0832 /delete-property/ reg-shift;
0833 };
0834
0835 serial@70006200 {
0836 compatible = "nvidia,tegra30-hsuart";
0837 /delete-property/ reg-shift;
0838 };
0839
0840 serial@70006300 {
0841 compatible = "nvidia,tegra30-hsuart";
0842 /delete-property/ reg-shift;
0843 };
0844
0845 hdmi_ddc: i2c@7000c700 {
0846 clock-frequency = <10000>;
0847 };
0848
0849 /*
0850 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
0851 * touch screen controller
0852 */
0853 i2c@7000d000 {
0854 status = "okay";
0855 clock-frequency = <100000>;
0856
0857 /* SGTL5000 audio codec */
0858 sgtl5000: codec@a {
0859 compatible = "fsl,sgtl5000";
0860 reg = <0x0a>;
0861 #sound-dai-cells = <0>;
0862 VDDA-supply = <®_module_3v3_audio>;
0863 VDDD-supply = <®_1v8_vio>;
0864 VDDIO-supply = <®_module_3v3>;
0865 clocks = <&tegra_car TEGRA30_CLK_EXTERN1>;
0866 };
0867
0868 pmic: pmic@2d {
0869 compatible = "ti,tps65911";
0870 reg = <0x2d>;
0871
0872 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
0873 #interrupt-cells = <2>;
0874 interrupt-controller;
0875
0876 ti,system-power-controller;
0877
0878 #gpio-cells = <2>;
0879 gpio-controller;
0880
0881 vcc1-supply = <®_module_3v3>;
0882 vcc2-supply = <®_module_3v3>;
0883 vcc3-supply = <®_1v8_vio>;
0884 vcc4-supply = <®_module_3v3>;
0885 vcc5-supply = <®_module_3v3>;
0886 vcc6-supply = <®_1v8_vio>;
0887 vcc7-supply = <®_5v0_charge_pump>;
0888 vccio-supply = <®_module_3v3>;
0889
0890 regulators {
0891 vdd1_reg: vdd1 {
0892 regulator-name = "+V1.35_VDDIO_DDR";
0893 regulator-min-microvolt = <1350000>;
0894 regulator-max-microvolt = <1350000>;
0895 regulator-always-on;
0896 };
0897
0898 vdd2_reg: vdd2 {
0899 regulator-name = "+V1.05";
0900 regulator-min-microvolt = <1050000>;
0901 regulator-max-microvolt = <1050000>;
0902 };
0903
0904 vddctrl_reg: vddctrl {
0905 regulator-name = "+V1.0_VDD_CPU";
0906 regulator-min-microvolt = <1150000>;
0907 regulator-max-microvolt = <1150000>;
0908 regulator-always-on;
0909 };
0910
0911 reg_1v8_vio: vio {
0912 regulator-name = "+V1.8";
0913 regulator-min-microvolt = <1800000>;
0914 regulator-max-microvolt = <1800000>;
0915 regulator-always-on;
0916 };
0917
0918 /*
0919 * 1.8 volt +VDDIO_SDMMC3 in case EN_+3.3_SDMMC3
0920 * is off
0921 */
0922 vddio_sdmmc_1v8_reg: ldo1 {
0923 regulator-name = "+VDDIO_SDMMC3_1V8";
0924 regulator-min-microvolt = <1800000>;
0925 regulator-max-microvolt = <1800000>;
0926 regulator-always-on;
0927 };
0928
0929 /*
0930 * EN_+V3.3 switching via FET:
0931 * +V3.3_AUDIO_AVDD_S, +V3.3
0932 * see also +V3.3 fixed supply
0933 */
0934 ldo2_reg: ldo2 {
0935 regulator-name = "EN_+V3.3";
0936 regulator-min-microvolt = <3300000>;
0937 regulator-max-microvolt = <3300000>;
0938 regulator-always-on;
0939 };
0940
0941 ldo3_reg: ldo3 {
0942 regulator-name = "+V1.2_CSI";
0943 regulator-min-microvolt = <1200000>;
0944 regulator-max-microvolt = <1200000>;
0945 };
0946
0947 ldo4_reg: ldo4 {
0948 regulator-name = "+V1.2_VDD_RTC";
0949 regulator-min-microvolt = <1200000>;
0950 regulator-max-microvolt = <1200000>;
0951 regulator-always-on;
0952 };
0953
0954 /*
0955 * +V2.8_AVDD_VDAC:
0956 * only required for (unsupported) analog RGB
0957 */
0958 ldo5_reg: ldo5 {
0959 regulator-name = "+V2.8_AVDD_VDAC";
0960 regulator-min-microvolt = <2800000>;
0961 regulator-max-microvolt = <2800000>;
0962 regulator-always-on;
0963 };
0964
0965 /*
0966 * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V
0967 * but LDO6 can't set voltage in 50mV
0968 * granularity
0969 */
0970 ldo6_reg: ldo6 {
0971 regulator-name = "+V1.05_AVDD_PLLE";
0972 regulator-min-microvolt = <1100000>;
0973 regulator-max-microvolt = <1100000>;
0974 };
0975
0976 ldo7_reg: ldo7 {
0977 regulator-name = "+V1.2_AVDD_PLL";
0978 regulator-min-microvolt = <1200000>;
0979 regulator-max-microvolt = <1200000>;
0980 regulator-always-on;
0981 };
0982
0983 ldo8_reg: ldo8 {
0984 regulator-name = "+V1.0_VDD_DDR_HS";
0985 regulator-min-microvolt = <1000000>;
0986 regulator-max-microvolt = <1000000>;
0987 regulator-always-on;
0988 };
0989 };
0990 };
0991
0992 /* STMPE811 touch screen controller */
0993 touchscreen@41 {
0994 compatible = "st,stmpe811";
0995 reg = <0x41>;
0996 irq-gpio = <&gpio TEGRA_GPIO(V, 0) IRQ_TYPE_LEVEL_LOW>;
0997 interrupt-controller;
0998 id = <0>;
0999 blocks = <0x5>;
1000 irq-trigger = <0x1>;
1001 /* 3.25 MHz ADC clock speed */
1002 st,adc-freq = <1>;
1003 /* 12-bit ADC */
1004 st,mod-12b = <1>;
1005 /* internal ADC reference */
1006 st,ref-sel = <0>;
1007 /* ADC converstion time: 80 clocks */
1008 st,sample-time = <4>;
1009
1010 stmpe_touchscreen {
1011 compatible = "st,stmpe-ts";
1012 /* 8 sample average control */
1013 st,ave-ctrl = <3>;
1014 /* 7 length fractional part in z */
1015 st,fraction-z = <7>;
1016 /*
1017 * 50 mA typical 80 mA max touchscreen drivers
1018 * current limit value
1019 */
1020 st,i-drive = <1>;
1021 /* 1 ms panel driver settling time */
1022 st,settling = <3>;
1023 /* 5 ms touch detect interrupt delay */
1024 st,touch-det-delay = <5>;
1025 };
1026
1027 stmpe_adc {
1028 compatible = "st,stmpe-adc";
1029 /* forbid to use ADC channels 3-0 (touch) */
1030 st,norequest-mask = <0x0F>;
1031 };
1032 };
1033
1034 /*
1035 * LM95245 temperature sensor
1036 * Note: OVERT1# directly connected to TPS65911 PMIC PWRDN
1037 */
1038 temp-sensor@4c {
1039 compatible = "national,lm95245";
1040 reg = <0x4c>;
1041 };
1042
1043 /* SW: +V1.2_VDD_CORE */
1044 regulator@60 {
1045 compatible = "ti,tps62362";
1046 reg = <0x60>;
1047
1048 regulator-name = "tps62362-vout";
1049 regulator-min-microvolt = <900000>;
1050 regulator-max-microvolt = <1400000>;
1051 regulator-boot-on;
1052 regulator-always-on;
1053 };
1054 };
1055
1056 /* SPI4: CAN2 */
1057 spi@7000da00 {
1058 status = "okay";
1059 spi-max-frequency = <10000000>;
1060
1061 can@1 {
1062 compatible = "microchip,mcp2515";
1063 reg = <1>;
1064 clocks = <&clk16m>;
1065 interrupt-parent = <&gpio>;
1066 interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
1067 spi-max-frequency = <10000000>;
1068 };
1069 };
1070
1071 /* SPI6: CAN1 */
1072 spi@7000de00 {
1073 status = "okay";
1074 spi-max-frequency = <10000000>;
1075
1076 can@0 {
1077 compatible = "microchip,mcp2515";
1078 reg = <0>;
1079 clocks = <&clk16m>;
1080 interrupt-parent = <&gpio>;
1081 interrupts = <TEGRA_GPIO(W, 2) IRQ_TYPE_EDGE_FALLING>;
1082 spi-max-frequency = <10000000>;
1083 };
1084 };
1085
1086 pmc@7000e400 {
1087 nvidia,invert-interrupt;
1088 nvidia,suspend-mode = <1>;
1089 nvidia,cpu-pwr-good-time = <5000>;
1090 nvidia,cpu-pwr-off-time = <5000>;
1091 nvidia,core-pwr-good-time = <3845 3845>;
1092 nvidia,core-pwr-off-time = <0>;
1093 nvidia,core-power-req-active-high;
1094 nvidia,sys-clock-req-active-high;
1095
1096 /* Set DEV_OFF bit in DCDC control register of TPS65911 PMIC */
1097 i2c-thermtrip {
1098 nvidia,i2c-controller-id = <4>;
1099 nvidia,bus-addr = <0x2d>;
1100 nvidia,reg-addr = <0x3f>;
1101 nvidia,reg-data = <0x1>;
1102 };
1103 };
1104
1105 hda@70030000 {
1106 status = "okay";
1107 };
1108
1109 ahub@70080000 {
1110 i2s@70080500 {
1111 status = "okay";
1112 };
1113 };
1114
1115 /* eMMC */
1116 mmc@78000600 {
1117 status = "okay";
1118 bus-width = <8>;
1119 non-removable;
1120 vmmc-supply = <®_module_3v3>; /* VCC */
1121 vqmmc-supply = <®_1v8_vio>; /* VCCQ */
1122 mmc-ddr-1_8v;
1123 };
1124
1125 clk32k_in: xtal1 {
1126 compatible = "fixed-clock";
1127 #clock-cells = <0>;
1128 clock-frequency = <32768>;
1129 };
1130
1131 clk16m: osc4 {
1132 compatible = "fixed-clock";
1133 #clock-cells = <0>;
1134 clock-frequency = <16000000>;
1135 };
1136
1137 reg_1v8_avdd_hdmi_pll: regulator-1v8-avdd-hdmi-pll {
1138 compatible = "regulator-fixed";
1139 regulator-name = "+V1.8_AVDD_HDMI_PLL";
1140 regulator-min-microvolt = <1800000>;
1141 regulator-max-microvolt = <1800000>;
1142 enable-active-high;
1143 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
1144 vin-supply = <®_1v8_vio>;
1145 };
1146
1147 reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
1148 compatible = "regulator-fixed";
1149 regulator-name = "+V3.3_AVDD_HDMI";
1150 regulator-min-microvolt = <3300000>;
1151 regulator-max-microvolt = <3300000>;
1152 enable-active-high;
1153 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
1154 vin-supply = <®_module_3v3>;
1155 };
1156
1157 reg_5v0_charge_pump: regulator-5v0-charge-pump {
1158 compatible = "regulator-fixed";
1159 regulator-name = "+V5.0";
1160 regulator-min-microvolt = <5000000>;
1161 regulator-max-microvolt = <5000000>;
1162 regulator-always-on;
1163 };
1164
1165 reg_module_3v3: regulator-module-3v3 {
1166 compatible = "regulator-fixed";
1167 regulator-name = "+V3.3";
1168 regulator-min-microvolt = <3300000>;
1169 regulator-max-microvolt = <3300000>;
1170 regulator-always-on;
1171 };
1172
1173 reg_module_3v3_audio: regulator-module-3v3-audio {
1174 compatible = "regulator-fixed";
1175 regulator-name = "+V3.3_AUDIO_AVDD_S";
1176 regulator-min-microvolt = <3300000>;
1177 regulator-max-microvolt = <3300000>;
1178 regulator-always-on;
1179 };
1180
1181 sound {
1182 compatible = "toradex,tegra-audio-sgtl5000-apalis_t30",
1183 "nvidia,tegra-audio-sgtl5000";
1184 nvidia,model = "Toradex Apalis T30";
1185 nvidia,audio-routing =
1186 "Headphone Jack", "HP_OUT",
1187 "LINE_IN", "Line In Jack",
1188 "MIC_IN", "Mic Jack";
1189 nvidia,i2s-controller = <&tegra_i2s2>;
1190 nvidia,audio-codec = <&sgtl5000>;
1191 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
1192 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1193 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1194 clock-names = "pll_a", "pll_a_out0", "mclk";
1195
1196 assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
1197 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1198
1199 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1200 <&tegra_car TEGRA30_CLK_EXTERN1>;
1201 };
1202 };
