OSCL-LXR |
|
|
|
|||
0001 // SPDX-License-Identifier: GPL-2.0
0002 #include "tegra20.dtsi"
0003
0004 / {
0005 model = "Avionic Design Tamonten SOM";
0006 compatible = "ad,tamonten", "nvidia,tegra20";
0007
0008 aliases {
0009 rtc0 = "/i2c@7000d000/tps6586x@34";
0010 rtc1 = "/rtc@7000e000";
0011 serial0 = &uartd;
0012 };
0013
0014 chosen {
0015 stdout-path = "serial0:115200n8";
0016 };
0017
0018 memory@0 {
0019 reg = <0x00000000 0x20000000>;
0020 };
0021
0022 host1x@50000000 {
0023 hdmi@54280000 {
0024 vdd-supply = <&hdmi_vdd_reg>;
0025 pll-supply = <&hdmi_pll_reg>;
0026
0027 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
0028 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
0029 GPIO_ACTIVE_HIGH>;
0030 };
0031 };
0032
0033 pinmux@70000014 {
0034 pinctrl-names = "default";
0035 pinctrl-0 = <&state_default>;
0036
0037 state_default: pinmux {
0038 ata {
0039 nvidia,pins = "ata";
0040 nvidia,function = "ide";
0041 };
0042 atb {
0043 nvidia,pins = "atb", "gma", "gme";
0044 nvidia,function = "sdio4";
0045 };
0046 atc {
0047 nvidia,pins = "atc";
0048 nvidia,function = "nand";
0049 };
0050 atd {
0051 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
0052 "spia", "spib", "spic";
0053 nvidia,function = "gmi";
0054 };
0055 cdev1 {
0056 nvidia,pins = "cdev1";
0057 nvidia,function = "plla_out";
0058 };
0059 cdev2 {
0060 nvidia,pins = "cdev2";
0061 nvidia,function = "pllp_out4";
0062 };
0063 crtp {
0064 nvidia,pins = "crtp";
0065 nvidia,function = "crt";
0066 };
0067 csus {
0068 nvidia,pins = "csus";
0069 nvidia,function = "vi_sensor_clk";
0070 };
0071 dap1 {
0072 nvidia,pins = "dap1";
0073 nvidia,function = "dap1";
0074 };
0075 dap2 {
0076 nvidia,pins = "dap2";
0077 nvidia,function = "dap2";
0078 };
0079 dap3 {
0080 nvidia,pins = "dap3";
0081 nvidia,function = "dap3";
0082 };
0083 dap4 {
0084 nvidia,pins = "dap4";
0085 nvidia,function = "dap4";
0086 };
0087 dta {
0088 nvidia,pins = "dta", "dtd";
0089 nvidia,function = "sdio2";
0090 };
0091 dtb {
0092 nvidia,pins = "dtb", "dtc", "dte";
0093 nvidia,function = "rsvd1";
0094 };
0095 dtf {
0096 nvidia,pins = "dtf";
0097 nvidia,function = "i2c3";
0098 };
0099 gmc {
0100 nvidia,pins = "gmc";
0101 nvidia,function = "uartd";
0102 };
0103 gpu7 {
0104 nvidia,pins = "gpu7";
0105 nvidia,function = "rtck";
0106 };
0107 gpv {
0108 nvidia,pins = "gpv", "slxa", "slxk";
0109 nvidia,function = "pcie";
0110 };
0111 hdint {
0112 nvidia,pins = "hdint";
0113 nvidia,function = "hdmi";
0114 };
0115 i2cp {
0116 nvidia,pins = "i2cp";
0117 nvidia,function = "i2cp";
0118 };
0119 irrx {
0120 nvidia,pins = "irrx", "irtx";
0121 nvidia,function = "uarta";
0122 };
0123 kbca {
0124 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
0125 "kbce", "kbcf";
0126 nvidia,function = "kbc";
0127 };
0128 lcsn {
0129 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
0130 "ld3", "ld4", "ld5", "ld6", "ld7",
0131 "ld8", "ld9", "ld10", "ld11", "ld12",
0132 "ld13", "ld14", "ld15", "ld16", "ld17",
0133 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
0134 "lhs", "lm0", "lm1", "lpp", "lpw0",
0135 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
0136 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
0137 "lvs";
0138 nvidia,function = "displaya";
0139 };
0140 owc {
0141 nvidia,pins = "owc", "spdi", "spdo", "uac";
0142 nvidia,function = "rsvd2";
0143 };
0144 pmc {
0145 nvidia,pins = "pmc";
0146 nvidia,function = "pwr_on";
0147 };
0148 rm {
0149 nvidia,pins = "rm";
0150 nvidia,function = "i2c1";
0151 };
0152 sdb {
0153 nvidia,pins = "sdb", "sdc", "sdd";
0154 nvidia,function = "pwm";
0155 };
0156 sdio1 {
0157 nvidia,pins = "sdio1";
0158 nvidia,function = "sdio1";
0159 };
0160 slxc {
0161 nvidia,pins = "slxc", "slxd";
0162 nvidia,function = "spdif";
0163 };
0164 spid {
0165 nvidia,pins = "spid", "spie", "spif";
0166 nvidia,function = "spi1";
0167 };
0168 spig {
0169 nvidia,pins = "spig", "spih";
0170 nvidia,function = "spi2_alt";
0171 };
0172 uaa {
0173 nvidia,pins = "uaa", "uab", "uda";
0174 nvidia,function = "ulpi";
0175 };
0176 uad {
0177 nvidia,pins = "uad";
0178 nvidia,function = "irda";
0179 };
0180 uca {
0181 nvidia,pins = "uca", "ucb";
0182 nvidia,function = "uartc";
0183 };
0184 conf_ata {
0185 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
0186 "cdev1", "cdev2", "dap1", "dtb", "dtf",
0187 "gma", "gmb", "gmc", "gmd", "gme", "gpu7",
0188 "gpv", "i2cp", "irrx", "irtx", "pta",
0189 "rm", "slxa", "slxk", "spia", "spib",
0190 "uac";
0191 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0192 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0193 };
0194 conf_ck32 {
0195 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
0196 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
0197 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0198 };
0199 conf_csus {
0200 nvidia,pins = "csus", "spid", "spif";
0201 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0202 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0203 };
0204 conf_crtp {
0205 nvidia,pins = "crtp", "dap2", "dap3", "dap4",
0206 "dtc", "dte", "gpu", "sdio1",
0207 "slxc", "slxd", "spdi", "spdo", "spig",
0208 "uda";
0209 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0210 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0211 };
0212 conf_ddc {
0213 nvidia,pins = "ddc", "dta", "dtd", "kbca",
0214 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
0215 "sdc", "uad", "uca";
0216 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0217 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0218 };
0219 conf_hdint {
0220 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
0221 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
0222 "lvp0", "owc", "sdb";
0223 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0224 };
0225 conf_sdd {
0226 nvidia,pins = "sdd", "spic", "spie", "spih",
0227 "uaa", "uab", "ucb";
0228 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0229 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0230 };
0231 conf_lc {
0232 nvidia,pins = "lc", "ls";
0233 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0234 };
0235 conf_ld0 {
0236 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
0237 "ld5", "ld6", "ld7", "ld8", "ld9",
0238 "ld10", "ld11", "ld12", "ld13", "ld14",
0239 "ld15", "ld16", "ld17", "ldi", "lhp0",
0240 "lhp1", "lhp2", "lhs", "lm0", "lpp",
0241 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
0242 "lvs", "pmc";
0243 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0244 };
0245 conf_ld17_0 {
0246 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
0247 "ld23_22";
0248 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0249 };
0250 };
0251
0252 state_i2cmux_ddc: pinmux_i2cmux_ddc {
0253 ddc {
0254 nvidia,pins = "ddc";
0255 nvidia,function = "i2c2";
0256 };
0257 pta {
0258 nvidia,pins = "pta";
0259 nvidia,function = "rsvd4";
0260 };
0261 };
0262
0263 state_i2cmux_pta: pinmux_i2cmux_pta {
0264 ddc {
0265 nvidia,pins = "ddc";
0266 nvidia,function = "rsvd4";
0267 };
0268 pta {
0269 nvidia,pins = "pta";
0270 nvidia,function = "i2c2";
0271 };
0272 };
0273
0274 state_i2cmux_idle: pinmux_i2cmux_idle {
0275 ddc {
0276 nvidia,pins = "ddc";
0277 nvidia,function = "rsvd4";
0278 };
0279 pta {
0280 nvidia,pins = "pta";
0281 nvidia,function = "rsvd4";
0282 };
0283 };
0284 };
0285
0286 i2s@70002800 {
0287 status = "okay";
0288 };
0289
0290 serial@70006300 {
0291 status = "okay";
0292 };
0293
0294 i2c@7000c000 {
0295 clock-frequency = <400000>;
0296 status = "okay";
0297 };
0298
0299 i2c@7000c400 {
0300 clock-frequency = <100000>;
0301 status = "okay";
0302 };
0303
0304 i2cmux {
0305 compatible = "i2c-mux-pinctrl";
0306 #address-cells = <1>;
0307 #size-cells = <0>;
0308
0309 i2c-parent = <&{/i2c@7000c400}>;
0310
0311 pinctrl-names = "ddc", "pta", "idle";
0312 pinctrl-0 = <&state_i2cmux_ddc>;
0313 pinctrl-1 = <&state_i2cmux_pta>;
0314 pinctrl-2 = <&state_i2cmux_idle>;
0315
0316 hdmi_ddc: i2c@0 {
0317 reg = <0>;
0318 #address-cells = <1>;
0319 #size-cells = <0>;
0320 };
0321
0322 i2c@1 {
0323 reg = <1>;
0324 #address-cells = <1>;
0325 #size-cells = <0>;
0326 };
0327 };
0328
0329 i2c@7000d000 {
0330 clock-frequency = <400000>;
0331 status = "okay";
0332
0333 pmic: tps6586x@34 {
0334 compatible = "ti,tps6586x";
0335 reg = <0x34>;
0336 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
0337
0338 ti,system-power-controller;
0339
0340 #gpio-cells = <2>;
0341 gpio-controller;
0342
0343 /* vdd_5v0_reg must be provided by the base board */
0344 sys-supply = <&vdd_5v0_reg>;
0345 vin-sm0-supply = <&sys_reg>;
0346 vin-sm1-supply = <&sys_reg>;
0347 vin-sm2-supply = <&sys_reg>;
0348 vinldo01-supply = <&sm2_reg>;
0349 vinldo23-supply = <&sm2_reg>;
0350 vinldo4-supply = <&sm2_reg>;
0351 vinldo678-supply = <&sm2_reg>;
0352 vinldo9-supply = <&sm2_reg>;
0353
0354 regulators {
0355 sys_reg: sys {
0356 regulator-name = "vdd_sys";
0357 regulator-always-on;
0358 };
0359
0360 vdd_core: sm0 {
0361 regulator-name = "vdd_sys_sm0,vdd_core";
0362 regulator-min-microvolt = <1200000>;
0363 regulator-max-microvolt = <1200000>;
0364 regulator-always-on;
0365 };
0366
0367 sm1 {
0368 regulator-name = "vdd_sys_sm1,vdd_cpu";
0369 regulator-min-microvolt = <1000000>;
0370 regulator-max-microvolt = <1000000>;
0371 regulator-always-on;
0372 };
0373
0374 sm2_reg: sm2 {
0375 regulator-name = "vdd_sys_sm2,vin_ldo*";
0376 regulator-min-microvolt = <3700000>;
0377 regulator-max-microvolt = <3700000>;
0378 regulator-always-on;
0379 };
0380
0381 pci_clk_reg: ldo0 {
0382 regulator-name = "vdd_ldo0,vddio_pex_clk";
0383 regulator-min-microvolt = <3300000>;
0384 regulator-max-microvolt = <3300000>;
0385 };
0386
0387 ldo1 {
0388 regulator-name = "vdd_ldo1,avdd_pll*";
0389 regulator-min-microvolt = <1100000>;
0390 regulator-max-microvolt = <1100000>;
0391 regulator-always-on;
0392 };
0393
0394 ldo2 {
0395 regulator-name = "vdd_ldo2,vdd_rtc";
0396 regulator-min-microvolt = <1200000>;
0397 regulator-max-microvolt = <1200000>;
0398 };
0399
0400 ldo3 {
0401 regulator-name = "vdd_ldo3,avdd_usb*";
0402 regulator-min-microvolt = <3300000>;
0403 regulator-max-microvolt = <3300000>;
0404 regulator-always-on;
0405 };
0406
0407 ldo4 {
0408 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
0409 regulator-min-microvolt = <1800000>;
0410 regulator-max-microvolt = <1800000>;
0411 regulator-always-on;
0412 };
0413
0414 ldo5 {
0415 regulator-name = "vdd_ldo5,vcore_mmc";
0416 regulator-min-microvolt = <2850000>;
0417 regulator-max-microvolt = <2850000>;
0418 };
0419
0420 ldo6 {
0421 regulator-name = "vdd_ldo6,avdd_vdac";
0422 /*
0423 * According to the Tegra 2 Automotive
0424 * DataSheet, a typical value for this
0425 * would be 2.8V, but the PMIC only
0426 * supports 2.85V.
0427 */
0428 regulator-min-microvolt = <2850000>;
0429 regulator-max-microvolt = <2850000>;
0430 };
0431
0432 hdmi_vdd_reg: ldo7 {
0433 regulator-name = "vdd_ldo7,avdd_hdmi";
0434 regulator-min-microvolt = <3300000>;
0435 regulator-max-microvolt = <3300000>;
0436 };
0437
0438 hdmi_pll_reg: ldo8 {
0439 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
0440 regulator-min-microvolt = <1800000>;
0441 regulator-max-microvolt = <1800000>;
0442 };
0443
0444 ldo9 {
0445 regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam";
0446 /*
0447 * According to the Tegra 2 Automotive
0448 * DataSheet, a typical value for this
0449 * would be 2.8V, but the PMIC only
0450 * supports 2.85V.
0451 */
0452 regulator-min-microvolt = <2850000>;
0453 regulator-max-microvolt = <2850000>;
0454 regulator-always-on;
0455 };
0456
0457 ldo_rtc {
0458 regulator-name = "vdd_rtc_out";
0459 regulator-min-microvolt = <3300000>;
0460 regulator-max-microvolt = <3300000>;
0461 regulator-always-on;
0462 };
0463 };
0464 };
0465
0466 temperature-sensor@4c {
0467 compatible = "onnn,nct1008";
0468 reg = <0x4c>;
0469 };
0470 };
0471
0472 pmc@7000e400 {
0473 nvidia,invert-interrupt;
0474 nvidia,suspend-mode = <1>;
0475 nvidia,cpu-pwr-good-time = <5000>;
0476 nvidia,cpu-pwr-off-time = <5000>;
0477 nvidia,core-pwr-good-time = <3845 3845>;
0478 nvidia,core-pwr-off-time = <3875>;
0479 nvidia,sys-clock-req-active-high;
0480 core-supply = <&vdd_core>;
0481 };
0482
0483 pcie@80003000 {
0484 avdd-pex-supply = <&pci_vdd_reg>;
0485 vdd-pex-supply = <&pci_vdd_reg>;
0486 avdd-pex-pll-supply = <&pci_vdd_reg>;
0487 avdd-plle-supply = <&pci_vdd_reg>;
0488 vddio-pex-clk-supply = <&pci_clk_reg>;
0489 };
0490
0491 usb@c5008000 {
0492 status = "okay";
0493 };
0494
0495 usb-phy@c5008000 {
0496 status = "okay";
0497 };
0498
0499 mmc@c8000600 {
0500 cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>;
0501 wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
0502 bus-width = <4>;
0503 status = "okay";
0504 };
0505
0506 clk32k_in: clock-32k {
0507 compatible = "fixed-clock";
0508 clock-frequency = <32768>;
0509 #clock-cells = <0>;
0510 };
0511
0512 pci_vdd_reg: regulator-1v05 {
0513 compatible = "regulator-fixed";
0514 regulator-name = "vdd_1v05";
0515 regulator-min-microvolt = <1050000>;
0516 regulator-max-microvolt = <1050000>;
0517 gpio = <&pmic 2 0>;
0518 enable-active-high;
0519 };
0520 };
| [ Source navigation ] | [ Diff markup ] | [ Identifier search ] | [ general search ] |
|
This page was automatically generated by the 2.1.0 LXR engine. The LXR team |
|