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0001 // SPDX-License-Identifier: GPL-2.0 OR X11
0002 /*
0003  * Copyright 2016-2019 Toradex AG
0004  */
0005 
0006 #include "tegra124.dtsi"
0007 #include "tegra124-apalis-emc.dtsi"
0008 
0009 /*
0010  * Toradex Apalis TK1 Module Device Tree
0011  * Compatible for Revisions 2GB: V1.0A, V1.0B, V1.1A
0012  */
0013 / {
0014         memory@80000000 {
0015                 reg = <0x0 0x80000000 0x0 0x80000000>;
0016         };
0017 
0018         pcie@1003000 {
0019                 status = "okay";
0020                 avddio-pex-supply = <&reg_1v05_vdd>;
0021                 avdd-pex-pll-supply = <&reg_1v05_vdd>;
0022                 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
0023                 dvddio-pex-supply = <&reg_1v05_vdd>;
0024                 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
0025                 hvdd-pex-supply = <&reg_module_3v3>;
0026                 vddio-pex-ctl-supply = <&reg_module_3v3>;
0027 
0028                 /* Apalis PCIe (additional lane Apalis type specific) */
0029                 pci@1,0 {
0030                         /* PCIE1_RX/TX and TS_DIFF1/2 */
0031                         phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>,
0032                                <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>;
0033                         phy-names = "pcie-0", "pcie-1";
0034                 };
0035 
0036                 /* I210 Gigabit Ethernet Controller (On-module) */
0037                 pci@2,0 {
0038                         phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>;
0039                         phy-names = "pcie-0";
0040                         status = "okay";
0041 
0042                         ethernet@0,0 {
0043                                 reg = <0 0 0 0 0>;
0044                                 local-mac-address = [00 00 00 00 00 00];
0045                         };
0046                 };
0047         };
0048 
0049         host1x@50000000 {
0050                 hdmi@54280000 {
0051                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
0052                         nvidia,hpd-gpio =
0053                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
0054                         pll-supply = <&reg_1v05_avdd_hdmi_pll>;
0055                         vdd-supply = <&reg_3v3_avdd_hdmi>;
0056                 };
0057         };
0058 
0059         gpu@57000000 {
0060                 /*
0061                  * Node left disabled on purpose - the bootloader will enable
0062                  * it after having set the VPR up
0063                  */
0064                 vdd-supply = <&reg_vdd_gpu>;
0065         };
0066 
0067         pinmux@70000868 {
0068                 pinctrl-names = "default";
0069                 pinctrl-0 = <&state_default>;
0070 
0071                 state_default: pinmux {
0072                         /* Analogue Audio (On-module) */
0073                         dap3-fs-pp0 {
0074                                 nvidia,pins = "dap3_fs_pp0";
0075                                 nvidia,function = "i2s2";
0076                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0077                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0078                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0079                         };
0080                         dap3-din-pp1 {
0081                                 nvidia,pins = "dap3_din_pp1";
0082                                 nvidia,function = "i2s2";
0083                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0084                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0085                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0086                         };
0087                         dap3-dout-pp2 {
0088                                 nvidia,pins = "dap3_dout_pp2";
0089                                 nvidia,function = "i2s2";
0090                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0091                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0092                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0093                         };
0094                         dap3-sclk-pp3 {
0095                                 nvidia,pins = "dap3_sclk_pp3";
0096                                 nvidia,function = "i2s2";
0097                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0098                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0099                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0100                         };
0101                         dap-mclk1-pw4 {
0102                                 nvidia,pins = "dap_mclk1_pw4";
0103                                 nvidia,function = "extperiph1";
0104                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0105                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0106                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0107                         };
0108 
0109                         /* Apalis BKL1_ON */
0110                         pbb5 {
0111                                 nvidia,pins = "pbb5";
0112                                 nvidia,function = "vgp5";
0113                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0114                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0115                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0116                         };
0117 
0118                         /* Apalis BKL1_PWM */
0119                         pu6 {
0120                                 nvidia,pins = "pu6";
0121                                 nvidia,function = "pwm3";
0122                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0123                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0124                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0125                         };
0126 
0127                         /* Apalis CAM1_MCLK */
0128                         cam-mclk-pcc0 {
0129                                 nvidia,pins = "cam_mclk_pcc0";
0130                                 nvidia,function = "vi_alt3";
0131                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0132                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0133                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0134                         };
0135 
0136                         /* Apalis Digital Audio */
0137                         dap2-fs-pa2 {
0138                                 nvidia,pins = "dap2_fs_pa2";
0139                                 nvidia,function = "hda";
0140                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0141                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0142                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0143                         };
0144                         dap2-sclk-pa3 {
0145                                 nvidia,pins = "dap2_sclk_pa3";
0146                                 nvidia,function = "hda";
0147                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0148                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0149                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0150                         };
0151                         dap2-din-pa4 {
0152                                 nvidia,pins = "dap2_din_pa4";
0153                                 nvidia,function = "hda";
0154                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0155                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0156                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0157                         };
0158                         dap2-dout-pa5 {
0159                                 nvidia,pins = "dap2_dout_pa5";
0160                                 nvidia,function = "hda";
0161                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0162                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0163                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0164                         };
0165                         pbb3 { /* DAP1_RESET */
0166                                 nvidia,pins = "pbb3";
0167                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0168                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0169                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0170                         };
0171                         clk3-out-pee0 {
0172                                 nvidia,pins = "clk3_out_pee0";
0173                                 nvidia,function = "extperiph3";
0174                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0175                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0176                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0177                         };
0178 
0179                         /* Apalis GPIO */
0180                         ddc-scl-pv4 {
0181                                 nvidia,pins = "ddc_scl_pv4";
0182                                 nvidia,function = "rsvd2";
0183                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0184                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0185                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0186                         };
0187                         ddc-sda-pv5 {
0188                                 nvidia,pins = "ddc_sda_pv5";
0189                                 nvidia,function = "rsvd2";
0190                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0191                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0192                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0193                         };
0194                         pex-l0-rst-n-pdd1 {
0195                                 nvidia,pins = "pex_l0_rst_n_pdd1";
0196                                 nvidia,function = "rsvd2";
0197                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0198                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0199                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0200                         };
0201                         pex-l0-clkreq-n-pdd2 {
0202                                 nvidia,pins = "pex_l0_clkreq_n_pdd2";
0203                                 nvidia,function = "rsvd2";
0204                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0205                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0206                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0207                         };
0208                         pex-l1-rst-n-pdd5 {
0209                                 nvidia,pins = "pex_l1_rst_n_pdd5";
0210                                 nvidia,function = "rsvd2";
0211                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0212                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0213                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0214                         };
0215                         pex-l1-clkreq-n-pdd6 {
0216                                 nvidia,pins = "pex_l1_clkreq_n_pdd6";
0217                                 nvidia,function = "rsvd2";
0218                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0219                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0220                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0221                         };
0222                         dp-hpd-pff0 {
0223                                 nvidia,pins = "dp_hpd_pff0";
0224                                 nvidia,function = "dp";
0225                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0226                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0227                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0228                         };
0229                         pff2 {
0230                                 nvidia,pins = "pff2";
0231                                 nvidia,function = "rsvd2";
0232                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0233                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0234                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0235                         };
0236                         owr { /* PEX_L1_CLKREQ_N multiplexed GPIO6 */
0237                                 nvidia,pins = "owr";
0238                                 nvidia,function = "rsvd2";
0239                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0240                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0241                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0242                                 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
0243                         };
0244 
0245                         /* Apalis HDMI1_CEC */
0246                         hdmi-cec-pee3 {
0247                                 nvidia,pins = "hdmi_cec_pee3";
0248                                 nvidia,function = "cec";
0249                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0250                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0251                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0252                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
0253                         };
0254 
0255                         /* Apalis HDMI1_HPD */
0256                         hdmi-int-pn7 {
0257                                 nvidia,pins = "hdmi_int_pn7";
0258                                 nvidia,function = "rsvd1";
0259                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0260                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0261                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0262                                 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
0263                         };
0264 
0265                         /* Apalis I2C1 */
0266                         gen1-i2c-scl-pc4 {
0267                                 nvidia,pins = "gen1_i2c_scl_pc4";
0268                                 nvidia,function = "i2c1";
0269                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0270                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0271                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0272                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0273                         };
0274                         gen1-i2c-sda-pc5 {
0275                                 nvidia,pins = "gen1_i2c_sda_pc5";
0276                                 nvidia,function = "i2c1";
0277                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0278                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0279                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0280                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0281                         };
0282 
0283                         /* Apalis I2C2 (DDC) */
0284                         gen2-i2c-scl-pt5 {
0285                                 nvidia,pins = "gen2_i2c_scl_pt5";
0286                                 nvidia,function = "i2c2";
0287                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0288                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0289                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0290                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0291                         };
0292                         gen2-i2c-sda-pt6 {
0293                                 nvidia,pins = "gen2_i2c_sda_pt6";
0294                                 nvidia,function = "i2c2";
0295                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0296                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0297                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0298                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0299                         };
0300 
0301                         /* Apalis I2C3 (CAM) */
0302                         cam-i2c-scl-pbb1 {
0303                                 nvidia,pins = "cam_i2c_scl_pbb1";
0304                                 nvidia,function = "i2c3";
0305                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0306                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0307                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0308                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0309                         };
0310                         cam-i2c-sda-pbb2 {
0311                                 nvidia,pins = "cam_i2c_sda_pbb2";
0312                                 nvidia,function = "i2c3";
0313                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0314                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0315                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0316                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0317                         };
0318 
0319                         /* Apalis MMC1 */
0320                         sdmmc1-cd-n-pv3 { /* CD# GPIO */
0321                                 nvidia,pins = "sdmmc1_wp_n_pv3";
0322                                 nvidia,function = "sdmmc1";
0323                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0324                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0325                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0326                         };
0327                         clk2-out-pw5 { /* D5 GPIO */
0328                                 nvidia,pins = "clk2_out_pw5";
0329                                 nvidia,function = "rsvd2";
0330                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0331                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0332                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0333                         };
0334                         sdmmc1-dat3-py4 {
0335                                 nvidia,pins = "sdmmc1_dat3_py4";
0336                                 nvidia,function = "sdmmc1";
0337                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0338                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0339                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0340                         };
0341                         sdmmc1-dat2-py5 {
0342                                 nvidia,pins = "sdmmc1_dat2_py5";
0343                                 nvidia,function = "sdmmc1";
0344                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0345                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0346                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0347                         };
0348                         sdmmc1-dat1-py6 {
0349                                 nvidia,pins = "sdmmc1_dat1_py6";
0350                                 nvidia,function = "sdmmc1";
0351                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0352                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0353                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0354                         };
0355                         sdmmc1-dat0-py7 {
0356                                 nvidia,pins = "sdmmc1_dat0_py7";
0357                                 nvidia,function = "sdmmc1";
0358                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0359                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0360                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0361                         };
0362                         sdmmc1-clk-pz0 {
0363                                 nvidia,pins = "sdmmc1_clk_pz0";
0364                                 nvidia,function = "sdmmc1";
0365                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0366                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0367                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0368                         };
0369                         sdmmc1-cmd-pz1 {
0370                                 nvidia,pins = "sdmmc1_cmd_pz1";
0371                                 nvidia,function = "sdmmc1";
0372                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0373                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0374                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0375                         };
0376                         clk2-req-pcc5 { /* D4 GPIO */
0377                                 nvidia,pins = "clk2_req_pcc5";
0378                                 nvidia,function = "rsvd2";
0379                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0380                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0381                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0382                         };
0383                         sdmmc3-clk-lb-in-pee5 { /* D6 GPIO */
0384                                 nvidia,pins = "sdmmc3_clk_lb_in_pee5";
0385                                 nvidia,function = "rsvd2";
0386                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0387                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0388                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0389                         };
0390                         usb-vbus-en2-pff1 { /* D7 GPIO */
0391                                 nvidia,pins = "usb_vbus_en2_pff1";
0392                                 nvidia,function = "rsvd2";
0393                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0394                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0395                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0396                         };
0397 
0398                         /* Apalis PWM */
0399                         ph0 {
0400                                 nvidia,pins = "ph0";
0401                                 nvidia,function = "pwm0";
0402                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0403                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0404                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0405                         };
0406                         ph1 {
0407                                 nvidia,pins = "ph1";
0408                                 nvidia,function = "pwm1";
0409                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0410                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0411                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0412                         };
0413                         ph2 {
0414                                 nvidia,pins = "ph2";
0415                                 nvidia,function = "pwm2";
0416                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0417                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0418                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0419                         };
0420                         /* PWM3 active on pu6 being Apalis BKL1_PWM as well */
0421                         ph3 {
0422                                 nvidia,pins = "ph3";
0423                                 nvidia,function = "pwm3";
0424                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0425                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0426                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0427                         };
0428 
0429                         /* Apalis SATA1_ACT# */
0430                         dap1-dout-pn2 {
0431                                 nvidia,pins = "dap1_dout_pn2";
0432                                 nvidia,function = "gmi";
0433                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0434                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0435                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0436                         };
0437 
0438                         /* Apalis SD1 */
0439                         sdmmc3-clk-pa6 {
0440                                 nvidia,pins = "sdmmc3_clk_pa6";
0441                                 nvidia,function = "sdmmc3";
0442                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0443                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0444                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0445                         };
0446                         sdmmc3-cmd-pa7 {
0447                                 nvidia,pins = "sdmmc3_cmd_pa7";
0448                                 nvidia,function = "sdmmc3";
0449                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0450                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0451                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0452                         };
0453                         sdmmc3-dat3-pb4 {
0454                                 nvidia,pins = "sdmmc3_dat3_pb4";
0455                                 nvidia,function = "sdmmc3";
0456                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0457                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0458                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0459                         };
0460                         sdmmc3-dat2-pb5 {
0461                                 nvidia,pins = "sdmmc3_dat2_pb5";
0462                                 nvidia,function = "sdmmc3";
0463                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0464                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0465                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0466                         };
0467                         sdmmc3-dat1-pb6 {
0468                                 nvidia,pins = "sdmmc3_dat1_pb6";
0469                                 nvidia,function = "sdmmc3";
0470                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0471                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0472                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0473                         };
0474                         sdmmc3-dat0-pb7 {
0475                                 nvidia,pins = "sdmmc3_dat0_pb7";
0476                                 nvidia,function = "sdmmc3";
0477                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0478                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0479                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0480                         };
0481                         sdmmc3-cd-n-pv2 { /* CD# GPIO */
0482                                 nvidia,pins = "sdmmc3_cd_n_pv2";
0483                                 nvidia,function = "rsvd3";
0484                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0485                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0486                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0487                         };
0488 
0489                         /* Apalis SPDIF */
0490                         spdif-out-pk5 {
0491                                 nvidia,pins = "spdif_out_pk5";
0492                                 nvidia,function = "spdif";
0493                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0494                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0495                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0496                         };
0497                         spdif-in-pk6 {
0498                                 nvidia,pins = "spdif_in_pk6";
0499                                 nvidia,function = "spdif";
0500                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0501                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0502                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0503                         };
0504 
0505                         /* Apalis SPI1 */
0506                         ulpi-clk-py0 {
0507                                 nvidia,pins = "ulpi_clk_py0";
0508                                 nvidia,function = "spi1";
0509                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0510                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0511                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0512                         };
0513                         ulpi-dir-py1 {
0514                                 nvidia,pins = "ulpi_dir_py1";
0515                                 nvidia,function = "spi1";
0516                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0517                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0518                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0519                         };
0520                         ulpi-nxt-py2 {
0521                                 nvidia,pins = "ulpi_nxt_py2";
0522                                 nvidia,function = "spi1";
0523                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0524                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0525                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0526                         };
0527                         ulpi-stp-py3 {
0528                                 nvidia,pins = "ulpi_stp_py3";
0529                                 nvidia,function = "spi1";
0530                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0531                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0532                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0533                         };
0534 
0535                         /* Apalis SPI2 */
0536                         pg5 {
0537                                 nvidia,pins = "pg5";
0538                                 nvidia,function = "spi4";
0539                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0540                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0541                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0542                         };
0543                         pg6 {
0544                                 nvidia,pins = "pg6";
0545                                 nvidia,function = "spi4";
0546                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0547                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0548                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0549                         };
0550                         pg7 {
0551                                 nvidia,pins = "pg7";
0552                                 nvidia,function = "spi4";
0553                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0554                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0555                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0556                         };
0557                         pi3 {
0558                                 nvidia,pins = "pi3";
0559                                 nvidia,function = "spi4";
0560                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0561                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0562                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0563                         };
0564 
0565                         /* Apalis UART1 */
0566                         pb1 { /* DCD GPIO */
0567                                 nvidia,pins = "pb1";
0568                                 nvidia,function = "rsvd2";
0569                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0570                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0571                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0572                         };
0573                         pk7 { /* RI GPIO */
0574                                 nvidia,pins = "pk7";
0575                                 nvidia,function = "rsvd2";
0576                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0577                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0578                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0579                         };
0580                         uart1-txd-pu0 {
0581                                 nvidia,pins = "pu0";
0582                                 nvidia,function = "uarta";
0583                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0584                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0585                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0586                         };
0587                         uart1-rxd-pu1 {
0588                                 nvidia,pins = "pu1";
0589                                 nvidia,function = "uarta";
0590                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0591                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0592                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0593                         };
0594                         uart1-cts-n-pu2 {
0595                                 nvidia,pins = "pu2";
0596                                 nvidia,function = "uarta";
0597                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0598                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0599                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0600                         };
0601                         uart1-rts-n-pu3 {
0602                                 nvidia,pins = "pu3";
0603                                 nvidia,function = "uarta";
0604                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0605                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0606                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0607                         };
0608                         uart3-cts-n-pa1 { /* DSR GPIO */
0609                                 nvidia,pins = "uart3_cts_n_pa1";
0610                                 nvidia,function = "gmi";
0611                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0612                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0613                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0614                         };
0615                         uart3-rts-n-pc0 { /* DTR GPIO */
0616                                 nvidia,pins = "uart3_rts_n_pc0";
0617                                 nvidia,function = "gmi";
0618                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0619                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0620                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0621                         };
0622 
0623                         /* Apalis UART2 */
0624                         uart2-txd-pc2 {
0625                                 nvidia,pins = "uart2_txd_pc2";
0626                                 nvidia,function = "irda";
0627                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0628                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0629                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0630                         };
0631                         uart2-rxd-pc3 {
0632                                 nvidia,pins = "uart2_rxd_pc3";
0633                                 nvidia,function = "irda";
0634                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0635                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0636                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0637                         };
0638                         uart2-cts-n-pj5 {
0639                                 nvidia,pins = "uart2_cts_n_pj5";
0640                                 nvidia,function = "uartb";
0641                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0642                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0643                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0644                         };
0645                         uart2-rts-n-pj6 {
0646                                 nvidia,pins = "uart2_rts_n_pj6";
0647                                 nvidia,function = "uartb";
0648                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0649                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0650                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0651                         };
0652 
0653                         /* Apalis UART3 */
0654                         uart3-txd-pw6 {
0655                                 nvidia,pins = "uart3_txd_pw6";
0656                                 nvidia,function = "uartc";
0657                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0658                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0659                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0660                         };
0661                         uart3-rxd-pw7 {
0662                                 nvidia,pins = "uart3_rxd_pw7";
0663                                 nvidia,function = "uartc";
0664                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0665                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0666                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0667                         };
0668 
0669                         /* Apalis UART4 */
0670                         uart4-rxd-pb0 {
0671                                 nvidia,pins = "pb0";
0672                                 nvidia,function = "uartd";
0673                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0674                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0675                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0676                         };
0677                         uart4-txd-pj7 {
0678                                 nvidia,pins = "pj7";
0679                                 nvidia,function = "uartd";
0680                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0681                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0682                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0683                         };
0684 
0685                         /* Apalis USBH_EN */
0686                         usb-vbus-en1-pn5 {
0687                                 nvidia,pins = "usb_vbus_en1_pn5";
0688                                 nvidia,function = "rsvd2";
0689                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0690                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0691                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0692                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
0693                         };
0694 
0695                         /* Apalis USBH_OC# */
0696                         pbb0 {
0697                                 nvidia,pins = "pbb0";
0698                                 nvidia,function = "vgp6";
0699                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0700                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0701                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0702                         };
0703 
0704                         /* Apalis USBO1_EN */
0705                         usb-vbus-en0-pn4 {
0706                                 nvidia,pins = "usb_vbus_en0_pn4";
0707                                 nvidia,function = "rsvd2";
0708                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0709                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0710                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0711                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
0712                         };
0713 
0714                         /* Apalis USBO1_OC# */
0715                         pbb4 {
0716                                 nvidia,pins = "pbb4";
0717                                 nvidia,function = "vgp4";
0718                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0719                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0720                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0721                         };
0722 
0723                         /* Apalis WAKE1_MICO */
0724                         pex-wake-n-pdd3 {
0725                                 nvidia,pins = "pex_wake_n_pdd3";
0726                                 nvidia,function = "rsvd2";
0727                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0728                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0729                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0730                         };
0731 
0732                         /* CORE_PWR_REQ */
0733                         core-pwr-req {
0734                                 nvidia,pins = "core_pwr_req";
0735                                 nvidia,function = "pwron";
0736                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0737                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0738                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0739                         };
0740 
0741                         /* CPU_PWR_REQ */
0742                         cpu-pwr-req {
0743                                 nvidia,pins = "cpu_pwr_req";
0744                                 nvidia,function = "cpu";
0745                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0746                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0747                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0748                         };
0749 
0750                         /* DVFS */
0751                         dvfs-pwm-px0 {
0752                                 nvidia,pins = "dvfs_pwm_px0";
0753                                 nvidia,function = "cldvfs";
0754                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0755                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0756                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0757                         };
0758                         dvfs-clk-px2 {
0759                                 nvidia,pins = "dvfs_clk_px2";
0760                                 nvidia,function = "cldvfs";
0761                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0762                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0763                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0764                         };
0765 
0766                         /* eMMC */
0767                         sdmmc4-dat0-paa0 {
0768                                 nvidia,pins = "sdmmc4_dat0_paa0";
0769                                 nvidia,function = "sdmmc4";
0770                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0771                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0772                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0773                         };
0774                         sdmmc4-dat1-paa1 {
0775                                 nvidia,pins = "sdmmc4_dat1_paa1";
0776                                 nvidia,function = "sdmmc4";
0777                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0778                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0779                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0780                         };
0781                         sdmmc4-dat2-paa2 {
0782                                 nvidia,pins = "sdmmc4_dat2_paa2";
0783                                 nvidia,function = "sdmmc4";
0784                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0785                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0786                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0787                         };
0788                         sdmmc4-dat3-paa3 {
0789                                 nvidia,pins = "sdmmc4_dat3_paa3";
0790                                 nvidia,function = "sdmmc4";
0791                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0792                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0793                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0794                         };
0795                         sdmmc4-dat4-paa4 {
0796                                 nvidia,pins = "sdmmc4_dat4_paa4";
0797                                 nvidia,function = "sdmmc4";
0798                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0799                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0800                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0801                         };
0802                         sdmmc4-dat5-paa5 {
0803                                 nvidia,pins = "sdmmc4_dat5_paa5";
0804                                 nvidia,function = "sdmmc4";
0805                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0806                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0807                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0808                         };
0809                         sdmmc4-dat6-paa6 {
0810                                 nvidia,pins = "sdmmc4_dat6_paa6";
0811                                 nvidia,function = "sdmmc4";
0812                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0813                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0814                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0815                         };
0816                         sdmmc4-dat7-paa7 {
0817                                 nvidia,pins = "sdmmc4_dat7_paa7";
0818                                 nvidia,function = "sdmmc4";
0819                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0820                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0821                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0822                         };
0823                         sdmmc4-clk-pcc4 {
0824                                 nvidia,pins = "sdmmc4_clk_pcc4";
0825                                 nvidia,function = "sdmmc4";
0826                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0827                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0828                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0829                         };
0830                         sdmmc4-cmd-pt7 {
0831                                 nvidia,pins = "sdmmc4_cmd_pt7";
0832                                 nvidia,function = "sdmmc4";
0833                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0834                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0835                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0836                         };
0837 
0838                         /* JTAG_RTCK */
0839                         jtag-rtck {
0840                                 nvidia,pins = "jtag_rtck";
0841                                 nvidia,function = "rtck";
0842                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0843                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0844                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0845                         };
0846 
0847                         /* LAN_DEV_OFF# */
0848                         ulpi-data5-po6 {
0849                                 nvidia,pins = "ulpi_data5_po6";
0850                                 nvidia,function = "ulpi";
0851                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0852                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0853                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0854                         };
0855 
0856                         /* LAN_RESET# */
0857                         kb-row10-ps2 {
0858                                 nvidia,pins = "kb_row10_ps2";
0859                                 nvidia,function = "rsvd2";
0860                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0861                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0862                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0863                         };
0864 
0865                         /* LAN_WAKE# */
0866                         ulpi-data4-po5 {
0867                                 nvidia,pins = "ulpi_data4_po5";
0868                                 nvidia,function = "ulpi";
0869                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0870                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0871                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0872                         };
0873 
0874                         /* MCU_INT1# */
0875                         pk2 {
0876                                 nvidia,pins = "pk2";
0877                                 nvidia,function = "rsvd1";
0878                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0879                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0880                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0881                         };
0882 
0883                         /* MCU_INT2# */
0884                         pj2 {
0885                                 nvidia,pins = "pj2";
0886                                 nvidia,function = "rsvd1";
0887                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0888                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0889                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0890                         };
0891 
0892                         /* MCU_INT3# */
0893                         pi5 {
0894                                 nvidia,pins = "pi5";
0895                                 nvidia,function = "rsvd2";
0896                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0897                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0898                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0899                         };
0900 
0901                         /* MCU_INT4# */
0902                         pj0 {
0903                                 nvidia,pins = "pj0";
0904                                 nvidia,function = "rsvd1";
0905                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0906                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0907                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0908                         };
0909 
0910                         /* MCU_RESET */
0911                         pbb6 {
0912                                 nvidia,pins = "pbb6";
0913                                 nvidia,function = "rsvd2";
0914                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0915                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0916                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0917                         };
0918 
0919                         /* MCU SPI */
0920                         gpio-x4-aud-px4 {
0921                                 nvidia,pins = "gpio_x4_aud_px4";
0922                                 nvidia,function = "spi2";
0923                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0924                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0925                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0926                         };
0927                         gpio-x5-aud-px5 {
0928                                 nvidia,pins = "gpio_x5_aud_px5";
0929                                 nvidia,function = "spi2";
0930                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0931                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0932                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0933                         };
0934                         gpio-x6-aud-px6 { /* MCU_CS */
0935                                 nvidia,pins = "gpio_x6_aud_px6";
0936                                 nvidia,function = "spi2";
0937                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0938                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0939                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0940                         };
0941                         gpio-x7-aud-px7 {
0942                                 nvidia,pins = "gpio_x7_aud_px7";
0943                                 nvidia,function = "spi2";
0944                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0945                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0946                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0947                         };
0948                         gpio-w2-aud-pw2 { /* MCU_CSEZP */
0949                                 nvidia,pins = "gpio_w2_aud_pw2";
0950                                 nvidia,function = "spi2";
0951                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0952                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0953                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0954                         };
0955 
0956                         /* PMIC_CLK_32K */
0957                         clk-32k-in {
0958                                 nvidia,pins = "clk_32k_in";
0959                                 nvidia,function = "clk";
0960                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0961                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0962                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0963                         };
0964 
0965                         /* PMIC_CPU_OC_INT */
0966                         clk-32k-out-pa0 {
0967                                 nvidia,pins = "clk_32k_out_pa0";
0968                                 nvidia,function = "soc";
0969                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0970                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0971                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0972                         };
0973 
0974                         /* PWR_I2C */
0975                         pwr-i2c-scl-pz6 {
0976                                 nvidia,pins = "pwr_i2c_scl_pz6";
0977                                 nvidia,function = "i2cpwr";
0978                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0979                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0980                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0981                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0982                         };
0983                         pwr-i2c-sda-pz7 {
0984                                 nvidia,pins = "pwr_i2c_sda_pz7";
0985                                 nvidia,function = "i2cpwr";
0986                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0987                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0988                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0989                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0990                         };
0991 
0992                         /* PWR_INT_N */
0993                         pwr-int-n {
0994                                 nvidia,pins = "pwr_int_n";
0995                                 nvidia,function = "pmi";
0996                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0997                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0998                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0999                         };
1000 
1001                         /* RESET_MOCI_CTRL */
1002                         pu4 {
1003                                 nvidia,pins = "pu4";
1004                                 nvidia,function = "gmi";
1005                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1006                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1007                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1008                         };
1009 
1010                         /* RESET_OUT_N */
1011                         reset-out-n {
1012                                 nvidia,pins = "reset_out_n";
1013                                 nvidia,function = "reset_out_n";
1014                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1015                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1016                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1017                         };
1018 
1019                         /* SHIFT_CTRL_DIR_IN */
1020                         kb-row0-pr0 {
1021                                 nvidia,pins = "kb_row0_pr0";
1022                                 nvidia,function = "rsvd2";
1023                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1024                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1025                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1026                         };
1027                         kb-row1-pr1 {
1028                                 nvidia,pins = "kb_row1_pr1";
1029                                 nvidia,function = "rsvd2";
1030                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1031                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1032                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1033                         };
1034 
1035                         /* Configure level-shifter as output for HDA */
1036                         kb-row11-ps3 {
1037                                 nvidia,pins = "kb_row11_ps3";
1038                                 nvidia,function = "rsvd2";
1039                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1040                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1041                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1042                         };
1043 
1044                         /* SHIFT_CTRL_DIR_OUT */
1045                         kb-col5-pq5 {
1046                                 nvidia,pins = "kb_col5_pq5";
1047                                 nvidia,function = "rsvd2";
1048                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1049                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1050                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1051                         };
1052                         kb-col6-pq6 {
1053                                 nvidia,pins = "kb_col6_pq6";
1054                                 nvidia,function = "rsvd2";
1055                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1056                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1057                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1058                         };
1059                         kb-col7-pq7 {
1060                                 nvidia,pins = "kb_col7_pq7";
1061                                 nvidia,function = "rsvd2";
1062                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1063                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1064                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1065                         };
1066 
1067                         /* SHIFT_CTRL_OE */
1068                         kb-col0-pq0 {
1069                                 nvidia,pins = "kb_col0_pq0";
1070                                 nvidia,function = "rsvd2";
1071                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1072                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1073                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1074                         };
1075                         kb-col1-pq1 {
1076                                 nvidia,pins = "kb_col1_pq1";
1077                                 nvidia,function = "rsvd2";
1078                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1079                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1080                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1081                         };
1082                         kb-col2-pq2 {
1083                                 nvidia,pins = "kb_col2_pq2";
1084                                 nvidia,function = "rsvd2";
1085                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1086                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1087                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1088                         };
1089                         kb-col4-pq4 {
1090                                 nvidia,pins = "kb_col4_pq4";
1091                                 nvidia,function = "kbc";
1092                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1093                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1094                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1095                         };
1096                         kb-row2-pr2 {
1097                                 nvidia,pins = "kb_row2_pr2";
1098                                 nvidia,function = "rsvd2";
1099                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1100                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1101                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1102                         };
1103 
1104                         /* GPIO_PI6 aka TMP451 ALERT#/THERM2# */
1105                         pi6 {
1106                                 nvidia,pins = "pi6";
1107                                 nvidia,function = "rsvd1";
1108                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1109                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1110                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1111                         };
1112 
1113                         /* TOUCH_INT */
1114                         gpio-w3-aud-pw3 {
1115                                 nvidia,pins = "gpio_w3_aud_pw3";
1116                                 nvidia,function = "spi6";
1117                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1118                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1119                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1120                         };
1121 
1122                         pc7 { /* NC */
1123                                 nvidia,pins = "pc7";
1124                                 nvidia,function = "rsvd1";
1125                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1126                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1127                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1128                         };
1129                         pg0 { /* NC */
1130                                 nvidia,pins = "pg0";
1131                                 nvidia,function = "rsvd1";
1132                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1133                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1134                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1135                         };
1136                         pg1 { /* NC */
1137                                 nvidia,pins = "pg1";
1138                                 nvidia,function = "rsvd1";
1139                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1140                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1141                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1142                         };
1143                         pg2 { /* NC */
1144                                 nvidia,pins = "pg2";
1145                                 nvidia,function = "rsvd1";
1146                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1147                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1148                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1149                         };
1150                         pg3 { /* NC */
1151                                 nvidia,pins = "pg3";
1152                                 nvidia,function = "rsvd1";
1153                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1154                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1155                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1156                         };
1157                         pg4 { /* NC */
1158                                 nvidia,pins = "pg4";
1159                                 nvidia,function = "rsvd1";
1160                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1161                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1162                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1163                         };
1164                         ph4 { /* NC */
1165                                 nvidia,pins = "ph4";
1166                                 nvidia,function = "rsvd2";
1167                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1168                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1169                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1170                         };
1171                         ph5 { /* NC */
1172                                 nvidia,pins = "ph5";
1173                                 nvidia,function = "rsvd2";
1174                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1175                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1176                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1177                         };
1178                         ph6 { /* NC */
1179                                 nvidia,pins = "ph6";
1180                                 nvidia,function = "gmi";
1181                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1182                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1183                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1184                         };
1185                         ph7 { /* NC */
1186                                 nvidia,pins = "ph7";
1187                                 nvidia,function = "gmi";
1188                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1189                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1190                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1191                         };
1192                         pi0 { /* NC */
1193                                 nvidia,pins = "pi0";
1194                                 nvidia,function = "rsvd1";
1195                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1196                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1197                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1198                         };
1199                         pi1 { /* NC */
1200                                 nvidia,pins = "pi1";
1201                                 nvidia,function = "rsvd1";
1202                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1203                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1204                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1205                         };
1206                         pi2 { /* NC */
1207                                 nvidia,pins = "pi2";
1208                                 nvidia,function = "rsvd4";
1209                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1210                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1211                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1212                         };
1213                         pi4 { /* NC */
1214                                 nvidia,pins = "pi4";
1215                                 nvidia,function = "gmi";
1216                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1217                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1218                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1219                         };
1220                         pi7 { /* NC */
1221                                 nvidia,pins = "pi7";
1222                                 nvidia,function = "rsvd1";
1223                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1224                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1225                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1226                         };
1227                         pk0 { /* NC */
1228                                 nvidia,pins = "pk0";
1229                                 nvidia,function = "rsvd1";
1230                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1231                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1232                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1233                         };
1234                         pk1 { /* NC */
1235                                 nvidia,pins = "pk1";
1236                                 nvidia,function = "rsvd4";
1237                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1238                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1239                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1240                         };
1241                         pk3 { /* NC */
1242                                 nvidia,pins = "pk3";
1243                                 nvidia,function = "gmi";
1244                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1245                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1246                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1247                         };
1248                         pk4 { /* NC */
1249                                 nvidia,pins = "pk4";
1250                                 nvidia,function = "rsvd2";
1251                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1252                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1253                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1254                         };
1255                         dap1-fs-pn0 { /* NC */
1256                                 nvidia,pins = "dap1_fs_pn0";
1257                                 nvidia,function = "rsvd4";
1258                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1259                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1260                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1261                         };
1262                         dap1-din-pn1 { /* NC */
1263                                 nvidia,pins = "dap1_din_pn1";
1264                                 nvidia,function = "rsvd4";
1265                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1266                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1267                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1268                         };
1269                         dap1-sclk-pn3 { /* NC */
1270                                 nvidia,pins = "dap1_sclk_pn3";
1271                                 nvidia,function = "rsvd4";
1272                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1273                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1274                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1275                         };
1276                         ulpi-data7-po0 { /* NC */
1277                                 nvidia,pins = "ulpi_data7_po0";
1278                                 nvidia,function = "ulpi";
1279                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1280                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1281                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1282                         };
1283                         ulpi-data0-po1 { /* NC */
1284                                 nvidia,pins = "ulpi_data0_po1";
1285                                 nvidia,function = "ulpi";
1286                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1287                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1288                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1289                         };
1290                         ulpi-data1-po2 { /* NC */
1291                                 nvidia,pins = "ulpi_data1_po2";
1292                                 nvidia,function = "ulpi";
1293                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1294                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1295                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1296                         };
1297                         ulpi-data2-po3 { /* NC */
1298                                 nvidia,pins = "ulpi_data2_po3";
1299                                 nvidia,function = "ulpi";
1300                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1301                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1302                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1303                         };
1304                         ulpi-data3-po4 { /* NC */
1305                                 nvidia,pins = "ulpi_data3_po4";
1306                                 nvidia,function = "ulpi";
1307                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1308                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1309                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1310                         };
1311                         ulpi-data6-po7 { /* NC */
1312                                 nvidia,pins = "ulpi_data6_po7";
1313                                 nvidia,function = "ulpi";
1314                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1315                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1316                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1317                         };
1318                         dap4-fs-pp4 { /* NC */
1319                                 nvidia,pins = "dap4_fs_pp4";
1320                                 nvidia,function = "rsvd4";
1321                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1322                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1323                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1324                         };
1325                         dap4-din-pp5 { /* NC */
1326                                 nvidia,pins = "dap4_din_pp5";
1327                                 nvidia,function = "rsvd3";
1328                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1329                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1330                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1331                         };
1332                         dap4-dout-pp6 { /* NC */
1333                                 nvidia,pins = "dap4_dout_pp6";
1334                                 nvidia,function = "rsvd4";
1335                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1336                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1337                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1338                         };
1339                         dap4-sclk-pp7 { /* NC */
1340                                 nvidia,pins = "dap4_sclk_pp7";
1341                                 nvidia,function = "rsvd3";
1342                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1343                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1344                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1345                         };
1346                         kb-col3-pq3 { /* NC */
1347                                 nvidia,pins = "kb_col3_pq3";
1348                                 nvidia,function = "kbc";
1349                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1350                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1351                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1352                         };
1353                         kb-row3-pr3 { /* NC */
1354                                 nvidia,pins = "kb_row3_pr3";
1355                                 nvidia,function = "kbc";
1356                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1357                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1358                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1359                         };
1360                         kb-row4-pr4 { /* NC */
1361                                 nvidia,pins = "kb_row4_pr4";
1362                                 nvidia,function = "rsvd3";
1363                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1364                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1365                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1366                         };
1367                         kb-row5-pr5 { /* NC */
1368                                 nvidia,pins = "kb_row5_pr5";
1369                                 nvidia,function = "rsvd3";
1370                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1371                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1372                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1373                         };
1374                         kb-row6-pr6 { /* NC */
1375                                 nvidia,pins = "kb_row6_pr6";
1376                                 nvidia,function = "kbc";
1377                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1378                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1379                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1380                         };
1381                         kb-row7-pr7 { /* NC */
1382                                 nvidia,pins = "kb_row7_pr7";
1383                                 nvidia,function = "rsvd2";
1384                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1385                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1386                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1387                         };
1388                         kb-row8-ps0 { /* NC */
1389                                 nvidia,pins = "kb_row8_ps0";
1390                                 nvidia,function = "rsvd2";
1391                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1392                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1393                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1394                         };
1395                         kb-row9-ps1 { /* NC */
1396                                 nvidia,pins = "kb_row9_ps1";
1397                                 nvidia,function = "rsvd2";
1398                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1399                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1400                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1401                         };
1402                         kb-row12-ps4 { /* NC */
1403                                 nvidia,pins = "kb_row12_ps4";
1404                                 nvidia,function = "rsvd2";
1405                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1406                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1407                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1408                         };
1409                         kb-row13-ps5 { /* NC */
1410                                 nvidia,pins = "kb_row13_ps5";
1411                                 nvidia,function = "rsvd2";
1412                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1413                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1414                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1415                         };
1416                         kb-row14-ps6 { /* NC */
1417                                 nvidia,pins = "kb_row14_ps6";
1418                                 nvidia,function = "rsvd2";
1419                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1420                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1421                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1422                         };
1423                         kb-row15-ps7 { /* NC */
1424                                 nvidia,pins = "kb_row15_ps7";
1425                                 nvidia,function = "rsvd3";
1426                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1427                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1428                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1429                         };
1430                         kb-row16-pt0 { /* NC */
1431                                 nvidia,pins = "kb_row16_pt0";
1432                                 nvidia,function = "rsvd2";
1433                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1434                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1435                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1436                         };
1437                         kb-row17-pt1 { /* NC */
1438                                 nvidia,pins = "kb_row17_pt1";
1439                                 nvidia,function = "rsvd2";
1440                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1441                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1442                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1443                         };
1444                         pu5 { /* NC */
1445                                 nvidia,pins = "pu5";
1446                                 nvidia,function = "gmi";
1447                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1448                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1449                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1450                         };
1451                         pv0 { /* NC */
1452                                 nvidia,pins = "pv0";
1453                                 nvidia,function = "rsvd1";
1454                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1455                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1456                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1457                         };
1458                         pv1 { /* NC */
1459                                 nvidia,pins = "pv1";
1460                                 nvidia,function = "rsvd1";
1461                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1462                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1463                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1464                         };
1465                         gpio-x1-aud-px1 { /* NC */
1466                                 nvidia,pins = "gpio_x1_aud_px1";
1467                                 nvidia,function = "rsvd2";
1468                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1469                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1470                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1471                         };
1472                         gpio-x3-aud-px3 { /* NC */
1473                                 nvidia,pins = "gpio_x3_aud_px3";
1474                                 nvidia,function = "rsvd4";
1475                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1476                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1477                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1478                         };
1479                         pbb7 { /* NC */
1480                                 nvidia,pins = "pbb7";
1481                                 nvidia,function = "rsvd2";
1482                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1483                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1484                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1485                         };
1486                         pcc1 { /* NC */
1487                                 nvidia,pins = "pcc1";
1488                                 nvidia,function = "rsvd2";
1489                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1490                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1491                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1492                         };
1493                         pcc2 { /* NC */
1494                                 nvidia,pins = "pcc2";
1495                                 nvidia,function = "rsvd2";
1496                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1497                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1498                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1499                         };
1500                         clk3-req-pee1 { /* NC */
1501                                 nvidia,pins = "clk3_req_pee1";
1502                                 nvidia,function = "rsvd2";
1503                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1504                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1505                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1506                         };
1507                         dap-mclk1-req-pee2 { /* NC */
1508                                 nvidia,pins = "dap_mclk1_req_pee2";
1509                                 nvidia,function = "rsvd4";
1510                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1511                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1512                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1513                         };
1514                         /*
1515                          * Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output
1516                          * driver enabled aka not tristated and input driver
1517                          * enabled as well as it features some magic properties
1518                          * even though the external loopback is disabled and the
1519                          * internal loopback used as per
1520                          * SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1
1521                          * bits being set to 0xfffd according to the TRM!
1522                          */
1523                         sdmmc3-clk-lb-out-pee4 { /* NC */
1524                                 nvidia,pins = "sdmmc3_clk_lb_out_pee4";
1525                                 nvidia,function = "sdmmc3";
1526                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1527                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1528                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1529                         };
1530                 };
1531         };
1532 
1533         serial@70006040 {
1534                 compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1535                 /delete-property/ reg-shift;
1536         };
1537 
1538         serial@70006200 {
1539                 compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1540                 /delete-property/ reg-shift;
1541         };
1542 
1543         serial@70006300 {
1544                 compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1545                 /delete-property/ reg-shift;
1546         };
1547 
1548         hdmi_ddc: i2c@7000c400 {
1549                 clock-frequency = <10000>;
1550         };
1551 
1552         /* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor */
1553         i2c@7000d000 {
1554                 status = "okay";
1555                 clock-frequency = <400000>;
1556 
1557                 /* SGTL5000 audio codec */
1558                 sgtl5000: codec@a {
1559                         compatible = "fsl,sgtl5000";
1560                         reg = <0x0a>;
1561                         #sound-dai-cells = <0>;
1562                         VDDA-supply = <&reg_module_3v3_audio>;
1563                         VDDD-supply = <&reg_1v8_vddio>;
1564                         VDDIO-supply = <&reg_1v8_vddio>;
1565                         clocks = <&tegra_car TEGRA124_CLK_EXTERN1>;
1566                 };
1567 
1568                 pmic: pmic@40 {
1569                         compatible = "ams,as3722";
1570                         reg = <0x40>;
1571                         interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
1572                         ams,system-power-controller;
1573                         #interrupt-cells = <2>;
1574                         interrupt-controller;
1575                         gpio-controller;
1576                         #gpio-cells = <2>;
1577                         pinctrl-names = "default";
1578                         pinctrl-0 = <&as3722_default>;
1579 
1580                         as3722_default: pinmux {
1581                                 gpio2-7 {
1582                                         pins = "gpio2", /* PWR_EN_+V3.3 */
1583                                                "gpio7"; /* +V1.6_LPO */
1584                                         function = "gpio";
1585                                         bias-pull-up;
1586                                 };
1587 
1588                                 gpio0-1-3-4-5-6 {
1589                                         pins = "gpio0", "gpio1", "gpio3",
1590                                                "gpio4", "gpio5", "gpio6";
1591                                         bias-high-impedance;
1592                                 };
1593                         };
1594 
1595                         regulators {
1596                                 vsup-sd2-supply = <&reg_module_3v3>;
1597                                 vsup-sd3-supply = <&reg_module_3v3>;
1598                                 vsup-sd4-supply = <&reg_module_3v3>;
1599                                 vsup-sd5-supply = <&reg_module_3v3>;
1600                                 vin-ldo0-supply = <&reg_1v35_vddio_ddr>;
1601                                 vin-ldo1-6-supply = <&reg_module_3v3>;
1602                                 vin-ldo2-5-7-supply = <&reg_1v8_vddio>;
1603                                 vin-ldo3-4-supply = <&reg_module_3v3>;
1604                                 vin-ldo9-10-supply = <&reg_module_3v3>;
1605                                 vin-ldo11-supply = <&reg_module_3v3>;
1606 
1607                                 reg_vdd_cpu: sd0 {
1608                                         regulator-name = "+VDD_CPU_AP";
1609                                         regulator-min-microvolt = <700000>;
1610                                         regulator-max-microvolt = <1400000>;
1611                                         regulator-min-microamp = <3500000>;
1612                                         regulator-max-microamp = <3500000>;
1613                                         regulator-always-on;
1614                                         regulator-boot-on;
1615                                         ams,ext-control = <2>;
1616                                 };
1617 
1618                                 sd1 {
1619                                         regulator-name = "+VDD_CORE";
1620                                         regulator-min-microvolt = <700000>;
1621                                         regulator-max-microvolt = <1350000>;
1622                                         regulator-min-microamp = <2500000>;
1623                                         regulator-max-microamp = <4000000>;
1624                                         regulator-always-on;
1625                                         regulator-boot-on;
1626                                         ams,ext-control = <1>;
1627                                 };
1628 
1629                                 reg_1v35_vddio_ddr: sd2 {
1630                                         regulator-name =
1631                                                 "+V1.35_VDDIO_DDR(sd2)";
1632                                         regulator-min-microvolt = <1350000>;
1633                                         regulator-max-microvolt = <1350000>;
1634                                         regulator-always-on;
1635                                         regulator-boot-on;
1636                                 };
1637 
1638                                 sd3 {
1639                                         regulator-name =
1640                                                 "+V1.35_VDDIO_DDR(sd3)";
1641                                         regulator-min-microvolt = <1350000>;
1642                                         regulator-max-microvolt = <1350000>;
1643                                         regulator-always-on;
1644                                         regulator-boot-on;
1645                                 };
1646 
1647                                 reg_1v05_vdd: sd4 {
1648                                         regulator-name = "+V1.05";
1649                                         regulator-min-microvolt = <1050000>;
1650                                         regulator-max-microvolt = <1050000>;
1651                                 };
1652 
1653                                 reg_1v8_vddio: sd5 {
1654                                         regulator-name = "+V1.8";
1655                                         regulator-min-microvolt = <1800000>;
1656                                         regulator-max-microvolt = <1800000>;
1657                                         regulator-boot-on;
1658                                         regulator-always-on;
1659                                 };
1660 
1661                                 reg_vdd_gpu: sd6 {
1662                                         regulator-name = "+VDD_GPU_AP";
1663                                         regulator-min-microvolt = <650000>;
1664                                         regulator-max-microvolt = <1200000>;
1665                                         regulator-min-microamp = <3500000>;
1666                                         regulator-max-microamp = <3500000>;
1667                                         regulator-boot-on;
1668                                         regulator-always-on;
1669                                 };
1670 
1671                                 reg_1v05_avdd: ldo0 {
1672                                         regulator-name = "+V1.05_AVDD";
1673                                         regulator-min-microvolt = <1050000>;
1674                                         regulator-max-microvolt = <1050000>;
1675                                         regulator-boot-on;
1676                                         regulator-always-on;
1677                                         ams,ext-control = <1>;
1678                                 };
1679 
1680                                 vddio_sdmmc1: ldo1 {
1681                                         regulator-name = "VDDIO_SDMMC1";
1682                                         regulator-min-microvolt = <1800000>;
1683                                         regulator-max-microvolt = <3300000>;
1684                                 };
1685 
1686                                 ldo2 {
1687                                         regulator-name = "+V1.2";
1688                                         regulator-min-microvolt = <1200000>;
1689                                         regulator-max-microvolt = <1200000>;
1690                                         regulator-boot-on;
1691                                         regulator-always-on;
1692                                 };
1693 
1694                                 ldo3 {
1695                                         regulator-name = "+V1.05_RTC";
1696                                         regulator-min-microvolt = <1000000>;
1697                                         regulator-max-microvolt = <1000000>;
1698                                         regulator-boot-on;
1699                                         regulator-always-on;
1700                                         ams,enable-tracking;
1701                                 };
1702 
1703                                 /* 1.8V for LVDS, 3.3V for eDP */
1704                                 ldo4 {
1705                                         regulator-name = "AVDD_LVDS0_PLL";
1706                                         regulator-min-microvolt = <1800000>;
1707                                         regulator-max-microvolt = <1800000>;
1708                                 };
1709 
1710                                 /* LDO5 not used */
1711 
1712                                 vddio_sdmmc3: ldo6 {
1713                                         regulator-name = "VDDIO_SDMMC3";
1714                                         regulator-min-microvolt = <1800000>;
1715                                         regulator-max-microvolt = <3300000>;
1716                                 };
1717 
1718                                 /* LDO7 not used */
1719 
1720                                 ldo9 {
1721                                         regulator-name = "+V3.3_ETH(ldo9)";
1722                                         regulator-min-microvolt = <3300000>;
1723                                         regulator-max-microvolt = <3300000>;
1724                                         regulator-always-on;
1725                                 };
1726 
1727                                 ldo10 {
1728                                         regulator-name = "+V3.3_ETH(ldo10)";
1729                                         regulator-min-microvolt = <3300000>;
1730                                         regulator-max-microvolt = <3300000>;
1731                                         regulator-always-on;
1732                                 };
1733 
1734                                 ldo11 {
1735                                         regulator-name = "+V1.8_VPP_FUSE";
1736                                         regulator-min-microvolt = <1800000>;
1737                                         regulator-max-microvolt = <1800000>;
1738                                 };
1739                         };
1740                 };
1741 
1742                 /*
1743                  * TMP451 temperature sensor
1744                  * Note: THERM_N directly connected to AS3722 PMIC THERM
1745                  */
1746                 temp-sensor@4c {
1747                         compatible = "ti,tmp451";
1748                         reg = <0x4c>;
1749                         interrupt-parent = <&gpio>;
1750                         interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_EDGE_FALLING>;
1751                         #thermal-sensor-cells = <1>;
1752                         vcc-supply = <&reg_module_3v3>;
1753                 };
1754         };
1755 
1756         /* SPI2: MCU SPI */
1757         spi@7000d600 {
1758                 status = "okay";
1759                 spi-max-frequency = <25000000>;
1760         };
1761 
1762         pmc@7000e400 {
1763                 nvidia,invert-interrupt;
1764                 nvidia,suspend-mode = <1>;
1765                 nvidia,cpu-pwr-good-time = <500>;
1766                 nvidia,cpu-pwr-off-time = <300>;
1767                 nvidia,core-pwr-good-time = <641 3845>;
1768                 nvidia,core-pwr-off-time = <61036>;
1769                 nvidia,core-power-req-active-high;
1770                 nvidia,sys-clock-req-active-high;
1771 
1772                 /* Set power_off bit in ResetControl register of AS3722 PMIC */
1773                 i2c-thermtrip {
1774                         nvidia,i2c-controller-id = <4>;
1775                         nvidia,bus-addr = <0x40>;
1776                         nvidia,reg-addr = <0x36>;
1777                         nvidia,reg-data = <0x2>;
1778                 };
1779         };
1780 
1781         sata@70020000 {
1782                 phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>;
1783                 phy-names = "sata-0";
1784                 avdd-supply = <&reg_1v05_vdd>;
1785                 hvdd-supply = <&reg_module_3v3>;
1786                 vddio-supply = <&reg_1v05_vdd>;
1787         };
1788 
1789         usb@70090000 {
1790                 /* USBO1, USBO1 (SS), USBH2, USBH4 and USBH4 (SS) */
1791                 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>,
1792                        <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
1793                        <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>,
1794                        <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>,
1795                        <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>;
1796                 phy-names = "usb2-0", "usb3-1", "usb2-1", "usb2-2", "usb3-0";
1797                 avddio-pex-supply = <&reg_1v05_vdd>;
1798                 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
1799                 avdd-pll-utmip-supply = <&reg_1v8_vddio>;
1800                 avdd-usb-ss-pll-supply = <&reg_1v05_vdd>;
1801                 avdd-usb-supply = <&reg_module_3v3>;
1802                 dvddio-pex-supply = <&reg_1v05_vdd>;
1803                 hvdd-usb-ss-pll-e-supply = <&reg_module_3v3>;
1804                 hvdd-usb-ss-supply = <&reg_module_3v3>;
1805         };
1806 
1807         padctl@7009f000 {
1808                 avdd-pll-utmip-supply = <&reg_1v8_vddio>;
1809                 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
1810                 avdd-pex-pll-supply = <&reg_1v05_vdd>;
1811                 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
1812 
1813                 pads {
1814                         usb2 {
1815                                 status = "okay";
1816 
1817                                 lanes {
1818                                         usb2-0 {
1819                                                 status = "okay";
1820                                                 nvidia,function = "xusb";
1821                                         };
1822 
1823                                         usb2-1 {
1824                                                 status = "okay";
1825                                                 nvidia,function = "xusb";
1826                                         };
1827 
1828                                         usb2-2 {
1829                                                 status = "okay";
1830                                                 nvidia,function = "xusb";
1831                                         };
1832                                 };
1833                         };
1834 
1835                         pcie {
1836                                 status = "okay";
1837 
1838                                 lanes {
1839                                         pcie-0 {
1840                                                 status = "okay";
1841                                                 nvidia,function = "usb3-ss";
1842                                         };
1843 
1844                                         pcie-1 {
1845                                                 status = "okay";
1846                                                 nvidia,function = "usb3-ss";
1847                                         };
1848 
1849                                         pcie-2 {
1850                                                 status = "okay";
1851                                                 nvidia,function = "pcie";
1852                                         };
1853 
1854                                         pcie-3 {
1855                                                 status = "okay";
1856                                                 nvidia,function = "pcie";
1857                                         };
1858 
1859                                         pcie-4 {
1860                                                 status = "okay";
1861                                                 nvidia,function = "pcie";
1862                                         };
1863                                 };
1864                         };
1865 
1866                         sata {
1867                                 status = "okay";
1868 
1869                                 lanes {
1870                                         sata-0 {
1871                                                 status = "okay";
1872                                                 nvidia,function = "sata";
1873                                         };
1874                                 };
1875                         };
1876                 };
1877 
1878                 ports {
1879                         /* USBO1 */
1880                         usb2-0 {
1881                                 status = "okay";
1882                                 mode = "otg";
1883                                 usb-role-switch;
1884                                 vbus-supply = <&reg_usbo1_vbus>;
1885                         };
1886 
1887                         /* USBH2 */
1888                         usb2-1 {
1889                                 status = "okay";
1890                                 mode = "host";
1891                                 vbus-supply = <&reg_usbh_vbus>;
1892                         };
1893 
1894                         /* USBH4 */
1895                         usb2-2 {
1896                                 status = "okay";
1897                                 mode = "host";
1898                                 vbus-supply = <&reg_usbh_vbus>;
1899                         };
1900 
1901                         usb3-0 {
1902                                 status = "okay";
1903                                 nvidia,usb2-companion = <2>;
1904                                 vbus-supply = <&reg_usbh_vbus>;
1905                         };
1906 
1907                         usb3-1 {
1908                                 status = "okay";
1909                                 nvidia,usb2-companion = <0>;
1910                                 vbus-supply = <&reg_usbo1_vbus>;
1911                         };
1912                 };
1913         };
1914 
1915         /* eMMC */
1916         mmc@700b0600 {
1917                 status = "okay";
1918                 bus-width = <8>;
1919                 non-removable;
1920                 vmmc-supply = <&reg_module_3v3>; /* VCC */
1921                 vqmmc-supply = <&reg_1v8_vddio>; /* VCCQ */
1922                 mmc-ddr-1_8v;
1923         };
1924 
1925         /* CPU DFLL clock */
1926         clock@70110000 {
1927                 status = "okay";
1928                 nvidia,i2c-fs-rate = <400000>;
1929                 vdd-cpu-supply = <&reg_vdd_cpu>;
1930         };
1931 
1932         ahub@70300000 {
1933                 i2s@70301200 {
1934                         status = "okay";
1935                 };
1936         };
1937 
1938         clk32k_in: osc3 {
1939                 compatible = "fixed-clock";
1940                 #clock-cells = <0>;
1941                 clock-frequency = <32768>;
1942         };
1943 
1944         cpus {
1945                 cpu@0 {
1946                         vdd-cpu-supply = <&reg_vdd_cpu>;
1947                 };
1948         };
1949 
1950         reg_1v05_avdd_hdmi_pll: regulator-1v05-avdd-hdmi-pll {
1951                 compatible = "regulator-fixed";
1952                 regulator-name = "+V1.05_AVDD_HDMI_PLL";
1953                 regulator-min-microvolt = <1050000>;
1954                 regulator-max-microvolt = <1050000>;
1955                 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1956                 vin-supply = <&reg_1v05_vdd>;
1957         };
1958 
1959         reg_3v3_mxm: regulator-3v3-mxm {
1960                 compatible = "regulator-fixed";
1961                 regulator-name = "+V3.3_MXM";
1962                 regulator-min-microvolt = <3300000>;
1963                 regulator-max-microvolt = <3300000>;
1964                 regulator-always-on;
1965                 regulator-boot-on;
1966         };
1967 
1968         reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
1969                 compatible = "regulator-fixed";
1970                 regulator-name = "+V3.3_AVDD_HDMI";
1971                 regulator-min-microvolt = <3300000>;
1972                 regulator-max-microvolt = <3300000>;
1973                 vin-supply = <&reg_1v05_vdd>;
1974         };
1975 
1976         reg_module_3v3: regulator-module-3v3 {
1977                 compatible = "regulator-fixed";
1978                 regulator-name = "+V3.3";
1979                 regulator-min-microvolt = <3300000>;
1980                 regulator-max-microvolt = <3300000>;
1981                 regulator-always-on;
1982                 regulator-boot-on;
1983                 /* PWR_EN_+V3.3 */
1984                 gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1985                 enable-active-high;
1986                 vin-supply = <&reg_3v3_mxm>;
1987         };
1988 
1989         reg_module_3v3_audio: regulator-module-3v3-audio {
1990                 compatible = "regulator-fixed";
1991                 regulator-name = "+V3.3_AUDIO_AVDD_S";
1992                 regulator-min-microvolt = <3300000>;
1993                 regulator-max-microvolt = <3300000>;
1994                 regulator-always-on;
1995         };
1996 
1997         sound {
1998                 compatible = "toradex,tegra-audio-sgtl5000-apalis_tk1",
1999                              "nvidia,tegra-audio-sgtl5000";
2000                 nvidia,model = "Toradex Apalis TK1";
2001                 nvidia,audio-routing =
2002                         "Headphone Jack", "HP_OUT",
2003                         "LINE_IN", "Line In Jack",
2004                         "MIC_IN", "Mic Jack";
2005                 nvidia,i2s-controller = <&tegra_i2s2>;
2006                 nvidia,audio-codec = <&sgtl5000>;
2007                 clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
2008                          <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2009                          <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2010                 clock-names = "pll_a", "pll_a_out0", "mclk";
2011 
2012                 assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
2013                                   <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2014 
2015                 assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2016                                          <&tegra_car TEGRA124_CLK_EXTERN1>;
2017         };
2018 
2019         thermal-zones {
2020                 cpu-thermal {
2021                         trips {
2022                                 cpu-shutdown-trip {
2023                                         temperature = <101000>;
2024                                         hysteresis = <0>;
2025                                         type = "critical";
2026                                 };
2027                         };
2028                 };
2029 
2030                 mem-thermal {
2031                         trips {
2032                                 mem-shutdown-trip {
2033                                         temperature = <101000>;
2034                                         hysteresis = <0>;
2035                                         type = "critical";
2036                                 };
2037                         };
2038                 };
2039 
2040                 gpu-thermal {
2041                         trips {
2042                                 gpu-shutdown-trip {
2043                                         temperature = <101000>;
2044                                         hysteresis = <0>;
2045                                         type = "critical";
2046                                 };
2047                         };
2048                 };
2049         };
2050 };
2051 
2052 &gpio {
2053         /* I210 Gigabit Ethernet Controller Reset */
2054         lan-reset-n-hog {
2055                 gpio-hog;
2056                 gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
2057                 output-high;
2058                 line-name = "LAN_RESET_N";
2059         };
2060 
2061         /* Control MXM3 pin 26 Reset Module Output Carrier Input */
2062         reset-moci-ctrl-hog {
2063                 gpio-hog;
2064                 gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
2065                 output-high;
2066                 line-name = "RESET_MOCI_CTRL";
2067         };
2068 };