Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0 OR MIT
0002 /*
0003  * Copyright 2016-2018 Toradex AG
0004  */
0005 
0006 #include "tegra124.dtsi"
0007 #include "tegra124-apalis-emc.dtsi"
0008 
0009 /*
0010  * Toradex Apalis TK1 Module Device Tree
0011  * Compatible for Revisions 2GB: V1.2A
0012  */
0013 / {
0014         memory@80000000 {
0015                 reg = <0x0 0x80000000 0x0 0x80000000>;
0016         };
0017 
0018         pcie@1003000 {
0019                 status = "okay";
0020 
0021                 avddio-pex-supply = <&reg_1v05_vdd>;
0022                 avdd-pex-pll-supply = <&reg_1v05_vdd>;
0023                 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
0024                 dvddio-pex-supply = <&reg_1v05_vdd>;
0025                 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
0026                 hvdd-pex-supply = <&reg_module_3v3>;
0027                 vddio-pex-ctl-supply = <&reg_module_3v3>;
0028 
0029                 /* Apalis PCIe (additional lane Apalis type specific) */
0030                 pci@1,0 {
0031                         /* PCIE1_RX/TX and TS_DIFF1/2 */
0032                         phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>,
0033                                <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>;
0034                         phy-names = "pcie-0", "pcie-1";
0035                 };
0036 
0037                 /* I210 Gigabit Ethernet Controller (On-module) */
0038                 pci@2,0 {
0039                         phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>;
0040                         phy-names = "pcie-0";
0041                         status = "okay";
0042 
0043                         ethernet@0,0 {
0044                                 reg = <0 0 0 0 0>;
0045                                 local-mac-address = [00 00 00 00 00 00];
0046                         };
0047                 };
0048         };
0049 
0050         host1x@50000000 {
0051                 hdmi@54280000 {
0052                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
0053                         nvidia,hpd-gpio =
0054                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
0055                         pll-supply = <&reg_1v05_avdd_hdmi_pll>;
0056                         vdd-supply = <&reg_3v3_avdd_hdmi>;
0057                 };
0058         };
0059 
0060         gpu@57000000 {
0061                 /*
0062                  * Node left disabled on purpose - the bootloader will enable
0063                  * it after having set the VPR up
0064                  */
0065                 vdd-supply = <&reg_vdd_gpu>;
0066         };
0067 
0068         pinmux@70000868 {
0069                 pinctrl-names = "default";
0070                 pinctrl-0 = <&state_default>;
0071 
0072                 state_default: pinmux {
0073                         /* Analogue Audio (On-module) */
0074                         dap3-fs-pp0 {
0075                                 nvidia,pins = "dap3_fs_pp0";
0076                                 nvidia,function = "i2s2";
0077                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0078                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0079                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0080                         };
0081                         dap3-din-pp1 {
0082                                 nvidia,pins = "dap3_din_pp1";
0083                                 nvidia,function = "i2s2";
0084                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0085                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0086                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0087                         };
0088                         dap3-dout-pp2 {
0089                                 nvidia,pins = "dap3_dout_pp2";
0090                                 nvidia,function = "i2s2";
0091                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0092                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0093                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0094                         };
0095                         dap3-sclk-pp3 {
0096                                 nvidia,pins = "dap3_sclk_pp3";
0097                                 nvidia,function = "i2s2";
0098                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0099                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0100                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0101                         };
0102                         dap-mclk1-pw4 {
0103                                 nvidia,pins = "dap_mclk1_pw4";
0104                                 nvidia,function = "extperiph1";
0105                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0106                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0107                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0108                         };
0109 
0110                         /* Apalis BKL1_ON */
0111                         pbb5 {
0112                                 nvidia,pins = "pbb5";
0113                                 nvidia,function = "vgp5";
0114                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0115                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0116                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0117                         };
0118 
0119                         /* Apalis BKL1_PWM */
0120                         pu6 {
0121                                 nvidia,pins = "pu6";
0122                                 nvidia,function = "pwm3";
0123                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0124                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0125                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0126                         };
0127 
0128                         /* Apalis CAM1_MCLK */
0129                         cam-mclk-pcc0 {
0130                                 nvidia,pins = "cam_mclk_pcc0";
0131                                 nvidia,function = "vi_alt3";
0132                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0133                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0134                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0135                         };
0136 
0137                         /* Apalis Digital Audio */
0138                         dap2-fs-pa2 {
0139                                 nvidia,pins = "dap2_fs_pa2";
0140                                 nvidia,function = "hda";
0141                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0142                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0143                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0144                         };
0145                         dap2-sclk-pa3 {
0146                                 nvidia,pins = "dap2_sclk_pa3";
0147                                 nvidia,function = "hda";
0148                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0149                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0150                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0151                         };
0152                         dap2-din-pa4 {
0153                                 nvidia,pins = "dap2_din_pa4";
0154                                 nvidia,function = "hda";
0155                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0156                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0157                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0158                         };
0159                         dap2-dout-pa5 {
0160                                 nvidia,pins = "dap2_dout_pa5";
0161                                 nvidia,function = "hda";
0162                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0163                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0164                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0165                         };
0166                         pbb3 { /* DAP1_RESET */
0167                                 nvidia,pins = "pbb3";
0168                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0169                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0170                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0171                         };
0172                         clk3-out-pee0 {
0173                                 nvidia,pins = "clk3_out_pee0";
0174                                 nvidia,function = "extperiph3";
0175                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0176                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0177                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0178                         };
0179 
0180                         /* Apalis GPIO */
0181                         usb-vbus-en0-pn4 {
0182                                 nvidia,pins = "usb_vbus_en0_pn4";
0183                                 nvidia,function = "rsvd2";
0184                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0185                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0186                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0187                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
0188                         };
0189                         usb-vbus-en1-pn5 {
0190                                 nvidia,pins = "usb_vbus_en1_pn5";
0191                                 nvidia,function = "rsvd2";
0192                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0193                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0194                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0195                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
0196                         };
0197                         pex-l0-rst-n-pdd1 {
0198                                 nvidia,pins = "pex_l0_rst_n_pdd1";
0199                                 nvidia,function = "rsvd2";
0200                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0201                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0202                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0203                         };
0204                         pex-l0-clkreq-n-pdd2 {
0205                                 nvidia,pins = "pex_l0_clkreq_n_pdd2";
0206                                 nvidia,function = "rsvd2";
0207                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0208                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0209                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0210                         };
0211                         pex-l1-rst-n-pdd5 {
0212                                 nvidia,pins = "pex_l1_rst_n_pdd5";
0213                                 nvidia,function = "rsvd2";
0214                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0215                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0216                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0217                         };
0218                         pex-l1-clkreq-n-pdd6 {
0219                                 nvidia,pins = "pex_l1_clkreq_n_pdd6";
0220                                 nvidia,function = "rsvd2";
0221                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0222                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0223                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0224                         };
0225                         dp-hpd-pff0 {
0226                                 nvidia,pins = "dp_hpd_pff0";
0227                                 nvidia,function = "dp";
0228                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0229                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0230                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0231                         };
0232                         pff2 {
0233                                 nvidia,pins = "pff2";
0234                                 nvidia,function = "rsvd2";
0235                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0236                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0237                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0238                         };
0239                         owr { /* PEX_L1_CLKREQ_N multiplexed GPIO6 */
0240                                 nvidia,pins = "owr";
0241                                 nvidia,function = "rsvd2";
0242                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0243                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0244                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0245                                 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
0246                         };
0247 
0248                         /* Apalis HDMI1_CEC */
0249                         hdmi-cec-pee3 {
0250                                 nvidia,pins = "hdmi_cec_pee3";
0251                                 nvidia,function = "cec";
0252                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0253                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0254                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0255                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
0256                         };
0257 
0258                         /* Apalis HDMI1_HPD */
0259                         hdmi-int-pn7 {
0260                                 nvidia,pins = "hdmi_int_pn7";
0261                                 nvidia,function = "rsvd1";
0262                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
0263                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0264                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0265                                 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
0266                         };
0267 
0268                         /* Apalis I2C1 */
0269                         gen1-i2c-scl-pc4 {
0270                                 nvidia,pins = "gen1_i2c_scl_pc4";
0271                                 nvidia,function = "i2c1";
0272                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0273                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0274                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0275                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0276                         };
0277                         gen1-i2c-sda-pc5 {
0278                                 nvidia,pins = "gen1_i2c_sda_pc5";
0279                                 nvidia,function = "i2c1";
0280                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0281                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0282                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0283                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0284                         };
0285 
0286                         /* Apalis I2C3 (CAM) */
0287                         cam-i2c-scl-pbb1 {
0288                                 nvidia,pins = "cam_i2c_scl_pbb1";
0289                                 nvidia,function = "i2c3";
0290                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0291                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0292                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0293                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0294                         };
0295                         cam-i2c-sda-pbb2 {
0296                                 nvidia,pins = "cam_i2c_sda_pbb2";
0297                                 nvidia,function = "i2c3";
0298                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0299                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0300                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0301                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0302                         };
0303 
0304                         /* Apalis I2C4 (DDC) */
0305                         ddc-scl-pv4 {
0306                                 nvidia,pins = "ddc_scl_pv4";
0307                                 nvidia,function = "i2c4";
0308                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0309                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0310                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0311                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
0312                         };
0313                         ddc-sda-pv5 {
0314                                 nvidia,pins = "ddc_sda_pv5";
0315                                 nvidia,function = "i2c4";
0316                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0317                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0318                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0319                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
0320                         };
0321 
0322                         /* Apalis MMC1 */
0323                         sdmmc1-cd-n-pv3 { /* CD# GPIO */
0324                                 nvidia,pins = "sdmmc1_wp_n_pv3";
0325                                 nvidia,function = "sdmmc1";
0326                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0327                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0328                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0329                         };
0330                         clk2-out-pw5 { /* D5 GPIO */
0331                                 nvidia,pins = "clk2_out_pw5";
0332                                 nvidia,function = "rsvd2";
0333                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0334                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0335                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0336                         };
0337                         sdmmc1-dat3-py4 {
0338                                 nvidia,pins = "sdmmc1_dat3_py4";
0339                                 nvidia,function = "sdmmc1";
0340                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0341                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0342                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0343                         };
0344                         sdmmc1-dat2-py5 {
0345                                 nvidia,pins = "sdmmc1_dat2_py5";
0346                                 nvidia,function = "sdmmc1";
0347                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0348                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0349                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0350                         };
0351                         sdmmc1-dat1-py6 {
0352                                 nvidia,pins = "sdmmc1_dat1_py6";
0353                                 nvidia,function = "sdmmc1";
0354                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0355                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0356                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0357                         };
0358                         sdmmc1-dat0-py7 {
0359                                 nvidia,pins = "sdmmc1_dat0_py7";
0360                                 nvidia,function = "sdmmc1";
0361                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0362                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0363                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0364                         };
0365                         sdmmc1-clk-pz0 {
0366                                 nvidia,pins = "sdmmc1_clk_pz0";
0367                                 nvidia,function = "sdmmc1";
0368                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0369                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0370                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0371                         };
0372                         sdmmc1-cmd-pz1 {
0373                                 nvidia,pins = "sdmmc1_cmd_pz1";
0374                                 nvidia,function = "sdmmc1";
0375                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0376                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0377                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0378                         };
0379                         clk2-req-pcc5 { /* D4 GPIO */
0380                                 nvidia,pins = "clk2_req_pcc5";
0381                                 nvidia,function = "rsvd2";
0382                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0383                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0384                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0385                         };
0386                         sdmmc3-clk-lb-in-pee5 { /* D6 GPIO */
0387                                 nvidia,pins = "sdmmc3_clk_lb_in_pee5";
0388                                 nvidia,function = "rsvd2";
0389                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0390                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0391                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0392                         };
0393                         usb-vbus-en2-pff1 { /* D7 GPIO */
0394                                 nvidia,pins = "usb_vbus_en2_pff1";
0395                                 nvidia,function = "rsvd2";
0396                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0397                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0398                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0399                         };
0400 
0401                         /* Apalis PWM */
0402                         ph0 {
0403                                 nvidia,pins = "ph0";
0404                                 nvidia,function = "pwm0";
0405                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0406                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0407                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0408                         };
0409                         ph1 {
0410                                 nvidia,pins = "ph1";
0411                                 nvidia,function = "pwm1";
0412                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0413                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0414                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0415                         };
0416                         ph2 {
0417                                 nvidia,pins = "ph2";
0418                                 nvidia,function = "pwm2";
0419                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0420                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0421                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0422                         };
0423                         /* PWM3 active on pu6 being Apalis BKL1_PWM as well */
0424                         ph3 {
0425                                 nvidia,pins = "ph3";
0426                                 nvidia,function = "pwm3";
0427                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0428                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0429                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0430                         };
0431 
0432                         /* Apalis SATA1_ACT# */
0433                         dap1-dout-pn2 {
0434                                 nvidia,pins = "dap1_dout_pn2";
0435                                 nvidia,function = "gmi";
0436                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0437                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0438                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0439                         };
0440 
0441                         /* Apalis SD1 */
0442                         sdmmc3-clk-pa6 {
0443                                 nvidia,pins = "sdmmc3_clk_pa6";
0444                                 nvidia,function = "sdmmc3";
0445                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0446                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0447                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0448                         };
0449                         sdmmc3-cmd-pa7 {
0450                                 nvidia,pins = "sdmmc3_cmd_pa7";
0451                                 nvidia,function = "sdmmc3";
0452                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0453                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0454                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0455                         };
0456                         sdmmc3-dat3-pb4 {
0457                                 nvidia,pins = "sdmmc3_dat3_pb4";
0458                                 nvidia,function = "sdmmc3";
0459                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0460                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0461                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0462                         };
0463                         sdmmc3-dat2-pb5 {
0464                                 nvidia,pins = "sdmmc3_dat2_pb5";
0465                                 nvidia,function = "sdmmc3";
0466                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0467                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0468                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0469                         };
0470                         sdmmc3-dat1-pb6 {
0471                                 nvidia,pins = "sdmmc3_dat1_pb6";
0472                                 nvidia,function = "sdmmc3";
0473                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0474                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0475                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0476                         };
0477                         sdmmc3-dat0-pb7 {
0478                                 nvidia,pins = "sdmmc3_dat0_pb7";
0479                                 nvidia,function = "sdmmc3";
0480                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0481                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0482                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0483                         };
0484                         sdmmc3-cd-n-pv2 { /* CD# GPIO */
0485                                 nvidia,pins = "sdmmc3_cd_n_pv2";
0486                                 nvidia,function = "rsvd3";
0487                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0488                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0489                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0490                         };
0491 
0492                         /* Apalis SPDIF */
0493                         spdif-out-pk5 {
0494                                 nvidia,pins = "spdif_out_pk5";
0495                                 nvidia,function = "spdif";
0496                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0497                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0498                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0499                         };
0500                         spdif-in-pk6 {
0501                                 nvidia,pins = "spdif_in_pk6";
0502                                 nvidia,function = "spdif";
0503                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0504                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0505                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0506                         };
0507 
0508                         /* Apalis SPI1 */
0509                         ulpi-clk-py0 {
0510                                 nvidia,pins = "ulpi_clk_py0";
0511                                 nvidia,function = "spi1";
0512                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0513                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0514                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0515                         };
0516                         ulpi-dir-py1 {
0517                                 nvidia,pins = "ulpi_dir_py1";
0518                                 nvidia,function = "spi1";
0519                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0520                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0521                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0522                         };
0523                         ulpi-nxt-py2 {
0524                                 nvidia,pins = "ulpi_nxt_py2";
0525                                 nvidia,function = "spi1";
0526                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0527                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0528                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0529                         };
0530                         ulpi-stp-py3 {
0531                                 nvidia,pins = "ulpi_stp_py3";
0532                                 nvidia,function = "spi1";
0533                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0534                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0535                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0536                         };
0537 
0538                         /* Apalis SPI2 */
0539                         pg5 {
0540                                 nvidia,pins = "pg5";
0541                                 nvidia,function = "spi4";
0542                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0543                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0544                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0545                         };
0546                         pg6 {
0547                                 nvidia,pins = "pg6";
0548                                 nvidia,function = "spi4";
0549                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0550                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0551                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0552                         };
0553                         pg7 {
0554                                 nvidia,pins = "pg7";
0555                                 nvidia,function = "spi4";
0556                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0557                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0558                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0559                         };
0560                         pi3 {
0561                                 nvidia,pins = "pi3";
0562                                 nvidia,function = "spi4";
0563                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0564                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0565                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0566                         };
0567 
0568                         /* Apalis UART1 */
0569                         pb1 { /* DCD GPIO */
0570                                 nvidia,pins = "pb1";
0571                                 nvidia,function = "rsvd2";
0572                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0573                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0574                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0575                         };
0576                         pk7 { /* RI GPIO */
0577                                 nvidia,pins = "pk7";
0578                                 nvidia,function = "rsvd2";
0579                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0580                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0581                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0582                         };
0583                         uart1-txd-pu0 {
0584                                 nvidia,pins = "pu0";
0585                                 nvidia,function = "uarta";
0586                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0587                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0588                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0589                         };
0590                         uart1-rxd-pu1 {
0591                                 nvidia,pins = "pu1";
0592                                 nvidia,function = "uarta";
0593                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0594                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0595                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0596                         };
0597                         uart1-cts-n-pu2 {
0598                                 nvidia,pins = "pu2";
0599                                 nvidia,function = "uarta";
0600                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0601                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0602                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0603                         };
0604                         uart1-rts-n-pu3 {
0605                                 nvidia,pins = "pu3";
0606                                 nvidia,function = "uarta";
0607                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0608                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0609                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0610                         };
0611                         uart3-cts-n-pa1 { /* DSR GPIO */
0612                                 nvidia,pins = "uart3_cts_n_pa1";
0613                                 nvidia,function = "gmi";
0614                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0615                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0616                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0617                         };
0618                         uart3-rts-n-pc0 { /* DTR GPIO */
0619                                 nvidia,pins = "uart3_rts_n_pc0";
0620                                 nvidia,function = "gmi";
0621                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0622                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0623                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0624                         };
0625 
0626                         /* Apalis UART2 */
0627                         uart2-txd-pc2 {
0628                                 nvidia,pins = "uart2_txd_pc2";
0629                                 nvidia,function = "irda";
0630                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0631                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0632                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0633                         };
0634                         uart2-rxd-pc3 {
0635                                 nvidia,pins = "uart2_rxd_pc3";
0636                                 nvidia,function = "irda";
0637                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0638                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0639                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0640                         };
0641                         uart2-cts-n-pj5 {
0642                                 nvidia,pins = "uart2_cts_n_pj5";
0643                                 nvidia,function = "uartb";
0644                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0645                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0646                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0647                         };
0648                         uart2-rts-n-pj6 {
0649                                 nvidia,pins = "uart2_rts_n_pj6";
0650                                 nvidia,function = "uartb";
0651                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0652                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0653                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0654                         };
0655 
0656                         /* Apalis UART3 */
0657                         uart3-txd-pw6 {
0658                                 nvidia,pins = "uart3_txd_pw6";
0659                                 nvidia,function = "uartc";
0660                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0661                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0662                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0663                         };
0664                         uart3-rxd-pw7 {
0665                                 nvidia,pins = "uart3_rxd_pw7";
0666                                 nvidia,function = "uartc";
0667                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0668                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0669                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0670                         };
0671 
0672                         /* Apalis UART4 */
0673                         uart4-rxd-pb0 {
0674                                 nvidia,pins = "pb0";
0675                                 nvidia,function = "uartd";
0676                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0677                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0678                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0679                         };
0680                         uart4-txd-pj7 {
0681                                 nvidia,pins = "pj7";
0682                                 nvidia,function = "uartd";
0683                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0684                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0685                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0686                         };
0687 
0688                         /* Apalis USBH_EN */
0689                         gen2-i2c-sda-pt6 {
0690                                 nvidia,pins = "gen2_i2c_sda_pt6";
0691                                 nvidia,function = "rsvd2";
0692                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0693                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0694                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0695                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
0696                         };
0697 
0698                         /* Apalis USBH_OC# */
0699                         pbb0 {
0700                                 nvidia,pins = "pbb0";
0701                                 nvidia,function = "vgp6";
0702                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0703                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0704                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0705                         };
0706 
0707                         /* Apalis USBO1_EN */
0708                         gen2-i2c-scl-pt5 {
0709                                 nvidia,pins = "gen2_i2c_scl_pt5";
0710                                 nvidia,function = "rsvd2";
0711                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0712                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0713                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0714                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
0715                         };
0716 
0717                         /* Apalis USBO1_OC# */
0718                         pbb4 {
0719                                 nvidia,pins = "pbb4";
0720                                 nvidia,function = "vgp4";
0721                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0722                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0723                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0724                         };
0725 
0726                         /* Apalis WAKE1_MICO */
0727                         pex-wake-n-pdd3 {
0728                                 nvidia,pins = "pex_wake_n_pdd3";
0729                                 nvidia,function = "rsvd2";
0730                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0731                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0732                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0733                         };
0734 
0735                         /* CORE_PWR_REQ */
0736                         core-pwr-req {
0737                                 nvidia,pins = "core_pwr_req";
0738                                 nvidia,function = "pwron";
0739                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0740                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0741                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0742                         };
0743 
0744                         /* CPU_PWR_REQ */
0745                         cpu-pwr-req {
0746                                 nvidia,pins = "cpu_pwr_req";
0747                                 nvidia,function = "cpu";
0748                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0749                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0750                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0751                         };
0752 
0753                         /* DVFS */
0754                         dvfs-pwm-px0 {
0755                                 nvidia,pins = "dvfs_pwm_px0";
0756                                 nvidia,function = "cldvfs";
0757                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0758                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0759                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0760                         };
0761                         dvfs-clk-px2 {
0762                                 nvidia,pins = "dvfs_clk_px2";
0763                                 nvidia,function = "cldvfs";
0764                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0765                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0766                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0767                         };
0768 
0769                         /* eMMC */
0770                         sdmmc4-dat0-paa0 {
0771                                 nvidia,pins = "sdmmc4_dat0_paa0";
0772                                 nvidia,function = "sdmmc4";
0773                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0774                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0775                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0776                         };
0777                         sdmmc4-dat1-paa1 {
0778                                 nvidia,pins = "sdmmc4_dat1_paa1";
0779                                 nvidia,function = "sdmmc4";
0780                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0781                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0782                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0783                         };
0784                         sdmmc4-dat2-paa2 {
0785                                 nvidia,pins = "sdmmc4_dat2_paa2";
0786                                 nvidia,function = "sdmmc4";
0787                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0788                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0789                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0790                         };
0791                         sdmmc4-dat3-paa3 {
0792                                 nvidia,pins = "sdmmc4_dat3_paa3";
0793                                 nvidia,function = "sdmmc4";
0794                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0795                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0796                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0797                         };
0798                         sdmmc4-dat4-paa4 {
0799                                 nvidia,pins = "sdmmc4_dat4_paa4";
0800                                 nvidia,function = "sdmmc4";
0801                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0802                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0803                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0804                         };
0805                         sdmmc4-dat5-paa5 {
0806                                 nvidia,pins = "sdmmc4_dat5_paa5";
0807                                 nvidia,function = "sdmmc4";
0808                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0809                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0810                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0811                         };
0812                         sdmmc4-dat6-paa6 {
0813                                 nvidia,pins = "sdmmc4_dat6_paa6";
0814                                 nvidia,function = "sdmmc4";
0815                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0816                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0817                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0818                         };
0819                         sdmmc4-dat7-paa7 {
0820                                 nvidia,pins = "sdmmc4_dat7_paa7";
0821                                 nvidia,function = "sdmmc4";
0822                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0823                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0824                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0825                         };
0826                         sdmmc4-clk-pcc4 {
0827                                 nvidia,pins = "sdmmc4_clk_pcc4";
0828                                 nvidia,function = "sdmmc4";
0829                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0830                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0831                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0832                         };
0833                         sdmmc4-cmd-pt7 {
0834                                 nvidia,pins = "sdmmc4_cmd_pt7";
0835                                 nvidia,function = "sdmmc4";
0836                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0837                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0838                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0839                         };
0840 
0841                         /* JTAG_RTCK */
0842                         jtag-rtck {
0843                                 nvidia,pins = "jtag_rtck";
0844                                 nvidia,function = "rtck";
0845                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0846                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0847                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0848                         };
0849 
0850                         /* LAN_DEV_OFF# */
0851                         ulpi-data5-po6 {
0852                                 nvidia,pins = "ulpi_data5_po6";
0853                                 nvidia,function = "ulpi";
0854                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0855                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0856                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0857                         };
0858 
0859                         /* LAN_RESET# */
0860                         kb-row10-ps2 {
0861                                 nvidia,pins = "kb_row10_ps2";
0862                                 nvidia,function = "rsvd2";
0863                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0864                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0865                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0866                         };
0867 
0868                         /* LAN_WAKE# */
0869                         ulpi-data4-po5 {
0870                                 nvidia,pins = "ulpi_data4_po5";
0871                                 nvidia,function = "ulpi";
0872                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0873                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0874                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0875                         };
0876 
0877                         /* MCU_INT1# */
0878                         pk2 {
0879                                 nvidia,pins = "pk2";
0880                                 nvidia,function = "rsvd1";
0881                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0882                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0883                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0884                         };
0885 
0886                         /* MCU_INT2# */
0887                         pj2 {
0888                                 nvidia,pins = "pj2";
0889                                 nvidia,function = "rsvd1";
0890                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0891                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0892                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0893                         };
0894 
0895                         /* MCU_INT3# */
0896                         pi5 {
0897                                 nvidia,pins = "pi5";
0898                                 nvidia,function = "rsvd2";
0899                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0900                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0901                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0902                         };
0903 
0904                         /* MCU_INT4# */
0905                         pj0 {
0906                                 nvidia,pins = "pj0";
0907                                 nvidia,function = "rsvd1";
0908                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
0909                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0910                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0911                         };
0912 
0913                         /* MCU_RESET */
0914                         pbb6 {
0915                                 nvidia,pins = "pbb6";
0916                                 nvidia,function = "rsvd2";
0917                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0918                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0919                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0920                         };
0921 
0922                         /* MCU SPI */
0923                         gpio-x4-aud-px4 {
0924                                 nvidia,pins = "gpio_x4_aud_px4";
0925                                 nvidia,function = "spi2";
0926                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0927                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0928                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0929                         };
0930                         gpio-x5-aud-px5 {
0931                                 nvidia,pins = "gpio_x5_aud_px5";
0932                                 nvidia,function = "spi2";
0933                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0934                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0935                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0936                         };
0937                         gpio-x6-aud-px6 { /* MCU_CS */
0938                                 nvidia,pins = "gpio_x6_aud_px6";
0939                                 nvidia,function = "spi2";
0940                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0941                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0942                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0943                         };
0944                         gpio-x7-aud-px7 {
0945                                 nvidia,pins = "gpio_x7_aud_px7";
0946                                 nvidia,function = "spi2";
0947                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0948                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0949                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0950                         };
0951                         gpio-w2-aud-pw2 { /* MCU_CSEZP */
0952                                 nvidia,pins = "gpio_w2_aud_pw2";
0953                                 nvidia,function = "spi2";
0954                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0955                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0956                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
0957                         };
0958 
0959                         /* PMIC_CLK_32K */
0960                         clk-32k-in {
0961                                 nvidia,pins = "clk_32k_in";
0962                                 nvidia,function = "clk";
0963                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0964                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0965                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0966                         };
0967 
0968                         /* PMIC_CPU_OC_INT */
0969                         clk-32k-out-pa0 {
0970                                 nvidia,pins = "clk_32k_out_pa0";
0971                                 nvidia,function = "soc";
0972                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0973                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
0974                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0975                         };
0976 
0977                         /* PWR_I2C */
0978                         pwr-i2c-scl-pz6 {
0979                                 nvidia,pins = "pwr_i2c_scl_pz6";
0980                                 nvidia,function = "i2cpwr";
0981                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0982                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0983                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0984                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0985                         };
0986                         pwr-i2c-sda-pz7 {
0987                                 nvidia,pins = "pwr_i2c_sda_pz7";
0988                                 nvidia,function = "i2cpwr";
0989                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
0990                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
0991                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
0992                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
0993                         };
0994 
0995                         /* PWR_INT_N */
0996                         pwr-int-n {
0997                                 nvidia,pins = "pwr_int_n";
0998                                 nvidia,function = "pmi";
0999                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1000                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1001                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1002                         };
1003 
1004                         /* RESET_MOCI_CTRL */
1005                         pu4 {
1006                                 nvidia,pins = "pu4";
1007                                 nvidia,function = "gmi";
1008                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1009                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1010                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1011                         };
1012 
1013                         /* RESET_OUT_N */
1014                         reset-out-n {
1015                                 nvidia,pins = "reset_out_n";
1016                                 nvidia,function = "reset_out_n";
1017                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1018                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1019                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1020                         };
1021 
1022                         /* SHIFT_CTRL_DIR_IN */
1023                         kb-row0-pr0 {
1024                                 nvidia,pins = "kb_row0_pr0";
1025                                 nvidia,function = "rsvd2";
1026                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1027                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1028                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1029                         };
1030                         kb-row1-pr1 {
1031                                 nvidia,pins = "kb_row1_pr1";
1032                                 nvidia,function = "rsvd2";
1033                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1034                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1035                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1036                         };
1037 
1038                         /* Configure level-shifter as output for HDA */
1039                         kb-row11-ps3 {
1040                                 nvidia,pins = "kb_row11_ps3";
1041                                 nvidia,function = "rsvd2";
1042                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1043                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1044                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1045                         };
1046 
1047                         /* SHIFT_CTRL_DIR_OUT */
1048                         kb-col5-pq5 {
1049                                 nvidia,pins = "kb_col5_pq5";
1050                                 nvidia,function = "rsvd2";
1051                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1052                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1053                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1054                         };
1055                         kb-col6-pq6 {
1056                                 nvidia,pins = "kb_col6_pq6";
1057                                 nvidia,function = "rsvd2";
1058                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1059                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1060                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1061                         };
1062                         kb-col7-pq7 {
1063                                 nvidia,pins = "kb_col7_pq7";
1064                                 nvidia,function = "rsvd2";
1065                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1066                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1067                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1068                         };
1069 
1070                         /* SHIFT_CTRL_OE */
1071                         kb-col0-pq0 {
1072                                 nvidia,pins = "kb_col0_pq0";
1073                                 nvidia,function = "rsvd2";
1074                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1075                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1076                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1077                         };
1078                         kb-col1-pq1 {
1079                                 nvidia,pins = "kb_col1_pq1";
1080                                 nvidia,function = "rsvd2";
1081                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1082                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1083                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1084                         };
1085                         kb-col2-pq2 {
1086                                 nvidia,pins = "kb_col2_pq2";
1087                                 nvidia,function = "rsvd2";
1088                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1089                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1090                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1091                         };
1092                         kb-col4-pq4 {
1093                                 nvidia,pins = "kb_col4_pq4";
1094                                 nvidia,function = "kbc";
1095                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1096                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1097                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1098                         };
1099                         kb-row2-pr2 {
1100                                 nvidia,pins = "kb_row2_pr2";
1101                                 nvidia,function = "rsvd2";
1102                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1103                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1104                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1105                         };
1106 
1107                         /* GPIO_PI6 aka TMP451 ALERT#/THERM2# */
1108                         pi6 {
1109                                 nvidia,pins = "pi6";
1110                                 nvidia,function = "rsvd1";
1111                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1112                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1113                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1114                         };
1115 
1116                         /* TOUCH_INT */
1117                         gpio-w3-aud-pw3 {
1118                                 nvidia,pins = "gpio_w3_aud_pw3";
1119                                 nvidia,function = "spi6";
1120                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1121                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1122                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1123                         };
1124 
1125                         pc7 { /* NC */
1126                                 nvidia,pins = "pc7";
1127                                 nvidia,function = "rsvd1";
1128                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1129                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1130                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1131                         };
1132                         pg0 { /* NC */
1133                                 nvidia,pins = "pg0";
1134                                 nvidia,function = "rsvd1";
1135                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1136                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1137                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1138                         };
1139                         pg1 { /* NC */
1140                                 nvidia,pins = "pg1";
1141                                 nvidia,function = "rsvd1";
1142                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1143                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1144                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1145                         };
1146                         pg2 { /* NC */
1147                                 nvidia,pins = "pg2";
1148                                 nvidia,function = "rsvd1";
1149                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1150                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1151                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1152                         };
1153                         pg3 { /* NC */
1154                                 nvidia,pins = "pg3";
1155                                 nvidia,function = "rsvd1";
1156                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1157                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1158                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1159                         };
1160                         pg4 { /* NC */
1161                                 nvidia,pins = "pg4";
1162                                 nvidia,function = "rsvd1";
1163                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1164                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1165                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1166                         };
1167                         ph4 { /* NC */
1168                                 nvidia,pins = "ph4";
1169                                 nvidia,function = "rsvd2";
1170                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1171                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1172                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1173                         };
1174                         ph5 { /* NC */
1175                                 nvidia,pins = "ph5";
1176                                 nvidia,function = "rsvd2";
1177                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1178                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1179                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1180                         };
1181                         ph6 { /* NC */
1182                                 nvidia,pins = "ph6";
1183                                 nvidia,function = "gmi";
1184                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1185                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1186                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1187                         };
1188                         ph7 { /* NC */
1189                                 nvidia,pins = "ph7";
1190                                 nvidia,function = "gmi";
1191                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1192                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1193                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1194                         };
1195                         pi0 { /* NC */
1196                                 nvidia,pins = "pi0";
1197                                 nvidia,function = "rsvd1";
1198                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1199                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1200                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1201                         };
1202                         pi1 { /* NC */
1203                                 nvidia,pins = "pi1";
1204                                 nvidia,function = "rsvd1";
1205                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1206                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1207                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1208                         };
1209                         pi2 { /* NC */
1210                                 nvidia,pins = "pi2";
1211                                 nvidia,function = "rsvd4";
1212                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1213                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1214                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1215                         };
1216                         pi4 { /* NC */
1217                                 nvidia,pins = "pi4";
1218                                 nvidia,function = "gmi";
1219                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1220                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1221                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1222                         };
1223                         pi7 { /* NC */
1224                                 nvidia,pins = "pi7";
1225                                 nvidia,function = "rsvd1";
1226                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1227                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1228                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1229                         };
1230                         pk0 { /* NC */
1231                                 nvidia,pins = "pk0";
1232                                 nvidia,function = "rsvd1";
1233                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1234                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1235                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1236                         };
1237                         pk1 { /* NC */
1238                                 nvidia,pins = "pk1";
1239                                 nvidia,function = "rsvd4";
1240                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1241                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1242                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1243                         };
1244                         pk3 { /* NC */
1245                                 nvidia,pins = "pk3";
1246                                 nvidia,function = "gmi";
1247                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1248                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1249                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1250                         };
1251                         pk4 { /* NC */
1252                                 nvidia,pins = "pk4";
1253                                 nvidia,function = "rsvd2";
1254                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1255                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1256                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1257                         };
1258                         dap1-fs-pn0 { /* NC */
1259                                 nvidia,pins = "dap1_fs_pn0";
1260                                 nvidia,function = "rsvd4";
1261                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1262                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1263                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1264                         };
1265                         dap1-din-pn1 { /* NC */
1266                                 nvidia,pins = "dap1_din_pn1";
1267                                 nvidia,function = "rsvd4";
1268                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1269                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1270                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1271                         };
1272                         dap1-sclk-pn3 { /* NC */
1273                                 nvidia,pins = "dap1_sclk_pn3";
1274                                 nvidia,function = "rsvd4";
1275                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1276                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1277                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1278                         };
1279                         ulpi-data7-po0 { /* NC */
1280                                 nvidia,pins = "ulpi_data7_po0";
1281                                 nvidia,function = "ulpi";
1282                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1283                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1284                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1285                         };
1286                         ulpi-data0-po1 { /* NC */
1287                                 nvidia,pins = "ulpi_data0_po1";
1288                                 nvidia,function = "ulpi";
1289                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1290                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1291                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1292                         };
1293                         ulpi-data1-po2 { /* NC */
1294                                 nvidia,pins = "ulpi_data1_po2";
1295                                 nvidia,function = "ulpi";
1296                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1297                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1298                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1299                         };
1300                         ulpi-data2-po3 { /* NC */
1301                                 nvidia,pins = "ulpi_data2_po3";
1302                                 nvidia,function = "ulpi";
1303                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1304                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1305                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1306                         };
1307                         ulpi-data3-po4 { /* NC */
1308                                 nvidia,pins = "ulpi_data3_po4";
1309                                 nvidia,function = "ulpi";
1310                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1311                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1312                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1313                         };
1314                         ulpi-data6-po7 { /* NC */
1315                                 nvidia,pins = "ulpi_data6_po7";
1316                                 nvidia,function = "ulpi";
1317                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1318                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1319                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1320                         };
1321                         dap4-fs-pp4 { /* NC */
1322                                 nvidia,pins = "dap4_fs_pp4";
1323                                 nvidia,function = "rsvd4";
1324                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1325                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1326                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1327                         };
1328                         dap4-din-pp5 { /* NC */
1329                                 nvidia,pins = "dap4_din_pp5";
1330                                 nvidia,function = "rsvd3";
1331                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1332                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1333                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1334                         };
1335                         dap4-dout-pp6 { /* NC */
1336                                 nvidia,pins = "dap4_dout_pp6";
1337                                 nvidia,function = "rsvd4";
1338                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1339                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1340                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1341                         };
1342                         dap4-sclk-pp7 { /* NC */
1343                                 nvidia,pins = "dap4_sclk_pp7";
1344                                 nvidia,function = "rsvd3";
1345                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1346                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1347                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1348                         };
1349                         kb-col3-pq3 { /* NC */
1350                                 nvidia,pins = "kb_col3_pq3";
1351                                 nvidia,function = "kbc";
1352                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1353                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1354                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1355                         };
1356                         kb-row3-pr3 { /* NC */
1357                                 nvidia,pins = "kb_row3_pr3";
1358                                 nvidia,function = "kbc";
1359                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1360                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1361                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1362                         };
1363                         kb-row4-pr4 { /* NC */
1364                                 nvidia,pins = "kb_row4_pr4";
1365                                 nvidia,function = "rsvd3";
1366                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1367                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1368                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1369                         };
1370                         kb-row5-pr5 { /* NC */
1371                                 nvidia,pins = "kb_row5_pr5";
1372                                 nvidia,function = "rsvd3";
1373                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1374                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1375                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1376                         };
1377                         kb-row6-pr6 { /* NC */
1378                                 nvidia,pins = "kb_row6_pr6";
1379                                 nvidia,function = "kbc";
1380                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1381                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1382                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1383                         };
1384                         kb-row7-pr7 { /* NC */
1385                                 nvidia,pins = "kb_row7_pr7";
1386                                 nvidia,function = "rsvd2";
1387                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1388                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1389                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1390                         };
1391                         kb-row8-ps0 { /* NC */
1392                                 nvidia,pins = "kb_row8_ps0";
1393                                 nvidia,function = "rsvd2";
1394                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1395                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1396                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1397                         };
1398                         kb-row9-ps1 { /* NC */
1399                                 nvidia,pins = "kb_row9_ps1";
1400                                 nvidia,function = "rsvd2";
1401                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1402                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1403                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1404                         };
1405                         kb-row12-ps4 { /* NC */
1406                                 nvidia,pins = "kb_row12_ps4";
1407                                 nvidia,function = "rsvd2";
1408                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1409                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1410                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1411                         };
1412                         kb-row13-ps5 { /* NC */
1413                                 nvidia,pins = "kb_row13_ps5";
1414                                 nvidia,function = "rsvd2";
1415                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1416                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1417                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1418                         };
1419                         kb-row14-ps6 { /* NC */
1420                                 nvidia,pins = "kb_row14_ps6";
1421                                 nvidia,function = "rsvd2";
1422                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1423                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1424                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1425                         };
1426                         kb-row15-ps7 { /* NC */
1427                                 nvidia,pins = "kb_row15_ps7";
1428                                 nvidia,function = "rsvd3";
1429                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1430                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1431                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1432                         };
1433                         kb-row16-pt0 { /* NC */
1434                                 nvidia,pins = "kb_row16_pt0";
1435                                 nvidia,function = "rsvd2";
1436                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1437                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1438                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1439                         };
1440                         kb-row17-pt1 { /* NC */
1441                                 nvidia,pins = "kb_row17_pt1";
1442                                 nvidia,function = "rsvd2";
1443                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1444                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1445                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1446                         };
1447                         pu5 { /* NC */
1448                                 nvidia,pins = "pu5";
1449                                 nvidia,function = "gmi";
1450                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1451                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1452                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1453                         };
1454                         /*
1455                          * PCB Version Indication: V1.2 and later have GPIO_PV0
1456                          * wired to GND, was NC before
1457                          */
1458                         pv0 {
1459                                 nvidia,pins = "pv0";
1460                                 nvidia,function = "rsvd1";
1461                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1462                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1463                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1464                         };
1465                         pv1 { /* NC */
1466                                 nvidia,pins = "pv1";
1467                                 nvidia,function = "rsvd1";
1468                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1469                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1470                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1471                         };
1472                         gpio-x1-aud-px1 { /* NC */
1473                                 nvidia,pins = "gpio_x1_aud_px1";
1474                                 nvidia,function = "rsvd2";
1475                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1476                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1477                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1478                         };
1479                         gpio-x3-aud-px3 { /* NC */
1480                                 nvidia,pins = "gpio_x3_aud_px3";
1481                                 nvidia,function = "rsvd4";
1482                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1483                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1484                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1485                         };
1486                         pbb7 { /* NC */
1487                                 nvidia,pins = "pbb7";
1488                                 nvidia,function = "rsvd2";
1489                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1490                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1491                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1492                         };
1493                         pcc1 { /* NC */
1494                                 nvidia,pins = "pcc1";
1495                                 nvidia,function = "rsvd2";
1496                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1497                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1498                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1499                         };
1500                         pcc2 { /* NC */
1501                                 nvidia,pins = "pcc2";
1502                                 nvidia,function = "rsvd2";
1503                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1504                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1505                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1506                         };
1507                         clk3-req-pee1 { /* NC */
1508                                 nvidia,pins = "clk3_req_pee1";
1509                                 nvidia,function = "rsvd2";
1510                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1511                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1512                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1513                         };
1514                         dap-mclk1-req-pee2 { /* NC */
1515                                 nvidia,pins = "dap_mclk1_req_pee2";
1516                                 nvidia,function = "rsvd4";
1517                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1518                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1519                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1520                         };
1521                         /*
1522                          * Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output
1523                          * driver enabled aka not tristated and input driver
1524                          * enabled as well as it features some magic properties
1525                          * even though the external loopback is disabled and the
1526                          * internal loopback used as per
1527                          * SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1
1528                          * bits being set to 0xfffd according to the TRM!
1529                          */
1530                         sdmmc3-clk-lb-out-pee4 { /* NC */
1531                                 nvidia,pins = "sdmmc3_clk_lb_out_pee4";
1532                                 nvidia,function = "sdmmc3";
1533                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1534                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1535                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1536                         };
1537                 };
1538         };
1539 
1540         serial@70006040 {
1541                 compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1542                 /delete-property/ reg-shift;
1543         };
1544 
1545         serial@70006200 {
1546                 compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1547                 /delete-property/ reg-shift;
1548         };
1549 
1550         serial@70006300 {
1551                 compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1552                 /delete-property/ reg-shift;
1553         };
1554 
1555         hdmi_ddc: i2c@7000c700 {
1556                 clock-frequency = <10000>;
1557         };
1558 
1559         /* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor */
1560         i2c@7000d000 {
1561                 status = "okay";
1562                 clock-frequency = <400000>;
1563 
1564                 /* SGTL5000 audio codec */
1565                 sgtl5000: codec@a {
1566                         compatible = "fsl,sgtl5000";
1567                         reg = <0x0a>;
1568                         #sound-dai-cells = <0>;
1569                         VDDA-supply = <&reg_module_3v3_audio>;
1570                         VDDD-supply = <&reg_1v8_vddio>;
1571                         VDDIO-supply = <&reg_1v8_vddio>;
1572                         clocks = <&tegra_car TEGRA124_CLK_EXTERN1>;
1573                 };
1574 
1575                 pmic: pmic@40 {
1576                         compatible = "ams,as3722";
1577                         reg = <0x40>;
1578                         interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
1579                         ams,system-power-controller;
1580                         #interrupt-cells = <2>;
1581                         interrupt-controller;
1582                         gpio-controller;
1583                         #gpio-cells = <2>;
1584                         pinctrl-names = "default";
1585                         pinctrl-0 = <&as3722_default>;
1586 
1587                         as3722_default: pinmux {
1588                                 gpio2-7 {
1589                                         pins = "gpio2", /* PWR_EN_+V3.3 */
1590                                                "gpio7"; /* +V1.6_LPO */
1591                                         function = "gpio";
1592                                         bias-pull-up;
1593                                 };
1594 
1595                                 gpio0-1-3-4-5-6 {
1596                                         pins = "gpio0", "gpio1", "gpio3",
1597                                                "gpio4", "gpio5", "gpio6";
1598                                         bias-high-impedance;
1599                                 };
1600                         };
1601 
1602                         regulators {
1603                                 vsup-sd2-supply = <&reg_module_3v3>;
1604                                 vsup-sd3-supply = <&reg_module_3v3>;
1605                                 vsup-sd4-supply = <&reg_module_3v3>;
1606                                 vsup-sd5-supply = <&reg_module_3v3>;
1607                                 vin-ldo0-supply = <&reg_1v35_vddio_ddr>;
1608                                 vin-ldo1-6-supply = <&reg_module_3v3>;
1609                                 vin-ldo2-5-7-supply = <&reg_1v8_vddio>;
1610                                 vin-ldo3-4-supply = <&reg_module_3v3>;
1611                                 vin-ldo9-10-supply = <&reg_module_3v3>;
1612                                 vin-ldo11-supply = <&reg_module_3v3>;
1613 
1614                                 reg_vdd_cpu: sd0 {
1615                                         regulator-name = "+VDD_CPU_AP";
1616                                         regulator-min-microvolt = <700000>;
1617                                         regulator-max-microvolt = <1400000>;
1618                                         regulator-min-microamp = <3500000>;
1619                                         regulator-max-microamp = <3500000>;
1620                                         regulator-always-on;
1621                                         regulator-boot-on;
1622                                         ams,ext-control = <2>;
1623                                 };
1624 
1625                                 sd1 {
1626                                         regulator-name = "+VDD_CORE";
1627                                         regulator-min-microvolt = <700000>;
1628                                         regulator-max-microvolt = <1350000>;
1629                                         regulator-min-microamp = <2500000>;
1630                                         regulator-max-microamp = <4000000>;
1631                                         regulator-always-on;
1632                                         regulator-boot-on;
1633                                         ams,ext-control = <1>;
1634                                 };
1635 
1636                                 reg_1v35_vddio_ddr: sd2 {
1637                                         regulator-name =
1638                                                 "+V1.35_VDDIO_DDR(sd2)";
1639                                         regulator-min-microvolt = <1350000>;
1640                                         regulator-max-microvolt = <1350000>;
1641                                         regulator-always-on;
1642                                         regulator-boot-on;
1643                                 };
1644 
1645                                 sd3 {
1646                                         regulator-name =
1647                                                 "+V1.35_VDDIO_DDR(sd3)";
1648                                         regulator-min-microvolt = <1350000>;
1649                                         regulator-max-microvolt = <1350000>;
1650                                         regulator-always-on;
1651                                         regulator-boot-on;
1652                                 };
1653 
1654                                 reg_1v05_vdd: sd4 {
1655                                         regulator-name = "+V1.05";
1656                                         regulator-min-microvolt = <1050000>;
1657                                         regulator-max-microvolt = <1050000>;
1658                                 };
1659 
1660                                 reg_1v8_vddio: sd5 {
1661                                         regulator-name = "+V1.8";
1662                                         regulator-min-microvolt = <1800000>;
1663                                         regulator-max-microvolt = <1800000>;
1664                                         regulator-boot-on;
1665                                         regulator-always-on;
1666                                 };
1667 
1668                                 reg_vdd_gpu: sd6 {
1669                                         regulator-name = "+VDD_GPU_AP";
1670                                         regulator-min-microvolt = <650000>;
1671                                         regulator-max-microvolt = <1200000>;
1672                                         regulator-min-microamp = <3500000>;
1673                                         regulator-max-microamp = <3500000>;
1674                                         regulator-boot-on;
1675                                         regulator-always-on;
1676                                 };
1677 
1678                                 reg_1v05_avdd: ldo0 {
1679                                         regulator-name = "+V1.05_AVDD";
1680                                         regulator-min-microvolt = <1050000>;
1681                                         regulator-max-microvolt = <1050000>;
1682                                         regulator-boot-on;
1683                                         regulator-always-on;
1684                                         ams,ext-control = <1>;
1685                                 };
1686 
1687                                 vddio_sdmmc1: ldo1 {
1688                                         regulator-name = "VDDIO_SDMMC1";
1689                                         regulator-min-microvolt = <1800000>;
1690                                         regulator-max-microvolt = <3300000>;
1691                                 };
1692 
1693                                 ldo2 {
1694                                         regulator-name = "+V1.2";
1695                                         regulator-min-microvolt = <1200000>;
1696                                         regulator-max-microvolt = <1200000>;
1697                                         regulator-boot-on;
1698                                         regulator-always-on;
1699                                 };
1700 
1701                                 ldo3 {
1702                                         regulator-name = "+V1.05_RTC";
1703                                         regulator-min-microvolt = <1000000>;
1704                                         regulator-max-microvolt = <1000000>;
1705                                         regulator-boot-on;
1706                                         regulator-always-on;
1707                                         ams,enable-tracking;
1708                                 };
1709 
1710                                 /* 1.8V for LVDS, 3.3V for eDP */
1711                                 ldo4 {
1712                                         regulator-name = "AVDD_LVDS0_PLL";
1713                                         regulator-min-microvolt = <1800000>;
1714                                         regulator-max-microvolt = <1800000>;
1715                                 };
1716 
1717                                 /* LDO5 not used */
1718 
1719                                 vddio_sdmmc3: ldo6 {
1720                                         regulator-name = "VDDIO_SDMMC3";
1721                                         regulator-min-microvolt = <1800000>;
1722                                         regulator-max-microvolt = <3300000>;
1723                                 };
1724 
1725                                 /* LDO7 not used */
1726 
1727                                 ldo9 {
1728                                         regulator-name = "+V3.3_ETH(ldo9)";
1729                                         regulator-min-microvolt = <3300000>;
1730                                         regulator-max-microvolt = <3300000>;
1731                                         regulator-always-on;
1732                                 };
1733 
1734                                 ldo10 {
1735                                         regulator-name = "+V3.3_ETH(ldo10)";
1736                                         regulator-min-microvolt = <3300000>;
1737                                         regulator-max-microvolt = <3300000>;
1738                                         regulator-always-on;
1739                                 };
1740 
1741                                 ldo11 {
1742                                         regulator-name = "+V1.8_VPP_FUSE";
1743                                         regulator-min-microvolt = <1800000>;
1744                                         regulator-max-microvolt = <1800000>;
1745                                 };
1746                         };
1747                 };
1748 
1749                 /*
1750                  * TMP451 temperature sensor
1751                  * Note: THERM_N directly connected to AS3722 PMIC THERM
1752                  */
1753                 temp-sensor@4c {
1754                         compatible = "ti,tmp451";
1755                         reg = <0x4c>;
1756                         interrupt-parent = <&gpio>;
1757                         interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_EDGE_FALLING>;
1758                         #thermal-sensor-cells = <1>;
1759                         vcc-supply = <&reg_module_3v3>;
1760                 };
1761         };
1762 
1763         /* SPI2: MCU SPI */
1764         spi@7000d600 {
1765                 status = "okay";
1766                 spi-max-frequency = <25000000>;
1767         };
1768 
1769         pmc@7000e400 {
1770                 nvidia,invert-interrupt;
1771                 nvidia,suspend-mode = <1>;
1772                 nvidia,cpu-pwr-good-time = <500>;
1773                 nvidia,cpu-pwr-off-time = <300>;
1774                 nvidia,core-pwr-good-time = <641 3845>;
1775                 nvidia,core-pwr-off-time = <61036>;
1776                 nvidia,core-power-req-active-high;
1777                 nvidia,sys-clock-req-active-high;
1778 
1779                 /* Set power_off bit in ResetControl register of AS3722 PMIC */
1780                 i2c-thermtrip {
1781                         nvidia,i2c-controller-id = <4>;
1782                         nvidia,bus-addr = <0x40>;
1783                         nvidia,reg-addr = <0x36>;
1784                         nvidia,reg-data = <0x2>;
1785                 };
1786         };
1787 
1788         sata@70020000 {
1789                 phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>;
1790                 phy-names = "sata-0";
1791                 avdd-supply = <&reg_1v05_vdd>;
1792                 hvdd-supply = <&reg_module_3v3>;
1793                 vddio-supply = <&reg_1v05_vdd>;
1794         };
1795 
1796         usb@70090000 {
1797                 /* USBO1, USBO1 (SS), USBH2, USBH4 and USBH4 (SS) */
1798                 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>,
1799                        <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
1800                        <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>,
1801                        <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>,
1802                        <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>;
1803                 phy-names = "usb2-0", "usb3-1", "usb2-1", "usb2-2", "usb3-0";
1804 
1805                 avddio-pex-supply = <&reg_1v05_vdd>;
1806                 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
1807                 avdd-pll-utmip-supply = <&reg_1v8_vddio>;
1808                 avdd-usb-ss-pll-supply = <&reg_1v05_vdd>;
1809                 avdd-usb-supply = <&reg_module_3v3>;
1810                 dvddio-pex-supply = <&reg_1v05_vdd>;
1811                 hvdd-usb-ss-pll-e-supply = <&reg_module_3v3>;
1812                 hvdd-usb-ss-supply = <&reg_module_3v3>;
1813         };
1814 
1815         padctl@7009f000 {
1816                 avdd-pll-utmip-supply = <&reg_1v8_vddio>;
1817                 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
1818                 avdd-pex-pll-supply = <&reg_1v05_vdd>;
1819                 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
1820 
1821                 pads {
1822                         usb2 {
1823                                 status = "okay";
1824 
1825                                 lanes {
1826                                         usb2-0 {
1827                                                 status = "okay";
1828                                                 nvidia,function = "xusb";
1829                                         };
1830 
1831                                         usb2-1 {
1832                                                 status = "okay";
1833                                                 nvidia,function = "xusb";
1834                                         };
1835 
1836                                         usb2-2 {
1837                                                 status = "okay";
1838                                                 nvidia,function = "xusb";
1839                                         };
1840                                 };
1841                         };
1842 
1843                         pcie {
1844                                 status = "okay";
1845 
1846                                 lanes {
1847                                         pcie-0 {
1848                                                 status = "okay";
1849                                                 nvidia,function = "usb3-ss";
1850                                         };
1851 
1852                                         pcie-1 {
1853                                                 status = "okay";
1854                                                 nvidia,function = "usb3-ss";
1855                                         };
1856 
1857                                         pcie-2 {
1858                                                 status = "okay";
1859                                                 nvidia,function = "pcie";
1860                                         };
1861 
1862                                         pcie-3 {
1863                                                 status = "okay";
1864                                                 nvidia,function = "pcie";
1865                                         };
1866 
1867                                         pcie-4 {
1868                                                 status = "okay";
1869                                                 nvidia,function = "pcie";
1870                                         };
1871                                 };
1872                         };
1873 
1874                         sata {
1875                                 status = "okay";
1876 
1877                                 lanes {
1878                                         sata-0 {
1879                                                 status = "okay";
1880                                                 nvidia,function = "sata";
1881                                         };
1882                                 };
1883                         };
1884                 };
1885 
1886                 ports {
1887                         /* USBO1 */
1888                         usb2-0 {
1889                                 status = "okay";
1890                                 mode = "otg";
1891                                 usb-role-switch;
1892                                 vbus-supply = <&reg_usbo1_vbus>;
1893                         };
1894 
1895                         /* USBH2 */
1896                         usb2-1 {
1897                                 status = "okay";
1898                                 mode = "host";
1899                                 vbus-supply = <&reg_usbh_vbus>;
1900                         };
1901 
1902                         /* USBH4 */
1903                         usb2-2 {
1904                                 status = "okay";
1905                                 mode = "host";
1906                                 vbus-supply = <&reg_usbh_vbus>;
1907                         };
1908 
1909                         usb3-0 {
1910                                 status = "okay";
1911                                 nvidia,usb2-companion = <2>;
1912                                 vbus-supply = <&reg_usbh_vbus>;
1913                         };
1914 
1915                         usb3-1 {
1916                                 status = "okay";
1917                                 nvidia,usb2-companion = <0>;
1918                                 vbus-supply = <&reg_usbo1_vbus>;
1919                         };
1920                 };
1921         };
1922 
1923         /* eMMC */
1924         mmc@700b0600 {
1925                 status = "okay";
1926                 bus-width = <8>;
1927                 non-removable;
1928                 vmmc-supply = <&reg_module_3v3>; /* VCC */
1929                 vqmmc-supply = <&reg_1v8_vddio>; /* VCCQ */
1930                 mmc-ddr-1_8v;
1931         };
1932 
1933         /* CPU DFLL clock */
1934         clock@70110000 {
1935                 status = "okay";
1936                 nvidia,i2c-fs-rate = <400000>;
1937                 vdd-cpu-supply = <&reg_vdd_cpu>;
1938         };
1939 
1940         ahub@70300000 {
1941                 i2s@70301200 {
1942                         status = "okay";
1943                 };
1944         };
1945 
1946         clk32k_in: osc3 {
1947                 compatible = "fixed-clock";
1948                 #clock-cells = <0>;
1949                 clock-frequency = <32768>;
1950         };
1951 
1952         cpus {
1953                 cpu@0 {
1954                         vdd-cpu-supply = <&reg_vdd_cpu>;
1955                 };
1956         };
1957 
1958         reg_1v05_avdd_hdmi_pll: regulator-1v05-avdd-hdmi-pll {
1959                 compatible = "regulator-fixed";
1960                 regulator-name = "+V1.05_AVDD_HDMI_PLL";
1961                 regulator-min-microvolt = <1050000>;
1962                 regulator-max-microvolt = <1050000>;
1963                 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1964                 vin-supply = <&reg_1v05_vdd>;
1965         };
1966 
1967         reg_3v3_mxm: regulator-3v3-mxm {
1968                 compatible = "regulator-fixed";
1969                 regulator-name = "+V3.3_MXM";
1970                 regulator-min-microvolt = <3300000>;
1971                 regulator-max-microvolt = <3300000>;
1972                 regulator-always-on;
1973                 regulator-boot-on;
1974         };
1975 
1976         reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
1977                 compatible = "regulator-fixed";
1978                 regulator-name = "+V3.3_AVDD_HDMI";
1979                 regulator-min-microvolt = <3300000>;
1980                 regulator-max-microvolt = <3300000>;
1981                 vin-supply = <&reg_1v05_vdd>;
1982         };
1983 
1984         reg_module_3v3: regulator-module-3v3 {
1985                 compatible = "regulator-fixed";
1986                 regulator-name = "+V3.3";
1987                 regulator-min-microvolt = <3300000>;
1988                 regulator-max-microvolt = <3300000>;
1989                 regulator-always-on;
1990                 regulator-boot-on;
1991                 /* PWR_EN_+V3.3 */
1992                 gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1993                 enable-active-high;
1994                 vin-supply = <&reg_3v3_mxm>;
1995         };
1996 
1997         reg_module_3v3_audio: regulator-module-3v3-audio {
1998                 compatible = "regulator-fixed";
1999                 regulator-name = "+V3.3_AUDIO_AVDD_S";
2000                 regulator-min-microvolt = <3300000>;
2001                 regulator-max-microvolt = <3300000>;
2002                 regulator-always-on;
2003         };
2004 
2005         sound {
2006                 compatible = "toradex,tegra-audio-sgtl5000-apalis_tk1",
2007                              "nvidia,tegra-audio-sgtl5000";
2008                 nvidia,model = "Toradex Apalis TK1";
2009                 nvidia,audio-routing =
2010                         "Headphone Jack", "HP_OUT",
2011                         "LINE_IN", "Line In Jack",
2012                         "MIC_IN", "Mic Jack";
2013                 nvidia,i2s-controller = <&tegra_i2s2>;
2014                 nvidia,audio-codec = <&sgtl5000>;
2015                 clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
2016                          <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2017                          <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2018                 clock-names = "pll_a", "pll_a_out0", "mclk";
2019 
2020                 assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
2021                                   <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2022 
2023                 assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2024                                          <&tegra_car TEGRA124_CLK_EXTERN1>;
2025         };
2026 
2027         thermal-zones {
2028                 cpu-thermal {
2029                         trips {
2030                                 cpu-shutdown-trip {
2031                                         temperature = <101000>;
2032                                         hysteresis = <0>;
2033                                         type = "critical";
2034                                 };
2035                         };
2036                 };
2037 
2038                 mem-thermal {
2039                         trips {
2040                                 mem-shutdown-trip {
2041                                         temperature = <101000>;
2042                                         hysteresis = <0>;
2043                                         type = "critical";
2044                                 };
2045                         };
2046                 };
2047 
2048                 gpu-thermal {
2049                         trips {
2050                                 gpu-shutdown-trip {
2051                                         temperature = <101000>;
2052                                         hysteresis = <0>;
2053                                         type = "critical";
2054                                 };
2055                         };
2056                 };
2057         };
2058 };
2059 
2060 &gpio {
2061         /* I210 Gigabit Ethernet Controller Reset */
2062         lan-reset-n-hog {
2063                 gpio-hog;
2064                 gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
2065                 output-high;
2066                 line-name = "LAN_RESET_N";
2067         };
2068 
2069         /* Control MXM3 pin 26 Reset Module Output Carrier Input */
2070         reset-moci-ctrl-hog {
2071                 gpio-hog;
2072                 gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
2073                 output-high;
2074                 line-name = "RESET_MOCI_CTRL";
2075         };
2076 };