0001 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
0002 /*
0003 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
0004 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
0005 */
0006
0007 /dts-v1/;
0008
0009 #include "stm32mp157c-dk2.dts"
0010 #include "stm32mp15-scmi.dtsi"
0011
0012 / {
0013 model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board";
0014 compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157c-dk2", "st,stm32mp157";
0015
0016 reserved-memory {
0017 optee@de000000 {
0018 reg = <0xde000000 0x2000000>;
0019 no-map;
0020 };
0021 };
0022 };
0023
0024 &cpu0 {
0025 clocks = <&scmi_clk CK_SCMI_MPU>;
0026 };
0027
0028 &cpu1 {
0029 clocks = <&scmi_clk CK_SCMI_MPU>;
0030 };
0031
0032 &cryp1 {
0033 clocks = <&scmi_clk CK_SCMI_CRYP1>;
0034 resets = <&scmi_reset RST_SCMI_CRYP1>;
0035 };
0036
0037 &dsi {
0038 phy-dsi-supply = <&scmi_reg18>;
0039 clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
0040 };
0041
0042 &gpioz {
0043 clocks = <&scmi_clk CK_SCMI_GPIOZ>;
0044 };
0045
0046 &hash1 {
0047 clocks = <&scmi_clk CK_SCMI_HASH1>;
0048 resets = <&scmi_reset RST_SCMI_HASH1>;
0049 };
0050
0051 &i2c4 {
0052 clocks = <&scmi_clk CK_SCMI_I2C4>;
0053 resets = <&scmi_reset RST_SCMI_I2C4>;
0054 };
0055
0056 &iwdg2 {
0057 clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
0058 };
0059
0060 &mdma1 {
0061 resets = <&scmi_reset RST_SCMI_MDMA>;
0062 };
0063
0064 &mlahb {
0065 resets = <&scmi_reset RST_SCMI_MCU>;
0066 };
0067
0068 &rcc {
0069 compatible = "st,stm32mp1-rcc-secure", "syscon";
0070 clock-names = "hse", "hsi", "csi", "lse", "lsi";
0071 clocks = <&scmi_clk CK_SCMI_HSE>,
0072 <&scmi_clk CK_SCMI_HSI>,
0073 <&scmi_clk CK_SCMI_CSI>,
0074 <&scmi_clk CK_SCMI_LSE>,
0075 <&scmi_clk CK_SCMI_LSI>;
0076 };
0077
0078 &rng1 {
0079 clocks = <&scmi_clk CK_SCMI_RNG1>;
0080 resets = <&scmi_reset RST_SCMI_RNG1>;
0081 };
0082
0083 &rtc {
0084 clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
0085 };