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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
0002 /*
0003  * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
0004  * Copyright (c) 2020 Engicam srl
0005  * Copyright (c) 2020 Amarula Solutons(India)
0006  */
0007 
0008 / {
0009         compatible = "engicam,microgea-stm32mp1", "st,stm32mp157";
0010 
0011         memory@c0000000 {
0012                 device_type = "memory";
0013                 reg = <0xc0000000 0x10000000>;
0014         };
0015 
0016         reserved-memory {
0017                 #address-cells = <1>;
0018                 #size-cells = <1>;
0019                 ranges;
0020 
0021                 mcuram2: mcuram2@10000000 {
0022                         compatible = "shared-dma-pool";
0023                         reg = <0x10000000 0x40000>;
0024                         no-map;
0025                 };
0026 
0027                 vdev0vring0: vdev0vring0@10040000 {
0028                         compatible = "shared-dma-pool";
0029                         reg = <0x10040000 0x1000>;
0030                         no-map;
0031                 };
0032 
0033                 vdev0vring1: vdev0vring1@10041000 {
0034                         compatible = "shared-dma-pool";
0035                         reg = <0x10041000 0x1000>;
0036                         no-map;
0037                 };
0038 
0039                 vdev0buffer: vdev0buffer@10042000 {
0040                         compatible = "shared-dma-pool";
0041                         reg = <0x10042000 0x4000>;
0042                         no-map;
0043                 };
0044 
0045                 mcuram: mcuram@30000000 {
0046                         compatible = "shared-dma-pool";
0047                         reg = <0x30000000 0x40000>;
0048                         no-map;
0049                 };
0050 
0051                 retram: retram@38000000 {
0052                         compatible = "shared-dma-pool";
0053                         reg = <0x38000000 0x10000>;
0054                         no-map;
0055                 };
0056         };
0057 
0058         vin: regulator-vin {
0059                 compatible = "regulator-fixed";
0060                 regulator-name = "vin";
0061                 regulator-min-microvolt = <5000000>;
0062                 regulator-max-microvolt = <5000000>;
0063                 regulator-always-on;
0064         };
0065 
0066         vddcore: regulator-vddcore {
0067                 compatible = "regulator-fixed";
0068                 regulator-name = "vddcore";
0069                 regulator-min-microvolt = <1200000>;
0070                 regulator-max-microvolt = <1200000>;
0071                 regulator-always-on;
0072                 vin-supply = <&vin>;
0073         };
0074 
0075         vdd: regulator-vdd {
0076                 compatible = "regulator-fixed";
0077                 regulator-name = "vdd";
0078                 regulator-min-microvolt = <3300000>;
0079                 regulator-max-microvolt = <3300000>;
0080                 regulator-always-on;
0081                 vin-supply = <&vin>;
0082         };
0083 
0084         vddq_ddr: regulator-vddq-ddr {
0085                 compatible = "regulator-fixed";
0086                 regulator-name = "vddq_ddr";
0087                 regulator-min-microvolt = <1350000>;
0088                 regulator-max-microvolt = <1350000>;
0089                 regulator-always-on;
0090                 vin-supply = <&vin>;
0091         };
0092 };
0093 
0094 &dts {
0095         status = "okay";
0096 };
0097 
0098 &fmc {
0099         pinctrl-names = "default", "sleep";
0100         pinctrl-0 = <&fmc_pins_a>;
0101         pinctrl-1 = <&fmc_sleep_pins_a>;
0102         status = "okay";
0103 
0104         nand-controller@4,0 {
0105                 status = "okay";
0106 
0107                 nand@0 {
0108                         reg = <0>;
0109                         nand-on-flash-bbt;
0110                         #address-cells = <1>;
0111                         #size-cells = <1>;
0112                 };
0113         };
0114 };
0115 
0116 &ipcc {
0117         status = "okay";
0118 };
0119 
0120 &iwdg2{
0121         timeout-sec = <32>;
0122         status = "okay";
0123 };
0124 
0125 &m4_rproc{
0126         memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
0127                         <&vdev0vring1>, <&vdev0buffer>;
0128         mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
0129         mbox-names = "vq0", "vq1", "shutdown";
0130         interrupt-parent = <&exti>;
0131         interrupts = <68 1>;
0132         status = "okay";
0133 };
0134 
0135 &rng1 {
0136         status = "okay";
0137 };
0138 
0139 &rtc{
0140         status = "okay";
0141 };
0142 
0143 &vrefbuf {
0144         regulator-min-microvolt = <2500000>;
0145         regulator-max-microvolt = <2500000>;
0146         vdda-supply = <&vdd>;
0147         status = "okay";
0148 };