0001 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
0002 /*
0003 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
0004 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
0005 */
0006
0007 /dts-v1/;
0008
0009 #include "stm32mp157a-dk1.dts"
0010 #include "stm32mp15-scmi.dtsi"
0011
0012 / {
0013 model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board";
0014 compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157a-dk1", "st,stm32mp157";
0015
0016 reserved-memory {
0017 optee@de000000 {
0018 reg = <0xde000000 0x2000000>;
0019 no-map;
0020 };
0021 };
0022 };
0023
0024 &cpu0 {
0025 clocks = <&scmi_clk CK_SCMI_MPU>;
0026 };
0027
0028 &cpu1 {
0029 clocks = <&scmi_clk CK_SCMI_MPU>;
0030 };
0031
0032 &dsi {
0033 clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
0034 };
0035
0036 &gpioz {
0037 clocks = <&scmi_clk CK_SCMI_GPIOZ>;
0038 };
0039
0040 &hash1 {
0041 clocks = <&scmi_clk CK_SCMI_HASH1>;
0042 resets = <&scmi_reset RST_SCMI_HASH1>;
0043 };
0044
0045 &i2c4 {
0046 clocks = <&scmi_clk CK_SCMI_I2C4>;
0047 resets = <&scmi_reset RST_SCMI_I2C4>;
0048 };
0049
0050 &iwdg2 {
0051 clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
0052 };
0053
0054 &mdma1 {
0055 resets = <&scmi_reset RST_SCMI_MDMA>;
0056 };
0057
0058 &mlahb {
0059 resets = <&scmi_reset RST_SCMI_MCU>;
0060 };
0061
0062 &rcc {
0063 compatible = "st,stm32mp1-rcc-secure", "syscon";
0064 clock-names = "hse", "hsi", "csi", "lse", "lsi";
0065 clocks = <&scmi_clk CK_SCMI_HSE>,
0066 <&scmi_clk CK_SCMI_HSI>,
0067 <&scmi_clk CK_SCMI_CSI>,
0068 <&scmi_clk CK_SCMI_LSE>,
0069 <&scmi_clk CK_SCMI_LSI>;
0070 };
0071
0072 &rng1 {
0073 clocks = <&scmi_clk CK_SCMI_RNG1>;
0074 resets = <&scmi_reset RST_SCMI_RNG1>;
0075 };
0076
0077 &rtc {
0078 clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
0079 };
