boot/dts/stm32mp151a-prtt1l.dtsi

0001 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
0002 /*
0003  * Copyright (C) Protonic Holland
0004  * Author: David Jander <david@protonic.nl>
0005  */
0006 /dts-v1/;
0007
0008 #include "stm32mp151.dtsi"
0009 #include "stm32mp15-pinctrl.dtsi"
0010 #include "stm32mp15xxad-pinctrl.dtsi"
0011 #include <dt-bindings/gpio/gpio.h>
0012 #include <dt-bindings/input/input.h>
0013 #include <dt-bindings/leds/common.h>
0014
0015 / {
0016         aliases {
0017                 ethernet0 = &ethernet0;
0018                 mdio-gpio0 = &mdio0;
0019                 serial0 = &uart4;
0020         };
0021
0022         led-controller-0 {
0023                 compatible = "gpio-leds";
0024
0025                 led-0 {
0026                         color = <LED_COLOR_ID_RED>;
0027                         function = LED_FUNCTION_INDICATOR;
0028                         gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
0029                 };
0030
0031                 led-1 {
0032                         color = <LED_COLOR_ID_GREEN>;
0033                         function = LED_FUNCTION_INDICATOR;
0034                         gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
0035                         linux,default-trigger = "heartbeat";
0036                 };
0037         };
0038
0039
0040         /* DP83TD510E PHYs have max MDC rate of 1.75MHz. Since we can't reduce
0041          * stmmac MDC clock without reducing system bus rate, we need to use
0042          * gpio based MDIO bus.
0043          */
0044         mdio0: mdio {
0045                 compatible = "virtual,mdio-gpio";
0046                 #address-cells = <1>;
0047                 #size-cells = <0>;
0048                 gpios = <&gpioc 1 GPIO_ACTIVE_HIGH
0049                          &gpioa 2 GPIO_ACTIVE_HIGH>;
0050         };
0051
0052         reg_3v3: regulator-3v3 {
0053                 compatible = "regulator-fixed";
0054                 regulator-name = "3v3";
0055                 regulator-min-microvolt = <3300000>;
0056                 regulator-max-microvolt = <3300000>;
0057         };
0058 };
0059
0060 &dts {
0061         status = "okay";
0062 };
0063
0064 &ethernet0 {
0065         pinctrl-0 = <&ethernet0_rmii_pins_a>;
0066         pinctrl-1 = <&ethernet0_rmii_sleep_pins_a>;
0067         pinctrl-names = "default", "sleep";
0068         phy-mode = "rmii";
0069         status = "okay";
0070 };
0071
0072 &ethernet0_rmii_pins_a {
0073         pins1 {
0074                 pinmux = <STM32_PINMUX('B', 12, AF11)>, /* ETH1_RMII_TXD0 */
0075                          <STM32_PINMUX('B', 13, AF11)>, /* ETH1_RMII_TXD1 */
0076                          <STM32_PINMUX('B', 11, AF11)>; /* ETH1_RMII_TX_EN */
0077         };
0078         pins2 {
0079                 pinmux = <STM32_PINMUX('C', 4, AF11)>,  /* ETH1_RMII_RXD0 */
0080                          <STM32_PINMUX('C', 5, AF11)>,  /* ETH1_RMII_RXD1 */
0081                          <STM32_PINMUX('A', 1, AF11)>,  /* ETH1_RMII_REF_CLK input */
0082                          <STM32_PINMUX('A', 7, AF11)>;  /* ETH1_RMII_CRS_DV */
0083         };
0084 };
0085
0086 &ethernet0_rmii_sleep_pins_a {
0087         pins1 {
0088                 pinmux = <STM32_PINMUX('B', 12, ANALOG)>, /* ETH1_RMII_TXD0 */
0089                          <STM32_PINMUX('B', 13, ANALOG)>, /* ETH1_RMII_TXD1 */
0090                          <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
0091                          <STM32_PINMUX('C', 4, ANALOG)>,  /* ETH1_RMII_RXD0 */
0092                          <STM32_PINMUX('C', 5, ANALOG)>,  /* ETH1_RMII_RXD1 */
0093                          <STM32_PINMUX('A', 1, ANALOG)>,  /* ETH1_RMII_REF_CLK */
0094                          <STM32_PINMUX('A', 7, ANALOG)>;  /* ETH1_RMII_CRS_DV */
0095         };
0096 };
0097
0098 &iwdg2 {
0099         status = "okay";
0100 };
0101
0102 &qspi {
0103         pinctrl-names = "default", "sleep";
0104         pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
0105         pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
0106         reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
0107         #address-cells = <1>;
0108         #size-cells = <0>;
0109         status = "okay";
0110
0111         flash@0 {
0112                 compatible = "spi-nand";
0113                 reg = <0>;
0114                 spi-rx-bus-width = <4>;
0115                 spi-max-frequency = <104000000>;
0116                 #address-cells = <1>;
0117                 #size-cells = <1>;
0118         };
0119 };
0120
0121 &qspi_bk1_pins_a {
0122         pins1 {
0123                 bias-pull-up;
0124                 drive-push-pull;
0125                 slew-rate = <1>;
0126         };
0127 };
0128
0129 &rng1 {
0130         status = "okay";
0131 };
0132
0133 &sdmmc1 {
0134         pinctrl-names = "default", "opendrain", "sleep";
0135         pinctrl-0 = <&sdmmc1_b4_pins_a>;
0136         pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
0137         pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
0138         broken-cd;
0139         st,neg-edge;
0140         bus-width = <4>;
0141         vmmc-supply = <&reg_3v3>;
0142         vqmmc-supply = <&reg_3v3>;
0143         status = "okay";
0144 };
0145
0146 &sdmmc1_b4_od_pins_a {
0147         pins1 {
0148                 bias-pull-up;
0149         };
0150         pins2 {
0151                 bias-pull-up;
0152         };
0153 };
0154
0155 &sdmmc1_b4_pins_a {
0156         pins1 {
0157                 bias-pull-up;
0158         };
0159         pins2 {
0160                 bias-pull-up;
0161         };
0162 };
0163
0164 &uart4 {
0165         pinctrl-names = "default", "sleep", "idle";
0166         pinctrl-0 = <&uart4_pins_a>;
0167         pinctrl-1 = <&uart4_sleep_pins_a>;
0168         pinctrl-2 = <&uart4_idle_pins_a>;
0169         /delete-property/dmas;
0170         /delete-property/dma-names;
0171         status = "okay";
0172 };
0173
0174 &uart4_idle_pins_a {
0175         pins1 {
0176                 pinmux = <STM32_PINMUX('B', 9, ANALOG)>; /* UART4_TX */
0177         };
0178         pins2 {
0179                 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
0180                 bias-pull-up;
0181         };
0182 };
0183
0184 &uart4_pins_a {
0185         pins1 {
0186                 pinmux = <STM32_PINMUX('B', 9, AF8)>; /* UART4_TX */
0187                 bias-disable;
0188                 drive-push-pull;
0189                 slew-rate = <0>;
0190         };
0191         pins2 {
0192                 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
0193                 bias-pull-up;
0194         };
0195 };
0196
0197 &uart4_sleep_pins_a {
0198         pins {
0199                 pinmux = <STM32_PINMUX('B', 9, ANALOG)>, /* UART4_TX */
0200                         <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
0201         };
0202 };
0203
0204 &usbh_ehci {
0205         phys = <&usbphyc_port0>;
0206         phy-names = "usb";
0207         status = "okay";
0208 };
0209
0210 &usbotg_hs {
0211         dr_mode = "host";
0212         pinctrl-0 = <&usbotg_hs_pins_a>;
0213         pinctrl-names = "default";
0214         phys = <&usbphyc_port1 0>;
0215         phy-names = "usb2-phy";
0216         status = "okay";
0217 };
0218
0219 &usbphyc {
0220         status = "okay";
0221 };
0222
0223 &usbphyc_port0 {
0224         phy-supply = <&reg_3v3>;
0225 };
0226
0227 &usbphyc_port1 {
0228         phy-supply = <&reg_3v3>;
0229 };