0001 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
0002 /*
0003 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
0004 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
0005 */
0006 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
0007
0008 &pinctrl {
0009 adc1_in6_pins_a: adc1-in6-0 {
0010 pins {
0011 pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
0012 };
0013 };
0014
0015 adc12_ain_pins_a: adc12-ain-0 {
0016 pins {
0017 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
0018 <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
0019 <STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */
0020 <STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */
0021 };
0022 };
0023
0024 adc12_ain_pins_b: adc12-ain-1 {
0025 pins {
0026 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
0027 <STM32_PINMUX('F', 13, ANALOG)>; /* ADC2 in2 */
0028 };
0029 };
0030
0031 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
0032 pins {
0033 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
0034 <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
0035 };
0036 };
0037
0038 cec_pins_a: cec-0 {
0039 pins {
0040 pinmux = <STM32_PINMUX('A', 15, AF4)>;
0041 bias-disable;
0042 drive-open-drain;
0043 slew-rate = <0>;
0044 };
0045 };
0046
0047 cec_sleep_pins_a: cec-sleep-0 {
0048 pins {
0049 pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
0050 };
0051 };
0052
0053 cec_pins_b: cec-1 {
0054 pins {
0055 pinmux = <STM32_PINMUX('B', 6, AF5)>;
0056 bias-disable;
0057 drive-open-drain;
0058 slew-rate = <0>;
0059 };
0060 };
0061
0062 cec_sleep_pins_b: cec-sleep-1 {
0063 pins {
0064 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
0065 };
0066 };
0067
0068 dac_ch1_pins_a: dac-ch1-0 {
0069 pins {
0070 pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
0071 };
0072 };
0073
0074 dac_ch2_pins_a: dac-ch2-0 {
0075 pins {
0076 pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
0077 };
0078 };
0079
0080 dcmi_pins_a: dcmi-0 {
0081 pins {
0082 pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
0083 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
0084 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
0085 <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */
0086 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
0087 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
0088 <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
0089 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
0090 <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */
0091 <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */
0092 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
0093 <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */
0094 <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */
0095 <STM32_PINMUX('I', 3, AF13)>,/* DCMI_D10 */
0096 <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
0097 bias-disable;
0098 };
0099 };
0100
0101 dcmi_sleep_pins_a: dcmi-sleep-0 {
0102 pins {
0103 pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
0104 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
0105 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
0106 <STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */
0107 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
0108 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
0109 <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
0110 <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
0111 <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */
0112 <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */
0113 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
0114 <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */
0115 <STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */
0116 <STM32_PINMUX('I', 3, ANALOG)>,/* DCMI_D10 */
0117 <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
0118 };
0119 };
0120
0121 dcmi_pins_b: dcmi-1 {
0122 pins {
0123 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
0124 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
0125 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
0126 <STM32_PINMUX('C', 6, AF13)>,/* DCMI_D0 */
0127 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
0128 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
0129 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */
0130 <STM32_PINMUX('E', 11, AF13)>,/* DCMI_D4 */
0131 <STM32_PINMUX('D', 3, AF13)>,/* DCMI_D5 */
0132 <STM32_PINMUX('E', 13, AF13)>,/* DCMI_D6 */
0133 <STM32_PINMUX('B', 9, AF13)>;/* DCMI_D7 */
0134 bias-disable;
0135 };
0136 };
0137
0138 dcmi_sleep_pins_b: dcmi-sleep-1 {
0139 pins {
0140 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
0141 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
0142 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
0143 <STM32_PINMUX('C', 6, ANALOG)>,/* DCMI_D0 */
0144 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
0145 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
0146 <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */
0147 <STM32_PINMUX('E', 11, ANALOG)>,/* DCMI_D4 */
0148 <STM32_PINMUX('D', 3, ANALOG)>,/* DCMI_D5 */
0149 <STM32_PINMUX('E', 13, ANALOG)>,/* DCMI_D6 */
0150 <STM32_PINMUX('B', 9, ANALOG)>;/* DCMI_D7 */
0151 };
0152 };
0153
0154 dcmi_pins_c: dcmi-2 {
0155 pins {
0156 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
0157 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
0158 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
0159 <STM32_PINMUX('A', 9, AF13)>,/* DCMI_D0 */
0160 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
0161 <STM32_PINMUX('E', 0, AF13)>,/* DCMI_D2 */
0162 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */
0163 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
0164 <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */
0165 <STM32_PINMUX('I', 6, AF13)>,/* DCMI_D6 */
0166 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
0167 <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */
0168 <STM32_PINMUX('H', 7, AF13)>;/* DCMI_D9 */
0169 bias-pull-up;
0170 };
0171 };
0172
0173 dcmi_sleep_pins_c: dcmi-sleep-2 {
0174 pins {
0175 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
0176 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
0177 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
0178 <STM32_PINMUX('A', 9, ANALOG)>,/* DCMI_D0 */
0179 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
0180 <STM32_PINMUX('E', 0, ANALOG)>,/* DCMI_D2 */
0181 <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */
0182 <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
0183 <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */
0184 <STM32_PINMUX('I', 6, ANALOG)>,/* DCMI_D6 */
0185 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
0186 <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */
0187 <STM32_PINMUX('H', 7, ANALOG)>;/* DCMI_D9 */
0188 };
0189 };
0190
0191 ethernet0_rgmii_pins_a: rgmii-0 {
0192 pins1 {
0193 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
0194 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
0195 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
0196 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
0197 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
0198 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
0199 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
0200 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
0201 bias-disable;
0202 drive-push-pull;
0203 slew-rate = <2>;
0204 };
0205 pins2 {
0206 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
0207 bias-disable;
0208 drive-push-pull;
0209 slew-rate = <0>;
0210 };
0211 pins3 {
0212 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
0213 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
0214 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
0215 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
0216 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
0217 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
0218 bias-disable;
0219 };
0220 };
0221
0222 ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
0223 pins1 {
0224 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
0225 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
0226 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
0227 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
0228 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
0229 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
0230 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
0231 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
0232 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
0233 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
0234 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
0235 <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
0236 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
0237 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
0238 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
0239 };
0240 };
0241
0242 ethernet0_rgmii_pins_b: rgmii-1 {
0243 pins1 {
0244 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
0245 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
0246 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
0247 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
0248 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
0249 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
0250 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
0251 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
0252 bias-disable;
0253 drive-push-pull;
0254 slew-rate = <2>;
0255 };
0256 pins2 {
0257 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
0258 bias-disable;
0259 drive-push-pull;
0260 slew-rate = <0>;
0261 };
0262 pins3 {
0263 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
0264 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
0265 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
0266 <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
0267 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
0268 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
0269 bias-disable;
0270 };
0271 };
0272
0273 ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
0274 pins1 {
0275 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
0276 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
0277 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
0278 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
0279 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
0280 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
0281 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
0282 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
0283 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
0284 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
0285 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
0286 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
0287 <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
0288 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
0289 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
0290 };
0291 };
0292
0293 ethernet0_rgmii_pins_c: rgmii-2 {
0294 pins1 {
0295 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
0296 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
0297 <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
0298 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
0299 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
0300 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
0301 <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */
0302 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
0303 bias-disable;
0304 drive-push-pull;
0305 slew-rate = <2>;
0306 };
0307 pins2 {
0308 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
0309 bias-disable;
0310 drive-push-pull;
0311 slew-rate = <0>;
0312 };
0313 pins3 {
0314 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
0315 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
0316 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
0317 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
0318 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
0319 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
0320 bias-disable;
0321 };
0322 };
0323
0324 ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
0325 pins1 {
0326 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
0327 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
0328 <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */
0329 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
0330 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
0331 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
0332 <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
0333 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
0334 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
0335 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
0336 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
0337 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
0338 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
0339 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
0340 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
0341 };
0342 };
0343
0344 ethernet0_rmii_pins_a: rmii-0 {
0345 pins1 {
0346 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
0347 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
0348 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
0349 <STM32_PINMUX('A', 1, AF0)>, /* ETH1_RMII_REF_CLK */
0350 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
0351 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
0352 bias-disable;
0353 drive-push-pull;
0354 slew-rate = <2>;
0355 };
0356 pins2 {
0357 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
0358 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
0359 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
0360 bias-disable;
0361 };
0362 };
0363
0364 ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
0365 pins1 {
0366 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
0367 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
0368 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
0369 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
0370 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
0371 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
0372 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
0373 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
0374 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
0375 };
0376 };
0377
0378 ethernet0_rmii_pins_b: rmii-1 {
0379 pins1 {
0380 pinmux = <STM32_PINMUX('B', 5, AF0)>, /* ETH1_CLK */
0381 <STM32_PINMUX('C', 1, AF11)>, /* ETH1_MDC */
0382 <STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */
0383 <STM32_PINMUX('G', 14, AF11)>; /* ETH1_TXD1 */
0384 bias-disable;
0385 drive-push-pull;
0386 slew-rate = <1>;
0387 };
0388 pins2 {
0389 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */
0390 bias-disable;
0391 drive-push-pull;
0392 slew-rate = <0>;
0393 };
0394 pins3 {
0395 pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */
0396 <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RXD0 */
0397 <STM32_PINMUX('C', 5, AF11)>; /* ETH1_RXD1 */
0398 bias-disable;
0399 };
0400 pins4 {
0401 pinmux = <STM32_PINMUX('B', 11, AF11)>; /* ETH1_TX_EN */
0402 };
0403 };
0404
0405 ethernet0_rmii_sleep_pins_b: rmii-sleep-1 {
0406 pins1 {
0407 pinmux = <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
0408 <STM32_PINMUX('A', 7, ANALOG)>, /* ETH1_CRS_DV */
0409 <STM32_PINMUX('B', 5, ANALOG)>, /* ETH1_CLK */
0410 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_EN */
0411 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
0412 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RXD0 */
0413 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RXD1 */
0414 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */
0415 <STM32_PINMUX('G', 14, ANALOG)>; /* ETH1_TXD1 */
0416 };
0417 };
0418
0419 ethernet0_rmii_pins_c: rmii-2 {
0420 pins1 {
0421 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
0422 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
0423 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
0424 <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */
0425 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
0426 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
0427 bias-disable;
0428 drive-push-pull;
0429 slew-rate = <2>;
0430 };
0431 pins2 {
0432 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
0433 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
0434 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
0435 bias-disable;
0436 };
0437 };
0438
0439 ethernet0_rmii_sleep_pins_c: rmii-sleep-2 {
0440 pins1 {
0441 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
0442 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
0443 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
0444 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
0445 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
0446 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
0447 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
0448 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
0449 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
0450 };
0451 };
0452
0453 fmc_pins_a: fmc-0 {
0454 pins1 {
0455 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
0456 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
0457 <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
0458 <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
0459 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
0460 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
0461 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
0462 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
0463 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
0464 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
0465 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
0466 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
0467 <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
0468 bias-disable;
0469 drive-push-pull;
0470 slew-rate = <1>;
0471 };
0472 pins2 {
0473 pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
0474 bias-pull-up;
0475 };
0476 };
0477
0478 fmc_sleep_pins_a: fmc-sleep-0 {
0479 pins {
0480 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
0481 <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
0482 <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
0483 <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
0484 <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
0485 <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
0486 <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
0487 <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
0488 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
0489 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
0490 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
0491 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
0492 <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
0493 <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
0494 };
0495 };
0496
0497 fmc_pins_b: fmc-1 {
0498 pins {
0499 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
0500 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
0501 <STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */
0502 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
0503 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
0504 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
0505 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
0506 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
0507 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
0508 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
0509 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
0510 <STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */
0511 <STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */
0512 <STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */
0513 <STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */
0514 <STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */
0515 <STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */
0516 <STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */
0517 <STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */
0518 <STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */
0519 <STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */
0520 bias-disable;
0521 drive-push-pull;
0522 slew-rate = <3>;
0523 };
0524 };
0525
0526 fmc_sleep_pins_b: fmc-sleep-1 {
0527 pins {
0528 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
0529 <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
0530 <STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */
0531 <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
0532 <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
0533 <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
0534 <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
0535 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
0536 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
0537 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
0538 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
0539 <STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */
0540 <STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */
0541 <STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */
0542 <STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */
0543 <STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */
0544 <STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */
0545 <STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */
0546 <STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */
0547 <STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */
0548 <STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */
0549 };
0550 };
0551
0552 i2c1_pins_a: i2c1-0 {
0553 pins {
0554 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
0555 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
0556 bias-disable;
0557 drive-open-drain;
0558 slew-rate = <0>;
0559 };
0560 };
0561
0562 i2c1_sleep_pins_a: i2c1-sleep-0 {
0563 pins {
0564 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
0565 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
0566 };
0567 };
0568
0569 i2c1_pins_b: i2c1-1 {
0570 pins {
0571 pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
0572 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
0573 bias-disable;
0574 drive-open-drain;
0575 slew-rate = <0>;
0576 };
0577 };
0578
0579 i2c1_sleep_pins_b: i2c1-sleep-1 {
0580 pins {
0581 pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
0582 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
0583 };
0584 };
0585
0586 i2c2_pins_a: i2c2-0 {
0587 pins {
0588 pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
0589 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
0590 bias-disable;
0591 drive-open-drain;
0592 slew-rate = <0>;
0593 };
0594 };
0595
0596 i2c2_sleep_pins_a: i2c2-sleep-0 {
0597 pins {
0598 pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
0599 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
0600 };
0601 };
0602
0603 i2c2_pins_b1: i2c2-1 {
0604 pins {
0605 pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
0606 bias-disable;
0607 drive-open-drain;
0608 slew-rate = <0>;
0609 };
0610 };
0611
0612 i2c2_sleep_pins_b1: i2c2-sleep-1 {
0613 pins {
0614 pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
0615 };
0616 };
0617
0618 i2c2_pins_c: i2c2-2 {
0619 pins {
0620 pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
0621 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
0622 bias-disable;
0623 drive-open-drain;
0624 slew-rate = <0>;
0625 };
0626 };
0627
0628 i2c2_pins_sleep_c: i2c2-sleep-2 {
0629 pins {
0630 pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
0631 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
0632 };
0633 };
0634
0635 i2c5_pins_a: i2c5-0 {
0636 pins {
0637 pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
0638 <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
0639 bias-disable;
0640 drive-open-drain;
0641 slew-rate = <0>;
0642 };
0643 };
0644
0645 i2c5_sleep_pins_a: i2c5-sleep-0 {
0646 pins {
0647 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
0648 <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
0649
0650 };
0651 };
0652
0653 i2c5_pins_b: i2c5-1 {
0654 pins {
0655 pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
0656 <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */
0657 bias-disable;
0658 drive-open-drain;
0659 slew-rate = <0>;
0660 };
0661 };
0662
0663 i2c5_sleep_pins_b: i2c5-sleep-1 {
0664 pins {
0665 pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
0666 <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */
0667 };
0668 };
0669
0670 i2s2_pins_a: i2s2-0 {
0671 pins {
0672 pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
0673 <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
0674 <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
0675 slew-rate = <1>;
0676 drive-push-pull;
0677 bias-disable;
0678 };
0679 };
0680
0681 i2s2_sleep_pins_a: i2s2-sleep-0 {
0682 pins {
0683 pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
0684 <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
0685 <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
0686 };
0687 };
0688
0689 ltdc_pins_a: ltdc-0 {
0690 pins {
0691 pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
0692 <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
0693 <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
0694 <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
0695 <STM32_PINMUX('H', 2, AF14)>, /* LCD_R0 */
0696 <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
0697 <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
0698 <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
0699 <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
0700 <STM32_PINMUX('C', 0, AF14)>, /* LCD_R5 */
0701 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
0702 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
0703 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
0704 <STM32_PINMUX('E', 6, AF14)>, /* LCD_G1 */
0705 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
0706 <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
0707 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
0708 <STM32_PINMUX('I', 0, AF14)>, /* LCD_G5 */
0709 <STM32_PINMUX('I', 1, AF14)>, /* LCD_G6 */
0710 <STM32_PINMUX('I', 2, AF14)>, /* LCD_G7 */
0711 <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
0712 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
0713 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
0714 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
0715 <STM32_PINMUX('I', 4, AF14)>, /* LCD_B4 */
0716 <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
0717 <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
0718 <STM32_PINMUX('D', 8, AF14)>; /* LCD_B7 */
0719 bias-disable;
0720 drive-push-pull;
0721 slew-rate = <1>;
0722 };
0723 };
0724
0725 ltdc_sleep_pins_a: ltdc-sleep-0 {
0726 pins {
0727 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
0728 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
0729 <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
0730 <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
0731 <STM32_PINMUX('H', 2, ANALOG)>, /* LCD_R0 */
0732 <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
0733 <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
0734 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
0735 <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
0736 <STM32_PINMUX('C', 0, ANALOG)>, /* LCD_R5 */
0737 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
0738 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
0739 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
0740 <STM32_PINMUX('E', 6, ANALOG)>, /* LCD_G1 */
0741 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
0742 <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
0743 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
0744 <STM32_PINMUX('I', 0, ANALOG)>, /* LCD_G5 */
0745 <STM32_PINMUX('I', 1, ANALOG)>, /* LCD_G6 */
0746 <STM32_PINMUX('I', 2, ANALOG)>, /* LCD_G7 */
0747 <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
0748 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
0749 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
0750 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
0751 <STM32_PINMUX('I', 4, ANALOG)>, /* LCD_B4 */
0752 <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
0753 <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
0754 <STM32_PINMUX('D', 8, ANALOG)>; /* LCD_B7 */
0755 };
0756 };
0757
0758 ltdc_pins_b: ltdc-1 {
0759 pins {
0760 pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
0761 <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
0762 <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
0763 <STM32_PINMUX('K', 7, AF14)>, /* LCD_DE */
0764 <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
0765 <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */
0766 <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */
0767 <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */
0768 <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */
0769 <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */
0770 <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */
0771 <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */
0772 <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */
0773 <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */
0774 <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */
0775 <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
0776 <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
0777 <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */
0778 <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */
0779 <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */
0780 <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
0781 <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
0782 <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
0783 <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
0784 <STM32_PINMUX('K', 3, AF14)>, /* LCD_B4 */
0785 <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */
0786 <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */
0787 <STM32_PINMUX('K', 6, AF14)>; /* LCD_B7 */
0788 bias-disable;
0789 drive-push-pull;
0790 slew-rate = <1>;
0791 };
0792 };
0793
0794 ltdc_sleep_pins_b: ltdc-sleep-1 {
0795 pins {
0796 pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
0797 <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
0798 <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
0799 <STM32_PINMUX('K', 7, ANALOG)>, /* LCD_DE */
0800 <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
0801 <STM32_PINMUX('J', 0, ANALOG)>, /* LCD_R1 */
0802 <STM32_PINMUX('J', 1, ANALOG)>, /* LCD_R2 */
0803 <STM32_PINMUX('J', 2, ANALOG)>, /* LCD_R3 */
0804 <STM32_PINMUX('J', 3, ANALOG)>, /* LCD_R4 */
0805 <STM32_PINMUX('J', 4, ANALOG)>, /* LCD_R5 */
0806 <STM32_PINMUX('J', 5, ANALOG)>, /* LCD_R6 */
0807 <STM32_PINMUX('J', 6, ANALOG)>, /* LCD_R7 */
0808 <STM32_PINMUX('J', 7, ANALOG)>, /* LCD_G0 */
0809 <STM32_PINMUX('J', 8, ANALOG)>, /* LCD_G1 */
0810 <STM32_PINMUX('J', 9, ANALOG)>, /* LCD_G2 */
0811 <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
0812 <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
0813 <STM32_PINMUX('K', 0, ANALOG)>, /* LCD_G5 */
0814 <STM32_PINMUX('K', 1, ANALOG)>, /* LCD_G6 */
0815 <STM32_PINMUX('K', 2, ANALOG)>, /* LCD_G7 */
0816 <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
0817 <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
0818 <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
0819 <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
0820 <STM32_PINMUX('K', 3, ANALOG)>, /* LCD_B4 */
0821 <STM32_PINMUX('K', 4, ANALOG)>, /* LCD_B5 */
0822 <STM32_PINMUX('K', 5, ANALOG)>, /* LCD_B6 */
0823 <STM32_PINMUX('K', 6, ANALOG)>; /* LCD_B7 */
0824 };
0825 };
0826
0827 ltdc_pins_c: ltdc-2 {
0828 pins1 {
0829 pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */
0830 <STM32_PINMUX('B', 9, AF14)>, /* LTDC_B7 */
0831 <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */
0832 <STM32_PINMUX('D', 3, AF14)>, /* LTDC_G7 */
0833 <STM32_PINMUX('D', 6, AF14)>, /* LTDC_B2 */
0834 <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
0835 <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
0836 <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
0837 <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
0838 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
0839 <STM32_PINMUX('H', 4, AF9)>, /* LTDC_G5 */
0840 <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */
0841 <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */
0842 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
0843 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
0844 <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
0845 <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */
0846 <STM32_PINMUX('I', 5, AF14)>, /* LTDC_B5 */
0847 <STM32_PINMUX('I', 6, AF14)>, /* LTDC_B6 */
0848 <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */
0849 <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
0850 bias-disable;
0851 drive-push-pull;
0852 slew-rate = <0>;
0853 };
0854 pins2 {
0855 pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
0856 bias-disable;
0857 drive-push-pull;
0858 slew-rate = <1>;
0859 };
0860 };
0861
0862 ltdc_sleep_pins_c: ltdc-sleep-2 {
0863 pins1 {
0864 pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */
0865 <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */
0866 <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
0867 <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */
0868 <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */
0869 <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
0870 <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
0871 <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
0872 <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */
0873 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
0874 <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G5 */
0875 <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
0876 <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
0877 <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
0878 <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
0879 <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
0880 <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
0881 <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */
0882 <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */
0883 <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
0884 <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
0885 <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */
0886 };
0887 };
0888
0889 ltdc_pins_d: ltdc-3 {
0890 pins1 {
0891 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */
0892 bias-disable;
0893 drive-push-pull;
0894 slew-rate = <3>;
0895 };
0896 pins2 {
0897 pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
0898 <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
0899 <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
0900 <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */
0901 <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
0902 <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
0903 <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
0904 <STM32_PINMUX('A', 5, AF14)>, /* LCD_R4 */
0905 <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */
0906 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
0907 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
0908 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
0909 <STM32_PINMUX('B', 0, AF14)>, /* LCD_G1 */
0910 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
0911 <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
0912 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
0913 <STM32_PINMUX('H', 4, AF9)>, /* LCD_G5 */
0914 <STM32_PINMUX('I', 11, AF9)>, /* LCD_G6 */
0915 <STM32_PINMUX('G', 8, AF14)>, /* LCD_G7 */
0916 <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
0917 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
0918 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
0919 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
0920 <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
0921 <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
0922 <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
0923 <STM32_PINMUX('I', 7, AF14)>; /* LCD_B7 */
0924 bias-disable;
0925 drive-push-pull;
0926 slew-rate = <2>;
0927 };
0928 };
0929
0930 ltdc_sleep_pins_d: ltdc-sleep-3 {
0931 pins {
0932 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
0933 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
0934 <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
0935 <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
0936 <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */
0937 <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
0938 <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
0939 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
0940 <STM32_PINMUX('A', 5, ANALOG)>, /* LCD_R4 */
0941 <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */
0942 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
0943 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
0944 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
0945 <STM32_PINMUX('B', 0, ANALOG)>, /* LCD_G1 */
0946 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
0947 <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
0948 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
0949 <STM32_PINMUX('H', 4, ANALOG)>, /* LCD_G5 */
0950 <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
0951 <STM32_PINMUX('G', 8, ANALOG)>, /* LCD_G7 */
0952 <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
0953 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
0954 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
0955 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
0956 <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
0957 <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
0958 <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
0959 <STM32_PINMUX('I', 7, ANALOG)>; /* LCD_B7 */
0960 };
0961 };
0962
0963 mco1_pins_a: mco1-0 {
0964 pins {
0965 pinmux = <STM32_PINMUX('A', 13, AF2)>; /* MCO1 */
0966 bias-disable;
0967 drive-push-pull;
0968 slew-rate = <1>;
0969 };
0970 };
0971
0972 mco1_sleep_pins_a: mco1-sleep-0 {
0973 pins {
0974 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* MCO1 */
0975 };
0976 };
0977
0978 mco2_pins_a: mco2-0 {
0979 pins {
0980 pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */
0981 bias-disable;
0982 drive-push-pull;
0983 slew-rate = <2>;
0984 };
0985 };
0986
0987 mco2_sleep_pins_a: mco2-sleep-0 {
0988 pins {
0989 pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */
0990 };
0991 };
0992
0993 m_can1_pins_a: m-can1-0 {
0994 pins1 {
0995 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
0996 slew-rate = <1>;
0997 drive-push-pull;
0998 bias-disable;
0999 };
1000 pins2 {
1001 pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
1002 bias-disable;
1003 };
1004 };
1005
1006 m_can1_sleep_pins_a: m_can1-sleep-0 {
1007 pins {
1008 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
1009 <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
1010 };
1011 };
1012
1013 m_can1_pins_b: m-can1-1 {
1014 pins1 {
1015 pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
1016 slew-rate = <1>;
1017 drive-push-pull;
1018 bias-disable;
1019 };
1020 pins2 {
1021 pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
1022 bias-disable;
1023 };
1024 };
1025
1026 m_can1_sleep_pins_b: m_can1-sleep-1 {
1027 pins {
1028 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
1029 <STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */
1030 };
1031 };
1032
1033 m_can1_pins_c: m-can1-2 {
1034 pins1 {
1035 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
1036 slew-rate = <1>;
1037 drive-push-pull;
1038 bias-disable;
1039 };
1040 pins2 {
1041 pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
1042 bias-disable;
1043 };
1044 };
1045
1046 m_can1_sleep_pins_c: m_can1-sleep-2 {
1047 pins {
1048 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
1049 <STM32_PINMUX('H', 14, ANALOG)>; /* CAN1_RX */
1050 };
1051 };
1052
1053 m_can2_pins_a: m-can2-0 {
1054 pins1 {
1055 pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
1056 slew-rate = <1>;
1057 drive-push-pull;
1058 bias-disable;
1059 };
1060 pins2 {
1061 pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
1062 bias-disable;
1063 };
1064 };
1065
1066 m_can2_sleep_pins_a: m_can2-sleep-0 {
1067 pins {
1068 pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
1069 <STM32_PINMUX('B', 5, ANALOG)>; /* CAN2_RX */
1070 };
1071 };
1072
1073 pwm1_pins_a: pwm1-0 {
1074 pins {
1075 pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
1076 <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */
1077 <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */
1078 bias-pull-down;
1079 drive-push-pull;
1080 slew-rate = <0>;
1081 };
1082 };
1083
1084 pwm1_sleep_pins_a: pwm1-sleep-0 {
1085 pins {
1086 pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
1087 <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */
1088 <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */
1089 };
1090 };
1091
1092 pwm1_pins_b: pwm1-1 {
1093 pins {
1094 pinmux = <STM32_PINMUX('E', 9, AF1)>; /* TIM1_CH1 */
1095 bias-pull-down;
1096 drive-push-pull;
1097 slew-rate = <0>;
1098 };
1099 };
1100
1101 pwm1_sleep_pins_b: pwm1-sleep-1 {
1102 pins {
1103 pinmux = <STM32_PINMUX('E', 9, ANALOG)>; /* TIM1_CH1 */
1104 };
1105 };
1106
1107 pwm2_pins_a: pwm2-0 {
1108 pins {
1109 pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
1110 bias-pull-down;
1111 drive-push-pull;
1112 slew-rate = <0>;
1113 };
1114 };
1115
1116 pwm2_sleep_pins_a: pwm2-sleep-0 {
1117 pins {
1118 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
1119 };
1120 };
1121
1122 pwm3_pins_a: pwm3-0 {
1123 pins {
1124 pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
1125 bias-pull-down;
1126 drive-push-pull;
1127 slew-rate = <0>;
1128 };
1129 };
1130
1131 pwm3_sleep_pins_a: pwm3-sleep-0 {
1132 pins {
1133 pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
1134 };
1135 };
1136
1137 pwm3_pins_b: pwm3-1 {
1138 pins {
1139 pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
1140 bias-disable;
1141 drive-push-pull;
1142 slew-rate = <0>;
1143 };
1144 };
1145
1146 pwm3_sleep_pins_b: pwm3-sleep-1 {
1147 pins {
1148 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
1149 };
1150 };
1151
1152 pwm4_pins_a: pwm4-0 {
1153 pins {
1154 pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
1155 <STM32_PINMUX('D', 15, AF2)>; /* TIM4_CH4 */
1156 bias-pull-down;
1157 drive-push-pull;
1158 slew-rate = <0>;
1159 };
1160 };
1161
1162 pwm4_sleep_pins_a: pwm4-sleep-0 {
1163 pins {
1164 pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
1165 <STM32_PINMUX('D', 15, ANALOG)>; /* TIM4_CH4 */
1166 };
1167 };
1168
1169 pwm4_pins_b: pwm4-1 {
1170 pins {
1171 pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
1172 bias-pull-down;
1173 drive-push-pull;
1174 slew-rate = <0>;
1175 };
1176 };
1177
1178 pwm4_sleep_pins_b: pwm4-sleep-1 {
1179 pins {
1180 pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
1181 };
1182 };
1183
1184 pwm5_pins_a: pwm5-0 {
1185 pins {
1186 pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
1187 bias-pull-down;
1188 drive-push-pull;
1189 slew-rate = <0>;
1190 };
1191 };
1192
1193 pwm5_sleep_pins_a: pwm5-sleep-0 {
1194 pins {
1195 pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
1196 };
1197 };
1198
1199 pwm5_pins_b: pwm5-1 {
1200 pins {
1201 pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
1202 <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */
1203 <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */
1204 bias-disable;
1205 drive-push-pull;
1206 slew-rate = <0>;
1207 };
1208 };
1209
1210 pwm5_sleep_pins_b: pwm5-sleep-1 {
1211 pins {
1212 pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
1213 <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */
1214 <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */
1215 };
1216 };
1217
1218 pwm8_pins_a: pwm8-0 {
1219 pins {
1220 pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
1221 bias-pull-down;
1222 drive-push-pull;
1223 slew-rate = <0>;
1224 };
1225 };
1226
1227 pwm8_sleep_pins_a: pwm8-sleep-0 {
1228 pins {
1229 pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
1230 };
1231 };
1232
1233 pwm12_pins_a: pwm12-0 {
1234 pins {
1235 pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
1236 bias-pull-down;
1237 drive-push-pull;
1238 slew-rate = <0>;
1239 };
1240 };
1241
1242 pwm12_sleep_pins_a: pwm12-sleep-0 {
1243 pins {
1244 pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
1245 };
1246 };
1247
1248 qspi_clk_pins_a: qspi-clk-0 {
1249 pins {
1250 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
1251 bias-disable;
1252 drive-push-pull;
1253 slew-rate = <3>;
1254 };
1255 };
1256
1257 qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
1258 pins {
1259 pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
1260 };
1261 };
1262
1263 qspi_bk1_pins_a: qspi-bk1-0 {
1264 pins1 {
1265 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
1266 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
1267 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
1268 <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
1269 bias-disable;
1270 drive-push-pull;
1271 slew-rate = <1>;
1272 };
1273 pins2 {
1274 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
1275 bias-pull-up;
1276 drive-push-pull;
1277 slew-rate = <1>;
1278 };
1279 };
1280
1281 qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
1282 pins {
1283 pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
1284 <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
1285 <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
1286 <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
1287 <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
1288 };
1289 };
1290
1291 qspi_bk2_pins_a: qspi-bk2-0 {
1292 pins1 {
1293 pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
1294 <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
1295 <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
1296 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
1297 bias-disable;
1298 drive-push-pull;
1299 slew-rate = <1>;
1300 };
1301 pins2 {
1302 pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
1303 bias-pull-up;
1304 drive-push-pull;
1305 slew-rate = <1>;
1306 };
1307 };
1308
1309 qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
1310 pins {
1311 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
1312 <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
1313 <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
1314 <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
1315 <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
1316 };
1317 };
1318
1319 sai2a_pins_a: sai2a-0 {
1320 pins {
1321 pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
1322 <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1323 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1324 <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
1325 slew-rate = <0>;
1326 drive-push-pull;
1327 bias-disable;
1328 };
1329 };
1330
1331 sai2a_sleep_pins_a: sai2a-sleep-0 {
1332 pins {
1333 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
1334 <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1335 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1336 <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
1337 };
1338 };
1339
1340 sai2a_pins_b: sai2a-1 {
1341 pins1 {
1342 pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1343 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1344 <STM32_PINMUX('D', 13, AF10)>; /* SAI2_SCK_A */
1345 slew-rate = <0>;
1346 drive-push-pull;
1347 bias-disable;
1348 };
1349 };
1350
1351 sai2a_sleep_pins_b: sai2a-sleep-1 {
1352 pins {
1353 pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1354 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1355 <STM32_PINMUX('D', 13, ANALOG)>; /* SAI2_SCK_A */
1356 };
1357 };
1358
1359 sai2a_pins_c: sai2a-2 {
1360 pins {
1361 pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */
1362 <STM32_PINMUX('D', 11, AF10)>, /* SAI2_SD_A */
1363 <STM32_PINMUX('D', 12, AF10)>; /* SAI2_FS_A */
1364 slew-rate = <0>;
1365 drive-push-pull;
1366 bias-disable;
1367 };
1368 };
1369
1370 sai2a_sleep_pins_c: sai2a-sleep-2 {
1371 pins {
1372 pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */
1373 <STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */
1374 <STM32_PINMUX('D', 12, ANALOG)>; /* SAI2_FS_A */
1375 };
1376 };
1377
1378 sai2b_pins_a: sai2b-0 {
1379 pins1 {
1380 pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
1381 <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
1382 <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
1383 slew-rate = <0>;
1384 drive-push-pull;
1385 bias-disable;
1386 };
1387 pins2 {
1388 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1389 bias-disable;
1390 };
1391 };
1392
1393 sai2b_sleep_pins_a: sai2b-sleep-0 {
1394 pins {
1395 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
1396 <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
1397 <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
1398 <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
1399 };
1400 };
1401
1402 sai2b_pins_b: sai2b-1 {
1403 pins {
1404 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1405 bias-disable;
1406 };
1407 };
1408
1409 sai2b_sleep_pins_b: sai2b-sleep-1 {
1410 pins {
1411 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1412 };
1413 };
1414
1415 sai2b_pins_c: sai2b-2 {
1416 pins1 {
1417 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1418 bias-disable;
1419 };
1420 };
1421
1422 sai2b_sleep_pins_c: sai2b-sleep-2 {
1423 pins {
1424 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1425 };
1426 };
1427
1428 sai4a_pins_a: sai4a-0 {
1429 pins {
1430 pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
1431 slew-rate = <0>;
1432 drive-push-pull;
1433 bias-disable;
1434 };
1435 };
1436
1437 sai4a_sleep_pins_a: sai4a-sleep-0 {
1438 pins {
1439 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
1440 };
1441 };
1442
1443 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
1444 pins1 {
1445 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1446 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1447 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1448 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
1449 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1450 slew-rate = <1>;
1451 drive-push-pull;
1452 bias-disable;
1453 };
1454 pins2 {
1455 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1456 slew-rate = <2>;
1457 drive-push-pull;
1458 bias-disable;
1459 };
1460 };
1461
1462 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
1463 pins1 {
1464 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1465 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1466 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1467 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1468 slew-rate = <1>;
1469 drive-push-pull;
1470 bias-disable;
1471 };
1472 pins2 {
1473 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1474 slew-rate = <2>;
1475 drive-push-pull;
1476 bias-disable;
1477 };
1478 pins3 {
1479 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1480 slew-rate = <1>;
1481 drive-open-drain;
1482 bias-disable;
1483 };
1484 };
1485
1486 sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 {
1487 pins1 {
1488 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1489 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1490 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1491 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1492 slew-rate = <1>;
1493 drive-push-pull;
1494 bias-disable;
1495 };
1496 };
1497
1498 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
1499 pins {
1500 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1501 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
1502 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
1503 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
1504 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
1505 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
1506 };
1507 };
1508
1509 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
1510 pins1 {
1511 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1512 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
1513 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1514 slew-rate = <1>;
1515 drive-push-pull;
1516 bias-pull-up;
1517 };
1518 pins2{
1519 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1520 bias-pull-up;
1521 };
1522 };
1523
1524 sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 {
1525 pins1 {
1526 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1527 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
1528 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1529 slew-rate = <1>;
1530 drive-push-pull;
1531 bias-pull-up;
1532 };
1533 };
1534
1535 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
1536 pins {
1537 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1538 <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
1539 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
1540 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
1541 };
1542 };
1543
1544 sdmmc1_dir_pins_b: sdmmc1-dir-1 {
1545 pins1 {
1546 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1547 <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
1548 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1549 slew-rate = <1>;
1550 drive-push-pull;
1551 bias-pull-up;
1552 };
1553 pins2{
1554 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1555 bias-pull-up;
1556 };
1557 };
1558
1559 sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
1560 pins {
1561 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1562 <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */
1563 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
1564 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
1565 };
1566 };
1567
1568 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
1569 pins1 {
1570 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1571 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1572 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1573 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
1574 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1575 slew-rate = <1>;
1576 drive-push-pull;
1577 bias-pull-up;
1578 };
1579 pins2 {
1580 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1581 slew-rate = <2>;
1582 drive-push-pull;
1583 bias-pull-up;
1584 };
1585 };
1586
1587 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
1588 pins1 {
1589 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1590 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1591 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1592 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
1593 slew-rate = <1>;
1594 drive-push-pull;
1595 bias-pull-up;
1596 };
1597 pins2 {
1598 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1599 slew-rate = <2>;
1600 drive-push-pull;
1601 bias-pull-up;
1602 };
1603 pins3 {
1604 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1605 slew-rate = <1>;
1606 drive-open-drain;
1607 bias-pull-up;
1608 };
1609 };
1610
1611 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
1612 pins {
1613 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
1614 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
1615 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
1616 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
1617 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
1618 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
1619 };
1620 };
1621
1622 sdmmc2_b4_pins_b: sdmmc2-b4-1 {
1623 pins1 {
1624 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1625 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1626 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1627 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
1628 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1629 slew-rate = <1>;
1630 drive-push-pull;
1631 bias-disable;
1632 };
1633 pins2 {
1634 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1635 slew-rate = <2>;
1636 drive-push-pull;
1637 bias-disable;
1638 };
1639 };
1640
1641 sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
1642 pins1 {
1643 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1644 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1645 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1646 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
1647 slew-rate = <1>;
1648 drive-push-pull;
1649 bias-disable;
1650 };
1651 pins2 {
1652 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1653 slew-rate = <2>;
1654 drive-push-pull;
1655 bias-disable;
1656 };
1657 pins3 {
1658 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1659 slew-rate = <1>;
1660 drive-open-drain;
1661 bias-disable;
1662 };
1663 };
1664
1665 sdmmc2_d47_pins_a: sdmmc2-d47-0 {
1666 pins {
1667 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1668 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1669 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
1670 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
1671 slew-rate = <1>;
1672 drive-push-pull;
1673 bias-pull-up;
1674 };
1675 };
1676
1677 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
1678 pins {
1679 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1680 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1681 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
1682 <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
1683 };
1684 };
1685
1686 sdmmc2_d47_pins_b: sdmmc2-d47-1 {
1687 pins {
1688 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1689 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1690 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1691 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1692 slew-rate = <1>;
1693 drive-push-pull;
1694 bias-disable;
1695 };
1696 };
1697
1698 sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
1699 pins {
1700 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1701 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1702 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1703 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1704 };
1705 };
1706
1707 sdmmc2_d47_pins_c: sdmmc2-d47-2 {
1708 pins {
1709 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1710 <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
1711 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1712 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1713 slew-rate = <1>;
1714 drive-push-pull;
1715 bias-pull-up;
1716 };
1717 };
1718
1719 sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
1720 pins {
1721 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1722 <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */
1723 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1724 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1725 };
1726 };
1727
1728 sdmmc2_d47_pins_d: sdmmc2-d47-3 {
1729 pins {
1730 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1731 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1732 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
1733 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1734 };
1735 };
1736
1737 sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 {
1738 pins {
1739 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1740 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1741 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
1742 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1743 };
1744 };
1745
1746 sdmmc3_b4_pins_a: sdmmc3-b4-0 {
1747 pins1 {
1748 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1749 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1750 <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1751 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1752 <STM32_PINMUX('F', 1, AF9)>; /* SDMMC3_CMD */
1753 slew-rate = <1>;
1754 drive-push-pull;
1755 bias-pull-up;
1756 };
1757 pins2 {
1758 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1759 slew-rate = <2>;
1760 drive-push-pull;
1761 bias-pull-up;
1762 };
1763 };
1764
1765 sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
1766 pins1 {
1767 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1768 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1769 <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1770 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1771 slew-rate = <1>;
1772 drive-push-pull;
1773 bias-pull-up;
1774 };
1775 pins2 {
1776 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1777 slew-rate = <2>;
1778 drive-push-pull;
1779 bias-pull-up;
1780 };
1781 pins3 {
1782 pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
1783 slew-rate = <1>;
1784 drive-open-drain;
1785 bias-pull-up;
1786 };
1787 };
1788
1789 sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
1790 pins {
1791 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1792 <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1793 <STM32_PINMUX('F', 5, ANALOG)>, /* SDMMC3_D2 */
1794 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1795 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1796 <STM32_PINMUX('F', 1, ANALOG)>; /* SDMMC3_CMD */
1797 };
1798 };
1799
1800 sdmmc3_b4_pins_b: sdmmc3-b4-1 {
1801 pins1 {
1802 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1803 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1804 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
1805 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1806 <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
1807 slew-rate = <1>;
1808 drive-push-pull;
1809 bias-pull-up;
1810 };
1811 pins2 {
1812 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1813 slew-rate = <2>;
1814 drive-push-pull;
1815 bias-pull-up;
1816 };
1817 };
1818
1819 sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
1820 pins1 {
1821 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1822 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1823 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
1824 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1825 slew-rate = <1>;
1826 drive-push-pull;
1827 bias-pull-up;
1828 };
1829 pins2 {
1830 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1831 slew-rate = <2>;
1832 drive-push-pull;
1833 bias-pull-up;
1834 };
1835 pins3 {
1836 pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
1837 slew-rate = <1>;
1838 drive-open-drain;
1839 bias-pull-up;
1840 };
1841 };
1842
1843 sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
1844 pins {
1845 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1846 <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1847 <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
1848 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1849 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1850 <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
1851 };
1852 };
1853
1854 spdifrx_pins_a: spdifrx-0 {
1855 pins {
1856 pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
1857 bias-disable;
1858 };
1859 };
1860
1861 spdifrx_sleep_pins_a: spdifrx-sleep-0 {
1862 pins {
1863 pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
1864 };
1865 };
1866
1867 spi2_pins_a: spi2-0 {
1868 pins1 {
1869 pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */
1870 <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
1871 bias-disable;
1872 drive-push-pull;
1873 slew-rate = <1>;
1874 };
1875
1876 pins2 {
1877 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
1878 bias-disable;
1879 };
1880 };
1881
1882 spi2_pins_b: spi2-1 {
1883 pins1 {
1884 pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
1885 <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
1886 bias-disable;
1887 drive-push-pull;
1888 slew-rate = <1>;
1889 };
1890
1891 pins2 {
1892 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
1893 bias-disable;
1894 };
1895 };
1896
1897 spi4_pins_a: spi4-0 {
1898 pins {
1899 pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
1900 <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */
1901 bias-disable;
1902 drive-push-pull;
1903 slew-rate = <1>;
1904 };
1905 pins2 {
1906 pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
1907 bias-disable;
1908 };
1909 };
1910
1911 stusb1600_pins_a: stusb1600-0 {
1912 pins {
1913 pinmux = <STM32_PINMUX('I', 11, GPIO)>;
1914 bias-pull-up;
1915 };
1916 };
1917
1918 uart4_pins_a: uart4-0 {
1919 pins1 {
1920 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1921 bias-disable;
1922 drive-push-pull;
1923 slew-rate = <0>;
1924 };
1925 pins2 {
1926 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1927 bias-disable;
1928 };
1929 };
1930
1931 uart4_idle_pins_a: uart4-idle-0 {
1932 pins1 {
1933 pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
1934 };
1935 pins2 {
1936 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1937 bias-disable;
1938 };
1939 };
1940
1941 uart4_sleep_pins_a: uart4-sleep-0 {
1942 pins {
1943 pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */
1944 <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
1945 };
1946 };
1947
1948 uart4_pins_b: uart4-1 {
1949 pins1 {
1950 pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
1951 bias-disable;
1952 drive-push-pull;
1953 slew-rate = <0>;
1954 };
1955 pins2 {
1956 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1957 bias-disable;
1958 };
1959 };
1960
1961 uart4_pins_c: uart4-2 {
1962 pins1 {
1963 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1964 bias-disable;
1965 drive-push-pull;
1966 slew-rate = <0>;
1967 };
1968 pins2 {
1969 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1970 bias-disable;
1971 };
1972 };
1973
1974 uart4_pins_d: uart4-3 {
1975 pins1 {
1976 pinmux = <STM32_PINMUX('A', 13, AF8)>; /* UART4_TX */
1977 bias-disable;
1978 drive-push-pull;
1979 slew-rate = <0>;
1980 };
1981 pins2 {
1982 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1983 bias-disable;
1984 };
1985 };
1986
1987 uart4_idle_pins_d: uart4-idle-3 {
1988 pins1 {
1989 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* UART4_TX */
1990 };
1991 pins2 {
1992 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1993 bias-disable;
1994 };
1995 };
1996
1997 uart4_sleep_pins_d: uart4-sleep-3 {
1998 pins {
1999 pinmux = <STM32_PINMUX('A', 13, ANALOG)>, /* UART4_TX */
2000 <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
2001 };
2002 };
2003
2004 uart5_pins_a: uart5-0 {
2005 pins1 {
2006 pinmux = <STM32_PINMUX('B', 13, AF14)>; /* UART5_TX */
2007 bias-disable;
2008 drive-push-pull;
2009 slew-rate = <0>;
2010 };
2011 pins2 {
2012 pinmux = <STM32_PINMUX('B', 5, AF12)>; /* UART5_RX */
2013 bias-disable;
2014 };
2015 };
2016
2017 uart7_pins_a: uart7-0 {
2018 pins1 {
2019 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
2020 bias-disable;
2021 drive-push-pull;
2022 slew-rate = <0>;
2023 };
2024 pins2 {
2025 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
2026 <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
2027 <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
2028 bias-disable;
2029 };
2030 };
2031
2032 uart7_pins_b: uart7-1 {
2033 pins1 {
2034 pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
2035 bias-disable;
2036 drive-push-pull;
2037 slew-rate = <0>;
2038 };
2039 pins2 {
2040 pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
2041 bias-disable;
2042 };
2043 };
2044
2045 uart7_pins_c: uart7-2 {
2046 pins1 {
2047 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
2048 bias-disable;
2049 drive-push-pull;
2050 slew-rate = <0>;
2051 };
2052 pins2 {
2053 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
2054 bias-pull-up;
2055 };
2056 };
2057
2058 uart7_idle_pins_c: uart7-idle-2 {
2059 pins1 {
2060 pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */
2061 };
2062 pins2 {
2063 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
2064 bias-pull-up;
2065 };
2066 };
2067
2068 uart7_sleep_pins_c: uart7-sleep-2 {
2069 pins {
2070 pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */
2071 <STM32_PINMUX('E', 7, ANALOG)>; /* UART7_RX */
2072 };
2073 };
2074
2075 uart8_pins_a: uart8-0 {
2076 pins1 {
2077 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
2078 bias-disable;
2079 drive-push-pull;
2080 slew-rate = <0>;
2081 };
2082 pins2 {
2083 pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
2084 bias-disable;
2085 };
2086 };
2087
2088 uart8_rtscts_pins_a: uart8rtscts-0 {
2089 pins {
2090 pinmux = <STM32_PINMUX('G', 7, AF8)>, /* UART8_RTS */
2091 <STM32_PINMUX('G', 10, AF8)>; /* UART8_CTS */
2092 bias-disable;
2093 };
2094 };
2095
2096 usart2_pins_a: usart2-0 {
2097 pins1 {
2098 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
2099 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2100 bias-disable;
2101 drive-push-pull;
2102 slew-rate = <0>;
2103 };
2104 pins2 {
2105 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
2106 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
2107 bias-disable;
2108 };
2109 };
2110
2111 usart2_sleep_pins_a: usart2-sleep-0 {
2112 pins {
2113 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
2114 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
2115 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
2116 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2117 };
2118 };
2119
2120 usart2_pins_b: usart2-1 {
2121 pins1 {
2122 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
2123 <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
2124 bias-disable;
2125 drive-push-pull;
2126 slew-rate = <0>;
2127 };
2128 pins2 {
2129 pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
2130 <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
2131 bias-disable;
2132 };
2133 };
2134
2135 usart2_sleep_pins_b: usart2-sleep-1 {
2136 pins {
2137 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
2138 <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */
2139 <STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */
2140 <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
2141 };
2142 };
2143
2144 usart2_pins_c: usart2-2 {
2145 pins1 {
2146 pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
2147 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2148 bias-disable;
2149 drive-push-pull;
2150 slew-rate = <3>;
2151 };
2152 pins2 {
2153 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
2154 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
2155 bias-disable;
2156 };
2157 };
2158
2159 usart2_idle_pins_c: usart2-idle-2 {
2160 pins1 {
2161 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
2162 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2163 };
2164 pins2 {
2165 pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2166 bias-disable;
2167 drive-push-pull;
2168 slew-rate = <3>;
2169 };
2170 pins3 {
2171 pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
2172 bias-disable;
2173 };
2174 };
2175
2176 usart2_sleep_pins_c: usart2-sleep-2 {
2177 pins {
2178 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
2179 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
2180 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
2181 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2182 };
2183 };
2184
2185 usart3_pins_a: usart3-0 {
2186 pins1 {
2187 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
2188 bias-disable;
2189 drive-push-pull;
2190 slew-rate = <0>;
2191 };
2192 pins2 {
2193 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2194 bias-disable;
2195 };
2196 };
2197
2198 usart3_pins_b: usart3-1 {
2199 pins1 {
2200 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2201 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2202 bias-disable;
2203 drive-push-pull;
2204 slew-rate = <0>;
2205 };
2206 pins2 {
2207 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2208 <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
2209 bias-pull-up;
2210 };
2211 };
2212
2213 usart3_idle_pins_b: usart3-idle-1 {
2214 pins1 {
2215 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2216 <STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */
2217 };
2218 pins2 {
2219 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2220 bias-disable;
2221 drive-push-pull;
2222 slew-rate = <0>;
2223 };
2224 pins3 {
2225 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2226 bias-pull-up;
2227 };
2228 };
2229
2230 usart3_sleep_pins_b: usart3-sleep-1 {
2231 pins {
2232 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2233 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2234 <STM32_PINMUX('I', 10, ANALOG)>, /* USART3_CTS_NSS */
2235 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
2236 };
2237 };
2238
2239 usart3_pins_c: usart3-2 {
2240 pins1 {
2241 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2242 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2243 bias-disable;
2244 drive-push-pull;
2245 slew-rate = <0>;
2246 };
2247 pins2 {
2248 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2249 <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
2250 bias-pull-up;
2251 };
2252 };
2253
2254 usart3_idle_pins_c: usart3-idle-2 {
2255 pins1 {
2256 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2257 <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */
2258 };
2259 pins2 {
2260 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2261 bias-disable;
2262 drive-push-pull;
2263 slew-rate = <0>;
2264 };
2265 pins3 {
2266 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2267 bias-pull-up;
2268 };
2269 };
2270
2271 usart3_sleep_pins_c: usart3-sleep-2 {
2272 pins {
2273 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2274 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2275 <STM32_PINMUX('B', 13, ANALOG)>, /* USART3_CTS_NSS */
2276 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
2277 };
2278 };
2279
2280 usart3_pins_d: usart3-3 {
2281 pins1 {
2282 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2283 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2284 bias-disable;
2285 drive-push-pull;
2286 slew-rate = <0>;
2287 };
2288 pins2 {
2289 pinmux = <STM32_PINMUX('D', 9, AF7)>, /* USART3_RX */
2290 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
2291 bias-disable;
2292 };
2293 };
2294
2295 usart3_idle_pins_d: usart3-idle-3 {
2296 pins1 {
2297 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2298 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2299 <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */
2300 };
2301 pins2 {
2302 pinmux = <STM32_PINMUX('D', 9, AF7)>; /* USART3_RX */
2303 bias-disable;
2304 };
2305 };
2306
2307 usart3_sleep_pins_d: usart3-sleep-3 {
2308 pins {
2309 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2310 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2311 <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */
2312 <STM32_PINMUX('D', 9, ANALOG)>; /* USART3_RX */
2313 };
2314 };
2315
2316 usart3_pins_e: usart3-4 {
2317 pins1 {
2318 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2319 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2320 bias-disable;
2321 drive-push-pull;
2322 slew-rate = <0>;
2323 };
2324 pins2 {
2325 pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */
2326 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
2327 bias-pull-up;
2328 };
2329 };
2330
2331 usart3_idle_pins_e: usart3-idle-4 {
2332 pins1 {
2333 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2334 <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */
2335 };
2336 pins2 {
2337 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2338 bias-disable;
2339 drive-push-pull;
2340 slew-rate = <0>;
2341 };
2342 pins3 {
2343 pinmux = <STM32_PINMUX('B', 11, AF7)>; /* USART3_RX */
2344 bias-pull-up;
2345 };
2346 };
2347
2348 usart3_sleep_pins_e: usart3-sleep-4 {
2349 pins {
2350 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2351 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2352 <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */
2353 <STM32_PINMUX('B', 11, ANALOG)>; /* USART3_RX */
2354 };
2355 };
2356
2357 usbotg_hs_pins_a: usbotg-hs-0 {
2358 pins {
2359 pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
2360 };
2361 };
2362
2363 usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
2364 pins {
2365 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
2366 <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
2367 };
2368 };
2369 };
2370
2371 &pinctrl_z {
2372 i2c2_pins_b2: i2c2-0 {
2373 pins {
2374 pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
2375 bias-disable;
2376 drive-open-drain;
2377 slew-rate = <0>;
2378 };
2379 };
2380
2381 i2c2_sleep_pins_b2: i2c2-sleep-0 {
2382 pins {
2383 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
2384 };
2385 };
2386
2387 i2c4_pins_a: i2c4-0 {
2388 pins {
2389 pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
2390 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
2391 bias-disable;
2392 drive-open-drain;
2393 slew-rate = <0>;
2394 };
2395 };
2396
2397 i2c4_sleep_pins_a: i2c4-sleep-0 {
2398 pins {
2399 pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
2400 <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
2401 };
2402 };
2403
2404 i2c6_pins_a: i2c6-0 {
2405 pins {
2406 pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */
2407 <STM32_PINMUX('Z', 7, AF2)>; /* I2C6_SDA */
2408 bias-disable;
2409 drive-open-drain;
2410 slew-rate = <0>;
2411 };
2412 };
2413
2414 i2c6_sleep_pins_a: i2c6-sleep-0 {
2415 pins {
2416 pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */
2417 <STM32_PINMUX('Z', 7, ANALOG)>; /* I2C6_SDA */
2418 };
2419 };
2420
2421 spi1_pins_a: spi1-0 {
2422 pins1 {
2423 pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
2424 <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
2425 bias-disable;
2426 drive-push-pull;
2427 slew-rate = <1>;
2428 };
2429
2430 pins2 {
2431 pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
2432 bias-disable;
2433 };
2434 };
2435
2436 spi1_pins_b: spi1-1 {
2437 pins1 {
2438 pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
2439 <STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
2440 bias-disable;
2441 drive-push-pull;
2442 slew-rate = <1>;
2443 };
2444
2445 pins2 {
2446 pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
2447 bias-disable;
2448 };
2449 };
2450 };
