0001 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
0002 /*
0003 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
0004 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com>
0005 */
0006 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
0007
0008 &pinctrl {
0009 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
0010 pins {
0011 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
0012 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
0013 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
0014 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
0015 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
0016 slew-rate = <1>;
0017 drive-push-pull;
0018 bias-disable;
0019 };
0020 };
0021
0022 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
0023 pins1 {
0024 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
0025 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
0026 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
0027 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
0028 slew-rate = <1>;
0029 drive-push-pull;
0030 bias-disable;
0031 };
0032 pins2 {
0033 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
0034 slew-rate = <1>;
0035 drive-open-drain;
0036 bias-disable;
0037 };
0038 };
0039
0040 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
0041 pins {
0042 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
0043 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
0044 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
0045 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
0046 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
0047 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
0048 };
0049 };
0050
0051 sdmmc1_clk_pins_a: sdmmc1-clk-0 {
0052 pins {
0053 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
0054 slew-rate = <1>;
0055 drive-push-pull;
0056 bias-disable;
0057 };
0058 };
0059
0060 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
0061 pins {
0062 pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
0063 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
0064 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
0065 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */
0066 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
0067 slew-rate = <1>;
0068 drive-push-pull;
0069 bias-pull-up;
0070 };
0071 };
0072
0073 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
0074 pins1 {
0075 pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
0076 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
0077 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
0078 <STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */
0079 slew-rate = <1>;
0080 drive-push-pull;
0081 bias-pull-up;
0082 };
0083 pins2 {
0084 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
0085 slew-rate = <1>;
0086 drive-open-drain;
0087 bias-pull-up;
0088 };
0089 };
0090
0091 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
0092 pins {
0093 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
0094 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
0095 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
0096 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
0097 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
0098 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
0099 };
0100 };
0101
0102 sdmmc2_clk_pins_a: sdmmc2-clk-0 {
0103 pins {
0104 pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */
0105 slew-rate = <1>;
0106 drive-push-pull;
0107 bias-pull-up;
0108 };
0109 };
0110
0111 uart4_pins_a: uart4-0 {
0112 pins1 {
0113 pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
0114 bias-disable;
0115 drive-push-pull;
0116 slew-rate = <0>;
0117 };
0118 pins2 {
0119 pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
0120 bias-disable;
0121 };
0122 };
0123 };
