0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2014 STMicroelectronics Limited.
0004 * Author: Peter Griffin <peter.griffin@linaro.org>
0005 */
0006 #include "stih410-clock.dtsi"
0007 #include "stih407-family.dtsi"
0008 #include "stih410-pinctrl.dtsi"
0009 #include <dt-bindings/gpio/gpio.h>
0010 / {
0011 aliases {
0012 bdisp0 = &bdisp0;
0013 };
0014
0015 usb2_picophy1: phy2 {
0016 compatible = "st,stih407-usb2-phy";
0017 #phy-cells = <0>;
0018 st,syscfg = <&syscfg_core 0xf8 0xf4>;
0019 resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
0020 <&picophyreset STIH407_PICOPHY0_RESET>;
0021 reset-names = "global", "port";
0022
0023 status = "disabled";
0024 };
0025
0026 usb2_picophy2: phy3 {
0027 compatible = "st,stih407-usb2-phy";
0028 #phy-cells = <0>;
0029 st,syscfg = <&syscfg_core 0xfc 0xf4>;
0030 resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
0031 <&picophyreset STIH407_PICOPHY1_RESET>;
0032 reset-names = "global", "port";
0033
0034 status = "disabled";
0035 };
0036
0037 soc {
0038 ohci0: usb@9a03c00 {
0039 compatible = "st,st-ohci-300x";
0040 reg = <0x9a03c00 0x100>;
0041 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
0042 clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
0043 <&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>;
0044 resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>,
0045 <&softreset STIH407_USB2_PORT0_SOFTRESET>;
0046 reset-names = "power", "softreset";
0047 phys = <&usb2_picophy1>;
0048 phy-names = "usb";
0049
0050 status = "disabled";
0051 };
0052
0053 ehci0: usb@9a03e00 {
0054 compatible = "st,st-ehci-300x";
0055 reg = <0x9a03e00 0x100>;
0056 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
0057 pinctrl-names = "default";
0058 pinctrl-0 = <&pinctrl_usb0>;
0059 clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
0060 <&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>;
0061 resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>,
0062 <&softreset STIH407_USB2_PORT0_SOFTRESET>;
0063 reset-names = "power", "softreset";
0064 phys = <&usb2_picophy1>;
0065 phy-names = "usb";
0066
0067 status = "disabled";
0068 };
0069
0070 ohci1: usb@9a83c00 {
0071 compatible = "st,st-ohci-300x";
0072 reg = <0x9a83c00 0x100>;
0073 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
0074 clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
0075 <&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>;
0076 resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>,
0077 <&softreset STIH407_USB2_PORT1_SOFTRESET>;
0078 reset-names = "power", "softreset";
0079 phys = <&usb2_picophy2>;
0080 phy-names = "usb";
0081
0082 status = "disabled";
0083 };
0084
0085 ehci1: usb@9a83e00 {
0086 compatible = "st,st-ehci-300x";
0087 reg = <0x9a83e00 0x100>;
0088 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
0089 pinctrl-names = "default";
0090 pinctrl-0 = <&pinctrl_usb1>;
0091 clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
0092 <&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>;
0093 resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>,
0094 <&softreset STIH407_USB2_PORT1_SOFTRESET>;
0095 reset-names = "power", "softreset";
0096 phys = <&usb2_picophy2>;
0097 phy-names = "usb";
0098
0099 status = "disabled";
0100 };
0101
0102 sti-display-subsystem@0 {
0103 compatible = "st,sti-display-subsystem";
0104 #address-cells = <1>;
0105 #size-cells = <1>;
0106
0107 reg = <0 0>;
0108 assigned-clocks = <&clk_s_d2_quadfs 0>,
0109 <&clk_s_d2_quadfs 1>,
0110 <&clk_s_c0_pll1 0>,
0111 <&clk_s_c0_flexgen CLK_COMPO_DVP>,
0112 <&clk_s_c0_flexgen CLK_MAIN_DISP>,
0113 <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>,
0114 <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>,
0115 <&clk_s_d2_flexgen CLK_PIX_GDP1>,
0116 <&clk_s_d2_flexgen CLK_PIX_GDP2>,
0117 <&clk_s_d2_flexgen CLK_PIX_GDP3>,
0118 <&clk_s_d2_flexgen CLK_PIX_GDP4>;
0119
0120 assigned-clock-parents = <0>,
0121 <0>,
0122 <0>,
0123 <&clk_s_c0_pll1 0>,
0124 <&clk_s_c0_pll1 0>,
0125 <&clk_s_d2_quadfs 0>,
0126 <&clk_s_d2_quadfs 1>,
0127 <&clk_s_d2_quadfs 0>,
0128 <&clk_s_d2_quadfs 0>,
0129 <&clk_s_d2_quadfs 0>,
0130 <&clk_s_d2_quadfs 0>;
0131
0132 assigned-clock-rates = <297000000>,
0133 <297000000>,
0134 <0>,
0135 <400000000>,
0136 <400000000>;
0137
0138 ranges;
0139
0140 sti-compositor@9d11000 {
0141 compatible = "st,stih407-compositor";
0142 reg = <0x9d11000 0x1000>;
0143
0144 clock-names = "compo_main",
0145 "compo_aux",
0146 "pix_main",
0147 "pix_aux",
0148 "pix_gdp1",
0149 "pix_gdp2",
0150 "pix_gdp3",
0151 "pix_gdp4",
0152 "main_parent",
0153 "aux_parent";
0154
0155 clocks = <&clk_s_c0_flexgen CLK_COMPO_DVP>,
0156 <&clk_s_c0_flexgen CLK_COMPO_DVP>,
0157 <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>,
0158 <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>,
0159 <&clk_s_d2_flexgen CLK_PIX_GDP1>,
0160 <&clk_s_d2_flexgen CLK_PIX_GDP2>,
0161 <&clk_s_d2_flexgen CLK_PIX_GDP3>,
0162 <&clk_s_d2_flexgen CLK_PIX_GDP4>,
0163 <&clk_s_d2_quadfs 0>,
0164 <&clk_s_d2_quadfs 1>;
0165
0166 reset-names = "compo-main", "compo-aux";
0167 resets = <&softreset STIH407_COMPO_SOFTRESET>,
0168 <&softreset STIH407_COMPO_SOFTRESET>;
0169 st,vtg = <&vtg_main>, <&vtg_aux>;
0170 };
0171
0172 sti-tvout@8d08000 {
0173 compatible = "st,stih407-tvout";
0174 reg = <0x8d08000 0x1000>;
0175 reg-names = "tvout-reg";
0176 reset-names = "tvout";
0177 resets = <&softreset STIH407_HDTVOUT_SOFTRESET>;
0178 #address-cells = <1>;
0179 #size-cells = <1>;
0180 assigned-clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
0181 <&clk_s_d2_flexgen CLK_TMDS_HDMI>,
0182 <&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
0183 <&clk_s_d0_flexgen CLK_PCM_0>,
0184 <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
0185 <&clk_s_d2_flexgen CLK_HDDAC>;
0186
0187 assigned-clock-parents = <&clk_s_d2_quadfs 0>,
0188 <&clk_tmdsout_hdmi>,
0189 <&clk_s_d2_quadfs 0>,
0190 <&clk_s_d0_quadfs 0>,
0191 <&clk_s_d2_quadfs 0>,
0192 <&clk_s_d2_quadfs 0>;
0193 };
0194
0195 sti_hdmi: sti-hdmi@8d04000 {
0196 compatible = "st,stih407-hdmi";
0197 reg = <0x8d04000 0x1000>;
0198 reg-names = "hdmi-reg";
0199 #sound-dai-cells = <0>;
0200 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
0201 interrupt-names = "irq";
0202 clock-names = "pix",
0203 "tmds",
0204 "phy",
0205 "audio",
0206 "main_parent",
0207 "aux_parent";
0208
0209 clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
0210 <&clk_s_d2_flexgen CLK_TMDS_HDMI>,
0211 <&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
0212 <&clk_s_d0_flexgen CLK_PCM_0>,
0213 <&clk_s_d2_quadfs 0>,
0214 <&clk_s_d2_quadfs 1>;
0215
0216 hdmi,hpd-gpio = <&pio5 3 GPIO_ACTIVE_LOW>;
0217 reset-names = "hdmi";
0218 resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
0219 ddc = <&hdmiddc>;
0220 };
0221
0222 sti-hda@8d02000 {
0223 compatible = "st,stih407-hda";
0224 status = "disabled";
0225 reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
0226 reg-names = "hda-reg", "video-dacs-ctrl";
0227 clock-names = "pix",
0228 "hddac",
0229 "main_parent",
0230 "aux_parent";
0231 clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
0232 <&clk_s_d2_flexgen CLK_HDDAC>,
0233 <&clk_s_d2_quadfs 0>,
0234 <&clk_s_d2_quadfs 1>;
0235 };
0236
0237 sti-hqvdp@9c00000 {
0238 compatible = "st,stih407-hqvdp";
0239 reg = <0x9C00000 0x100000>;
0240 clock-names = "hqvdp", "pix_main";
0241 clocks = <&clk_s_c0_flexgen CLK_MAIN_DISP>,
0242 <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>;
0243 reset-names = "hqvdp";
0244 resets = <&softreset STIH407_HDQVDP_SOFTRESET>;
0245 st,vtg = <&vtg_main>;
0246 };
0247 };
0248
0249 bdisp0:bdisp@9f10000 {
0250 compatible = "st,stih407-bdisp";
0251 reg = <0x9f10000 0x1000>;
0252 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
0253 clock-names = "bdisp";
0254 clocks = <&clk_s_c0_flexgen CLK_IC_BDISP_0>;
0255 };
0256
0257 hva@8c85000 {
0258 compatible = "st,st-hva";
0259 reg = <0x8c85000 0x400>, <0x6000000 0x40000>;
0260 reg-names = "hva_registers", "hva_esram";
0261 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
0262 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
0263 clock-names = "clk_hva";
0264 clocks = <&clk_s_c0_flexgen CLK_HVA>;
0265 };
0266
0267 thermal@91a0000 {
0268 compatible = "st,stih407-thermal";
0269 reg = <0x91a0000 0x28>;
0270 clock-names = "thermal";
0271 clocks = <&clk_sysin>;
0272 interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>;
0273 };
0274
0275 sti-cec@94a087c {
0276 compatible = "st,stih-cec";
0277 reg = <0x94a087c 0x64>;
0278 clocks = <&clk_sysin>;
0279 clock-names = "cec-clk";
0280 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
0281 interrupt-names = "cec-irq";
0282 pinctrl-names = "default";
0283 pinctrl-0 = <&pinctrl_cec0_default>;
0284 resets = <&softreset STIH407_LPM_SOFTRESET>;
0285 hdmi-phandle = <&sti_hdmi>;
0286 };
0287 };
0288 };
