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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright 2012 ST-Ericsson AB
0004  *
0005  * Device Tree for the HREF+ prior to the v60 variant.
0006  */
0007 
0008 #include "ste-href-ab8500.dtsi"
0009 #include "ste-href.dtsi"
0010 
0011 / {
0012         gpio_keys {
0013                 button@1 {
0014                         gpios = <&tc3589x_gpio 7 GPIO_ACTIVE_HIGH>;
0015                 };
0016         };
0017 
0018         soc {
0019                 /* Enable UART1 on this board */
0020                 uart@80121000 {
0021                         status = "okay";
0022                 };
0023 
0024                 i2c@80004000 {
0025                         tps61052@33 {
0026                                 compatible = "ti,tps61052";
0027                                 reg = <0x33>;
0028                         };
0029 
0030                         tc35892@42 {
0031                                 compatible = "toshiba,tc35892";
0032                                 reg = <0x42>;
0033                                 interrupt-parent = <&gpio6>;
0034                                 interrupts = <25 IRQ_TYPE_EDGE_RISING>;
0035                                 pinctrl-names = "default";
0036                                 pinctrl-0 = <&tc35892_hrefprev60_mode>;
0037 
0038                                 interrupt-controller;
0039                                 #interrupt-cells = <1>;
0040 
0041                                 tc3589x_gpio: tc3589x_gpio {
0042                                         compatible = "tc3589x-gpio";
0043                                         interrupts = <0>;
0044 
0045                                         interrupt-controller;
0046                                         #interrupt-cells = <2>;
0047                                         gpio-controller;
0048                                         #gpio-cells = <2>;
0049                                 };
0050                         };
0051                 };
0052 
0053                 spi@80002000 {
0054                         /*
0055                          * On the first generation boards, this SSP/SPI port was connected
0056                          * to the AB8500.
0057                          */
0058                         pinctrl-names = "default";
0059                         pinctrl-0 = <&ssp0_hrefprev60_mode>;
0060                         status = "okay";
0061                 };
0062 
0063                 // External Micro SD slot
0064                 mmc@80126000 {
0065                         cd-gpios  = <&tc3589x_gpio 3 GPIO_ACTIVE_HIGH>;
0066                 };
0067 
0068                 pinctrl {
0069                         /* Set this up using hogs */
0070                         pinctrl-names = "default";
0071                         pinctrl-0 = <&ipgpio_hrefprev60_mode>;
0072 
0073                         ssp0 {
0074                                 ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
0075                                         hrefprev60_mux {
0076                                                 function = "ssp0";
0077                                                 groups = "ssp0_a_1";
0078                                         };
0079                                         hrefprev60_cfg1 {
0080                                                 pins = "GPIO145_C13"; /* RXD */
0081                                                 ste,config = <&in_pd>;
0082                                         };
0083 
0084                                 };
0085                         };
0086                         sdi0 {
0087                                 /* This additional pin needed on early MOP500 and HREFs previous to v60 */
0088                                 sdi0_default_mode: sdi0_default {
0089                                         hrefprev60_mux {
0090                                                 function = "mc0";
0091                                                 groups = "mc0dat31dir_a_1";
0092                                         };
0093                                         hrefprev60_cfg1 {
0094                                                 pins = "GPIO21_AB3"; /* DAT31DIR */
0095                                                 ste,config = <&out_hi>;
0096                                         };
0097 
0098                                 };
0099                         };
0100                         tc35892 {
0101                                 tc35892_hrefprev60_mode: tc35892_hrefprev60 {
0102                                         hrefprev60_cfg {
0103                                                 pins = "GPIO217_AH12";
0104                                                 ste,config = <&gpio_in_pu>;
0105                                         };
0106                                 };
0107                         };
0108                         ipgpio {
0109                                  ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
0110                                         hrefprev60_mux {
0111                                                 function = "ipgpio";
0112                                                 groups = "ipgpio0_c_1", "ipgpio1_c_1";
0113                                         };
0114                                         hrefprev60_cfg1 {
0115                                                 pins = "GPIO6_AF6", "GPIO7_AG5";
0116                                                 ste,config = <&in_pu>;
0117                                         };
0118                                  };
0119                         };
0120                 };
0121         };
0122 };