OSCL-LXR |
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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Copyright 2013 Linaro Ltd.
0004 */
0005
0006 #include "ste-dbx5x0-pinctrl.dtsi"
0007
0008 / {
0009 soc {
0010 pinctrl {
0011 /* Settings for all SPI default and sleep states */
0012 spi2 {
0013 spi2_default_mode: spi_default {
0014 default_mux {
0015 function = "spi2";
0016 groups = "spi2_oc1_2";
0017 };
0018 default_cfg1 {
0019 pins = "GPIO216_AG12"; /* FRM */
0020 ste,config = <&gpio_out_hi>;
0021 };
0022 default_cfg2 {
0023 pins = "GPIO218_AH11"; /* RXD */
0024 ste,config = <&in_pd>;
0025 };
0026 default_cfg3 {
0027 pins =
0028 "GPIO215_AH13", /* TXD */
0029 "GPIO217_AH12"; /* CLK */
0030 ste,config = <&out_lo>;
0031 };
0032 };
0033
0034 spi2_idle_mode: spi_idle {
0035 /*
0036 * The idle mode is basically sleep mode sans wakeups. Also
0037 * note that we have muxes the pins off the function here
0038 * as we do not state any muxing.
0039 */
0040 idle_cfg1 {
0041 pins = "GPIO218_AH11"; /* RXD */
0042 ste,config = <&slpm_in_pdis>;
0043 };
0044 idle_cfg2 {
0045 pins = "GPIO215_AH13"; /* TXD */
0046 ste,config = <&slpm_out_lo_pdis>;
0047 };
0048 idle_cfg3 {
0049 pins = "GPIO217_AH12"; /* CLK */
0050 ste,config = <&slpm_pdis>;
0051 };
0052 };
0053
0054 spi2_sleep_mode: spi_sleep {
0055 sleep_cfg1 {
0056 pins =
0057 "GPIO216_AG12", /* FRM */
0058 "GPIO218_AH11"; /* RXD */
0059 ste,config = <&slpm_in_wkup_pdis>;
0060 };
0061 sleep_cfg2 {
0062 pins = "GPIO215_AH13"; /* TXD */
0063 ste,config = <&slpm_out_lo_wkup_pdis>;
0064 };
0065 sleep_cfg3 {
0066 pins = "GPIO217_AH12"; /* CLK */
0067 ste,config = <&slpm_wkup_pdis>;
0068 };
0069 };
0070 };
0071
0072 mcde {
0073 lcd_default_mode: lcd_default {
0074 default_mux1 {
0075 /* Mux in VSI0 and all the data lines */
0076 function = "lcd";
0077 groups =
0078 "lcdvsi0_a_1", /* VSI0 for LCD */
0079 "lcd_d0_d7_a_1", /* Data lines */
0080 "lcdvsi1_a_1"; /* VSI1 for HDMI */
0081 };
0082 default_mux2 {
0083 function = "lcda";
0084 groups =
0085 "lcdaclk_b_1"; /* Clock line for TV-out */
0086 };
0087 default_cfg1 {
0088 pins =
0089 "GPIO68_E1", /* VSI0 */
0090 "GPIO69_E2"; /* VSI1 */
0091 ste,config = <&in_pu>;
0092 };
0093 };
0094 lcd_sleep_mode: lcd_sleep {
0095 sleep_cfg1 {
0096 pins = "GPIO69_E2"; /* VSI1 */
0097 ste,config = <&slpm_in_wkup_pdis>;
0098 };
0099 };
0100 };
0101
0102 ske {
0103 /* SKE keys on position 2 in an 8x8 matrix */
0104 ske_kpa2_default_mode: ske_kpa2_default {
0105 default_mux {
0106 function = "kp";
0107 groups = "kp_a_2";
0108 };
0109 default_cfg1 {
0110 pins =
0111 "GPIO153_B17", /* I7 */
0112 "GPIO154_C16", /* I6 */
0113 "GPIO155_C19", /* I5 */
0114 "GPIO156_C17", /* I4 */
0115 "GPIO161_D21", /* I3 */
0116 "GPIO162_D20", /* I2 */
0117 "GPIO163_C20", /* I1 */
0118 "GPIO164_B21"; /* I0 */
0119 ste,config = <&in_pd>;
0120 };
0121 default_cfg2 {
0122 pins =
0123 "GPIO157_A18", /* O7 */
0124 "GPIO158_C18", /* O6 */
0125 "GPIO159_B19", /* O5 */
0126 "GPIO160_B20", /* O4 */
0127 "GPIO165_C21", /* O3 */
0128 "GPIO166_A22", /* O2 */
0129 "GPIO167_B24", /* O1 */
0130 "GPIO168_C22"; /* O0 */
0131 ste,config = <&out_lo>;
0132 };
0133 };
0134 ske_kpa2_sleep_mode: ske_kpa2_sleep {
0135 sleep_cfg1 {
0136 pins =
0137 "GPIO153_B17", /* I7 */
0138 "GPIO154_C16", /* I6 */
0139 "GPIO155_C19", /* I5 */
0140 "GPIO156_C17", /* I4 */
0141 "GPIO161_D21", /* I3 */
0142 "GPIO162_D20", /* I2 */
0143 "GPIO163_C20", /* I1 */
0144 "GPIO164_B21"; /* I0 */
0145 ste,config = <&slpm_in_pu_wkup_pdis_en>;
0146 };
0147 sleep_cfg2 {
0148 pins =
0149 "GPIO157_A18", /* O7 */
0150 "GPIO158_C18", /* O6 */
0151 "GPIO159_B19", /* O5 */
0152 "GPIO160_B20", /* O4 */
0153 "GPIO165_C21", /* O3 */
0154 "GPIO166_A22", /* O2 */
0155 "GPIO167_B24", /* O1 */
0156 "GPIO168_C22"; /* O0 */
0157 ste,config = <&slpm_out_lo_pdis>;
0158 };
0159 };
0160 /*
0161 * SKE keys on position 1 and "other C1" combi giving
0162 * six rows of six keys.
0163 */
0164 ske_kpaoc1_default_mode: ske_kpaoc1_default {
0165 default_mux {
0166 function = "kp";
0167 groups = "kp_a_1", "kp_oc1_1";
0168 };
0169 default_cfg1 {
0170 pins =
0171 "GPIO91_B6", /* KP_O0 */
0172 "GPIO90_A3", /* KP_O1 */
0173 "GPIO87_B3", /* KP_O2 */
0174 "GPIO86_C6", /* KP_O3 */
0175 "GPIO96_D8", /* KP_O6 */
0176 "GPIO94_D7"; /* KP_O7 */
0177 ste,config = <&out_lo>;
0178 };
0179 default_cfg2 {
0180 pins =
0181 "GPIO93_B7", /* KP_I0 */
0182 "GPIO92_D6", /* KP_I1 */
0183 "GPIO89_E6", /* KP_I2 */
0184 "GPIO88_C4", /* KP_I3 */
0185 "GPIO97_D9", /* KP_I6 */
0186 "GPIO95_E8"; /* KP_I7 */
0187 ste,config = <&in_pu>;
0188 };
0189 };
0190 };
0191
0192 wlan {
0193 wlan_default_mode: wlan_default {
0194 /*
0195 * Activate this mode with the WLAN chip.
0196 * These are plain GPIO pins used by WLAN
0197 */
0198 default_cfg1 {
0199 pins =
0200 "GPIO226_AF8", /* WLAN_PMU_EN */
0201 "GPIO85_D5"; /* WLAN_ENA */
0202 ste,config = <&gpio_out_lo>;
0203 };
0204 default_cfg2 {
0205 pins = "GPIO4_AH6"; /* WLAN_IRQ on UART1 */
0206 ste,config = <&gpio_in_pu>;
0207 };
0208 };
0209 };
0210 };
0211 };
0212 };
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