0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * DTS file for SPEAr320 SoC
0004 *
0005 * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
0006 */
0007
0008 /include/ "spear3xx.dtsi"
0009
0010 / {
0011 ahb {
0012 #address-cells = <1>;
0013 #size-cells = <1>;
0014 compatible = "simple-bus";
0015 ranges = <0x40000000 0x40000000 0x80000000
0016 0xd0000000 0xd0000000 0x30000000>;
0017
0018 pinmux: pinmux@b3000000 {
0019 compatible = "st,spear320-pinmux";
0020 reg = <0xb3000000 0x1000>;
0021 #gpio-range-cells = <3>;
0022 };
0023
0024 clcd@90000000 {
0025 compatible = "arm,pl110", "arm,primecell";
0026 reg = <0x90000000 0x1000>;
0027 interrupts = <8>;
0028 interrupt-parent = <&shirq>;
0029 status = "disabled";
0030 };
0031
0032 fsmc: flash@4c000000 {
0033 compatible = "st,spear600-fsmc-nand";
0034 #address-cells = <1>;
0035 #size-cells = <1>;
0036 reg = <0x4c000000 0x1000 /* FSMC Register */
0037 0x50000000 0x0010 /* NAND Base DATA */
0038 0x50020000 0x0010 /* NAND Base ADDR */
0039 0x50010000 0x0010>; /* NAND Base CMD */
0040 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
0041 status = "disabled";
0042 };
0043
0044 sdhci@70000000 {
0045 compatible = "st,sdhci-spear";
0046 reg = <0x70000000 0x100>;
0047 interrupts = <10>;
0048 interrupt-parent = <&shirq>;
0049 status = "disabled";
0050 };
0051
0052 shirq: interrupt-controller@0xb3000000 {
0053 compatible = "st,spear320-shirq";
0054 reg = <0xb3000000 0x1000>;
0055 interrupts = <30 28 29 1>;
0056 #interrupt-cells = <1>;
0057 interrupt-controller;
0058 };
0059
0060 spi1: spi@a5000000 {
0061 compatible = "arm,pl022", "arm,primecell";
0062 reg = <0xa5000000 0x1000>;
0063 interrupts = <15>;
0064 interrupt-parent = <&shirq>;
0065 #address-cells = <1>;
0066 #size-cells = <0>;
0067 status = "disabled";
0068 };
0069
0070 spi2: spi@a6000000 {
0071 compatible = "arm,pl022", "arm,primecell";
0072 reg = <0xa6000000 0x1000>;
0073 interrupts = <16>;
0074 interrupt-parent = <&shirq>;
0075 #address-cells = <1>;
0076 #size-cells = <0>;
0077 status = "disabled";
0078 };
0079
0080 pwm: pwm@a8000000 {
0081 compatible = "st,spear-pwm";
0082 reg = <0xa8000000 0x1000>;
0083 #pwm-cells = <2>;
0084 status = "disabled";
0085 };
0086
0087 apb {
0088 #address-cells = <1>;
0089 #size-cells = <1>;
0090 compatible = "simple-bus";
0091 ranges = <0xa0000000 0xa0000000 0x20000000
0092 0xd0000000 0xd0000000 0x30000000>;
0093
0094 i2c1: i2c@a7000000 {
0095 #address-cells = <1>;
0096 #size-cells = <0>;
0097 compatible = "snps,designware-i2c";
0098 reg = <0xa7000000 0x1000>;
0099 interrupts = <21>;
0100 interrupt-parent = <&shirq>;
0101 status = "disabled";
0102 };
0103
0104 serial@a3000000 {
0105 compatible = "arm,pl011", "arm,primecell";
0106 reg = <0xa3000000 0x1000>;
0107 interrupts = <13>;
0108 interrupt-parent = <&shirq>;
0109 status = "disabled";
0110 };
0111
0112 serial@a4000000 {
0113 compatible = "arm,pl011", "arm,primecell";
0114 reg = <0xa4000000 0x1000>;
0115 interrupts = <14>;
0116 interrupt-parent = <&shirq>;
0117 status = "disabled";
0118 };
0119
0120 gpiopinctrl: gpio@b3000000 {
0121 compatible = "st,spear-plgpio";
0122 reg = <0xb3000000 0x1000>;
0123 regmap = <&pinmux>;
0124 #interrupt-cells = <1>;
0125 interrupt-controller;
0126 gpio-controller;
0127 #gpio-cells = <2>;
0128 gpio-ranges = <&pinmux 0 0 102>;
0129 status = "disabled";
0130
0131 st-plgpio,ngpio = <102>;
0132 st-plgpio,enb-reg = <0x24>;
0133 st-plgpio,wdata-reg = <0x34>;
0134 st-plgpio,dir-reg = <0x44>;
0135 st-plgpio,ie-reg = <0x64>;
0136 st-plgpio,rdata-reg = <0x54>;
0137 st-plgpio,mis-reg = <0x84>;
0138 st-plgpio,eit-reg = <0x94>;
0139 };
0140 };
0141 };
0142 };
