0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * DTS file for SPEAr310 SoC
0004 *
0005 * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
0006 */
0007
0008 /include/ "spear3xx.dtsi"
0009
0010 / {
0011 ahb {
0012 #address-cells = <1>;
0013 #size-cells = <1>;
0014 compatible = "simple-bus";
0015 ranges = <0x40000000 0x40000000 0x10000000
0016 0xb0000000 0xb0000000 0x10000000
0017 0xd0000000 0xd0000000 0x30000000>;
0018
0019 pinmux: pinmux@b4000000 {
0020 compatible = "st,spear310-pinmux";
0021 reg = <0xb4000000 0x1000>;
0022 #gpio-range-cells = <3>;
0023 };
0024
0025 fsmc: flash@44000000 {
0026 compatible = "st,spear600-fsmc-nand";
0027 #address-cells = <1>;
0028 #size-cells = <1>;
0029 reg = <0x44000000 0x1000 /* FSMC Register */
0030 0x40000000 0x0010 /* NAND Base DATA */
0031 0x40020000 0x0010 /* NAND Base ADDR */
0032 0x40010000 0x0010>; /* NAND Base CMD */
0033 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
0034 status = "disabled";
0035 };
0036
0037 shirq: interrupt-controller@0xb4000000 {
0038 compatible = "st,spear310-shirq";
0039 reg = <0xb4000000 0x1000>;
0040 interrupts = <28 29 30 1>;
0041 #interrupt-cells = <1>;
0042 interrupt-controller;
0043 };
0044
0045 apb {
0046 #address-cells = <1>;
0047 #size-cells = <1>;
0048 compatible = "simple-bus";
0049 ranges = <0xb0000000 0xb0000000 0x10000000
0050 0xd0000000 0xd0000000 0x30000000>;
0051
0052 serial@b2000000 {
0053 compatible = "arm,pl011", "arm,primecell";
0054 reg = <0xb2000000 0x1000>;
0055 interrupts = <8>;
0056 interrupt-parent = <&shirq>;
0057 status = "disabled";
0058 };
0059
0060 serial@b2080000 {
0061 compatible = "arm,pl011", "arm,primecell";
0062 reg = <0xb2080000 0x1000>;
0063 interrupts = <9>;
0064 interrupt-parent = <&shirq>;
0065 status = "disabled";
0066 };
0067
0068 serial@b2100000 {
0069 compatible = "arm,pl011", "arm,primecell";
0070 reg = <0xb2100000 0x1000>;
0071 interrupts = <10>;
0072 interrupt-parent = <&shirq>;
0073 status = "disabled";
0074 };
0075
0076 serial@b2180000 {
0077 compatible = "arm,pl011", "arm,primecell";
0078 reg = <0xb2180000 0x1000>;
0079 interrupts = <11>;
0080 interrupt-parent = <&shirq>;
0081 status = "disabled";
0082 };
0083
0084 serial@b2200000 {
0085 compatible = "arm,pl011", "arm,primecell";
0086 reg = <0xb2200000 0x1000>;
0087 interrupts = <12>;
0088 interrupt-parent = <&shirq>;
0089 status = "disabled";
0090 };
0091
0092 gpiopinctrl: gpio@b4000000 {
0093 compatible = "st,spear-plgpio";
0094 reg = <0xb4000000 0x1000>;
0095 regmap = <&pinmux>;
0096 #interrupt-cells = <1>;
0097 interrupt-controller;
0098 gpio-controller;
0099 #gpio-cells = <2>;
0100 gpio-ranges = <&pinmux 0 0 102>;
0101 status = "disabled";
0102
0103 st-plgpio,ngpio = <102>;
0104 st-plgpio,enb-reg = <0x10>;
0105 st-plgpio,wdata-reg = <0x20>;
0106 st-plgpio,dir-reg = <0x30>;
0107 st-plgpio,ie-reg = <0x50>;
0108 st-plgpio,rdata-reg = <0x40>;
0109 st-plgpio,mis-reg = <0x60>;
0110 };
0111 };
0112 };
0113 };
