0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * DTS file for all SPEAr1310 SoCs
0004 *
0005 * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
0006 */
0007
0008 /include/ "spear13xx.dtsi"
0009
0010 / {
0011 compatible = "st,spear1310";
0012
0013 ahb {
0014 spics: spics@e0700000{
0015 compatible = "st,spear-spics-gpio";
0016 reg = <0xe0700000 0x1000>;
0017 st-spics,peripcfg-reg = <0x3b0>;
0018 st-spics,sw-enable-bit = <12>;
0019 st-spics,cs-value-bit = <11>;
0020 st-spics,cs-enable-mask = <3>;
0021 st-spics,cs-enable-shift = <8>;
0022 gpio-controller;
0023 #gpio-cells = <2>;
0024 };
0025
0026 miphy0: miphy@eb800000 {
0027 compatible = "st,spear1310-miphy";
0028 reg = <0xeb800000 0x4000>;
0029 misc = <&misc>;
0030 phy-id = <0>;
0031 #phy-cells = <1>;
0032 status = "disabled";
0033 };
0034
0035 miphy1: miphy@eb804000 {
0036 compatible = "st,spear1310-miphy";
0037 reg = <0xeb804000 0x4000>;
0038 misc = <&misc>;
0039 phy-id = <1>;
0040 #phy-cells = <1>;
0041 status = "disabled";
0042 };
0043
0044 miphy2: miphy@eb808000 {
0045 compatible = "st,spear1310-miphy";
0046 reg = <0xeb808000 0x4000>;
0047 misc = <&misc>;
0048 phy-id = <2>;
0049 #phy-cells = <1>;
0050 status = "disabled";
0051 };
0052
0053 ahci0: ahci@b1000000 {
0054 compatible = "snps,spear-ahci";
0055 reg = <0xb1000000 0x10000>;
0056 interrupts = <0 68 0x4>;
0057 phys = <&miphy0 0>;
0058 phy-names = "sata-phy";
0059 status = "disabled";
0060 };
0061
0062 ahci1: ahci@b1800000 {
0063 compatible = "snps,spear-ahci";
0064 reg = <0xb1800000 0x10000>;
0065 interrupts = <0 69 0x4>;
0066 phys = <&miphy1 0>;
0067 phy-names = "sata-phy";
0068 status = "disabled";
0069 };
0070
0071 ahci2: ahci@b4000000 {
0072 compatible = "snps,spear-ahci";
0073 reg = <0xb4000000 0x10000>;
0074 interrupts = <0 70 0x4>;
0075 phys = <&miphy2 0>;
0076 phy-names = "sata-phy";
0077 status = "disabled";
0078 };
0079
0080 pcie0: pcie@b1000000 {
0081 compatible = "st,spear1340-pcie", "snps,dw-pcie";
0082 reg = <0xb1000000 0x4000>, <0x80000000 0x20000>;
0083 reg-names = "dbi", "config";
0084 interrupts = <0 68 0x4>;
0085 num-lanes = <1>;
0086 phys = <&miphy0 1>;
0087 phy-names = "pcie-phy";
0088 #address-cells = <3>;
0089 #size-cells = <2>;
0090 device_type = "pci";
0091 ranges = <0x81000000 0 0 0x80020000 0 0x00010000 /* downstream I/O */
0092 0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */
0093 bus-range = <0x00 0xff>;
0094 status = "disabled";
0095 };
0096
0097 pcie1: pcie@b1800000 {
0098 compatible = "st,spear1340-pcie", "snps,dw-pcie";
0099 reg = <0xb1800000 0x4000>, <0x90000000 0x20000>;
0100 reg-names = "dbi", "config";
0101 interrupts = <0 69 0x4>;
0102 num-lanes = <1>;
0103 phys = <&miphy1 1>;
0104 phy-names = "pcie-phy";
0105 #address-cells = <3>;
0106 #size-cells = <2>;
0107 device_type = "pci";
0108 ranges = <0x81000000 0 0 0x90020000 0 0x00010000 /* downstream I/O */
0109 0x82000000 0 0x90030000 0x90030000 0 0x0ffd0000>; /* non-prefetchable memory */
0110 bus-range = <0x00 0xff>;
0111 status = "disabled";
0112 };
0113
0114 pcie2: pcie@b4000000 {
0115 compatible = "st,spear1340-pcie", "snps,dw-pcie";
0116 reg = <0xb4000000 0x4000>, <0xc0000000 0x20000>;
0117 reg-names = "dbi", "config";
0118 interrupts = <0 70 0x4>;
0119 num-lanes = <1>;
0120 phys = <&miphy2 1>;
0121 phy-names = "pcie-phy";
0122 #address-cells = <3>;
0123 #size-cells = <2>;
0124 device_type = "pci";
0125 ranges = <0x81000000 0 0 0xc0020000 0 0x00010000 /* downstream I/O */
0126 0x82000000 0 0xc0030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */
0127 bus-range = <0x00 0xff>;
0128 status = "disabled";
0129 };
0130
0131 gmac1: eth@5c400000 {
0132 compatible = "st,spear600-gmac";
0133 reg = <0x5c400000 0x8000>;
0134 interrupts = <0 95 0x4>;
0135 interrupt-names = "macirq";
0136 phy-mode = "mii";
0137 status = "disabled";
0138 };
0139
0140 gmac2: eth@5c500000 {
0141 compatible = "st,spear600-gmac";
0142 reg = <0x5c500000 0x8000>;
0143 interrupts = <0 96 0x4>;
0144 interrupt-names = "macirq";
0145 phy-mode = "mii";
0146 status = "disabled";
0147 };
0148
0149 gmac3: eth@5c600000 {
0150 compatible = "st,spear600-gmac";
0151 reg = <0x5c600000 0x8000>;
0152 interrupts = <0 97 0x4>;
0153 interrupt-names = "macirq";
0154 phy-mode = "rmii";
0155 status = "disabled";
0156 };
0157
0158 gmac4: eth@5c700000 {
0159 compatible = "st,spear600-gmac";
0160 reg = <0x5c700000 0x8000>;
0161 interrupts = <0 98 0x4>;
0162 interrupt-names = "macirq";
0163 phy-mode = "rgmii";
0164 status = "disabled";
0165 };
0166
0167 pinmux: pinmux@e0700000 {
0168 compatible = "st,spear1310-pinmux";
0169 reg = <0xe0700000 0x1000>;
0170 #gpio-range-cells = <3>;
0171 };
0172
0173 apb {
0174 i2c1: i2c@5cd00000 {
0175 #address-cells = <1>;
0176 #size-cells = <0>;
0177 compatible = "snps,designware-i2c";
0178 reg = <0x5cd00000 0x1000>;
0179 interrupts = <0 87 0x4>;
0180 status = "disabled";
0181 };
0182
0183 i2c2: i2c@5ce00000 {
0184 #address-cells = <1>;
0185 #size-cells = <0>;
0186 compatible = "snps,designware-i2c";
0187 reg = <0x5ce00000 0x1000>;
0188 interrupts = <0 88 0x4>;
0189 status = "disabled";
0190 };
0191
0192 i2c3: i2c@5cf00000 {
0193 #address-cells = <1>;
0194 #size-cells = <0>;
0195 compatible = "snps,designware-i2c";
0196 reg = <0x5cf00000 0x1000>;
0197 interrupts = <0 89 0x4>;
0198 status = "disabled";
0199 };
0200
0201 i2c4: i2c@5d000000 {
0202 #address-cells = <1>;
0203 #size-cells = <0>;
0204 compatible = "snps,designware-i2c";
0205 reg = <0x5d000000 0x1000>;
0206 interrupts = <0 90 0x4>;
0207 status = "disabled";
0208 };
0209
0210 i2c5: i2c@5d100000 {
0211 #address-cells = <1>;
0212 #size-cells = <0>;
0213 compatible = "snps,designware-i2c";
0214 reg = <0x5d100000 0x1000>;
0215 interrupts = <0 91 0x4>;
0216 status = "disabled";
0217 };
0218
0219 i2c6: i2c@5d200000 {
0220 #address-cells = <1>;
0221 #size-cells = <0>;
0222 compatible = "snps,designware-i2c";
0223 reg = <0x5d200000 0x1000>;
0224 interrupts = <0 92 0x4>;
0225 status = "disabled";
0226 };
0227
0228 i2c7: i2c@5d300000 {
0229 #address-cells = <1>;
0230 #size-cells = <0>;
0231 compatible = "snps,designware-i2c";
0232 reg = <0x5d300000 0x1000>;
0233 interrupts = <0 93 0x4>;
0234 status = "disabled";
0235 };
0236
0237 spi1: spi@5d400000 {
0238 compatible = "arm,pl022", "arm,primecell";
0239 reg = <0x5d400000 0x1000>;
0240 interrupts = <0 99 0x4>;
0241 #address-cells = <1>;
0242 #size-cells = <0>;
0243 status = "disabled";
0244 };
0245
0246 serial@5c800000 {
0247 compatible = "arm,pl011", "arm,primecell";
0248 reg = <0x5c800000 0x1000>;
0249 interrupts = <0 82 0x4>;
0250 status = "disabled";
0251 };
0252
0253 serial@5c900000 {
0254 compatible = "arm,pl011", "arm,primecell";
0255 reg = <0x5c900000 0x1000>;
0256 interrupts = <0 83 0x4>;
0257 status = "disabled";
0258 };
0259
0260 serial@5ca00000 {
0261 compatible = "arm,pl011", "arm,primecell";
0262 reg = <0x5ca00000 0x1000>;
0263 interrupts = <0 84 0x4>;
0264 status = "disabled";
0265 };
0266
0267 serial@5cb00000 {
0268 compatible = "arm,pl011", "arm,primecell";
0269 reg = <0x5cb00000 0x1000>;
0270 interrupts = <0 85 0x4>;
0271 status = "disabled";
0272 };
0273
0274 serial@5cc00000 {
0275 compatible = "arm,pl011", "arm,primecell";
0276 reg = <0x5cc00000 0x1000>;
0277 interrupts = <0 86 0x4>;
0278 status = "disabled";
0279 };
0280
0281 thermal@e07008c4 {
0282 st,thermal-flags = <0x7000>;
0283 };
0284
0285 gpiopinctrl: gpio@d8400000 {
0286 compatible = "st,spear-plgpio";
0287 reg = <0xd8400000 0x1000>;
0288 interrupts = <0 100 0x4>;
0289 #interrupt-cells = <1>;
0290 interrupt-controller;
0291 gpio-controller;
0292 #gpio-cells = <2>;
0293 gpio-ranges = <&pinmux 0 0 246>;
0294 status = "disabled";
0295
0296 st-plgpio,ngpio = <246>;
0297 st-plgpio,enb-reg = <0xd0>;
0298 st-plgpio,wdata-reg = <0x90>;
0299 st-plgpio,dir-reg = <0xb0>;
0300 st-plgpio,ie-reg = <0x30>;
0301 st-plgpio,rdata-reg = <0x70>;
0302 st-plgpio,mis-reg = <0x10>;
0303 st-plgpio,eit-reg = <0x50>;
0304 };
0305 };
0306 };
0307 };
