boot/dts/socfpga_cyclone5_socdk.dts

0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Copyright (C) 2012 Altera Corporation <www.altera.com>
0004  */
0005
0006 #include "socfpga_cyclone5.dtsi"
0007
0008 / {
0009         model = "Altera SOCFPGA Cyclone V SoC Development Kit";
0010         compatible = "altr,socfpga-cyclone5-socdk", "altr,socfpga-cyclone5", "altr,socfpga";
0011
0012         chosen {
0013                 bootargs = "earlyprintk";
0014                 stdout-path = "serial0:115200n8";
0015         };
0016
0017         memory@0 {
0018                 name = "memory";
0019                 device_type = "memory";
0020                 reg = <0x0 0x40000000>; /* 1GB */
0021         };
0022
0023         aliases {
0024                 /* this allow the ethaddr uboot environmnet variable contents
0025                  * to be added to the gmac1 device tree blob.
0026                  */
0027                 ethernet0 = &gmac1;
0028         };
0029
0030         leds {
0031                 compatible = "gpio-leds";
0032                 hps0 {
0033                         label = "hps_led0";
0034                         gpios = <&portb 15 1>;
0035                 };
0036
0037                 hps1 {
0038                         label = "hps_led1";
0039                         gpios = <&portb 14 1>;
0040                 };
0041
0042                 hps2 {
0043                         label = "hps_led2";
0044                         gpios = <&portb 13 1>;
0045                 };
0046
0047                 hps3 {
0048                         label = "hps_led3";
0049                         gpios = <&portb 12 1>;
0050                 };
0051         };
0052
0053         regulator_3_3v: regulator {
0054                 compatible = "regulator-fixed";
0055                 regulator-name = "3.3V";
0056                 regulator-min-microvolt = <3300000>;
0057                 regulator-max-microvolt = <3300000>;
0058         };
0059 };
0060
0061 &can0 {
0062         status = "okay";
0063 };
0064
0065 &gmac1 {
0066         status = "okay";
0067         phy-mode = "rgmii";
0068
0069         rxd0-skew-ps = <0>;
0070         rxd1-skew-ps = <0>;
0071         rxd2-skew-ps = <0>;
0072         rxd3-skew-ps = <0>;
0073         txen-skew-ps = <0>;
0074         txc-skew-ps = <2600>;
0075         rxdv-skew-ps = <0>;
0076         rxc-skew-ps = <2000>;
0077 };
0078
0079 &gpio0 {
0080         status = "okay";
0081 };
0082
0083 &gpio1 {
0084         status = "okay";
0085 };
0086
0087 &gpio2 {
0088         status = "okay";
0089 };
0090
0091 &i2c0 {
0092         status = "okay";
0093         clock-frequency = <100000>;
0094
0095         /*
0096          * adjust the falling times to decrease the i2c frequency to 50Khz
0097          * because the LCD module does not work at the standard 100Khz
0098          */
0099         i2c-sda-falling-time-ns = <5000>;
0100         i2c-scl-falling-time-ns = <5000>;
0101
0102         eeprom@51 {
0103                 compatible = "atmel,24c32";
0104                 reg = <0x51>;
0105                 pagesize = <32>;
0106         };
0107
0108         rtc@68 {
0109                 compatible = "dallas,ds1339";
0110                 reg = <0x68>;
0111         };
0112 };
0113
0114 &mmc0 {
0115         cd-gpios = <&portb 18 0>;
0116         vmmc-supply = <&regulator_3_3v>;
0117         vqmmc-supply = <&regulator_3_3v>;
0118         status = "okay";
0119 };
0120
0121 &qspi {
0122         status = "okay";
0123
0124         flash0: flash@0 {
0125                 #address-cells = <1>;
0126                 #size-cells = <1>;
0127                 compatible = "micron,mt25qu02g", "jedec,spi-nor";
0128                 reg = <0>;      /* chip select */
0129                 spi-max-frequency = <100000000>;
0130
0131                 m25p,fast-read;
0132                 cdns,page-size = <256>;
0133                 cdns,block-size = <16>;
0134                 cdns,read-delay = <4>;
0135                 cdns,tshsl-ns = <50>;
0136                 cdns,tsd2d-ns = <50>;
0137                 cdns,tchsh-ns = <4>;
0138                 cdns,tslch-ns = <4>;
0139
0140                 partition@qspi-boot {
0141                         /* 8MB for raw data. */
0142                         label = "Flash 0 Raw Data";
0143                         reg = <0x0 0x800000>;
0144                 };
0145
0146                 partition@qspi-rootfs {
0147                         /* 120MB for jffs2 data. */
0148                         label = "Flash 0 jffs2 Filesystem";
0149                         reg = <0x800000 0x7800000>;
0150                 };
0151         };
0152 };
0153
0154 &spi0 {
0155         status = "okay";
0156
0157         spidev@0 {
0158                 compatible = "rohm,dh2228fv";
0159                 reg = <0>;
0160                 spi-max-frequency = <1000000>;
0161         };
0162 };
0163
0164 &usb1 {
0165         status = "okay";
0166 };