boot/dts/socfpga_arria5_socdk.dts

0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Copyright (C) 2013 Altera Corporation <www.altera.com>
0004  */
0005
0006 #include "socfpga_arria5.dtsi"
0007
0008 / {
0009         model = "Altera SOCFPGA Arria V SoC Development Kit";
0010         compatible = "altr,socfpga-arria5-socdk", "altr,socfpga-arria5", "altr,socfpga";
0011
0012         chosen {
0013                 bootargs = "earlyprintk";
0014                 stdout-path = "serial0:115200n8";
0015         };
0016
0017         memory@0 {
0018                 name = "memory";
0019                 device_type = "memory";
0020                 reg = <0x0 0x40000000>; /* 1GB */
0021         };
0022
0023         aliases {
0024                 /* this allow the ethaddr uboot environmnet variable contents
0025                 * to be added to the gmac1 device tree blob.
0026                 */
0027                 ethernet0 = &gmac1;
0028         };
0029
0030         leds {
0031                 compatible = "gpio-leds";
0032                 hps0 {
0033                         label = "hps_led0";
0034                         gpios = <&porta 0 1>;
0035                 };
0036
0037                 hps1 {
0038                         label = "hps_led1";
0039                         gpios = <&portb 11 1>;
0040                 };
0041
0042                 hps2 {
0043                         label = "hps_led2";
0044                         gpios = <&porta 17 1>;
0045                 };
0046
0047                 hps3 {
0048                         label = "hps_led3";
0049                         gpios = <&porta 18 1>;
0050                 };
0051         };
0052
0053         regulator_3_3v: regulator {
0054                 compatible = "regulator-fixed";
0055                 regulator-name = "3.3V";
0056                 regulator-min-microvolt = <3300000>;
0057                 regulator-max-microvolt = <3300000>;
0058         };
0059 };
0060
0061 &gmac1 {
0062         status = "okay";
0063         phy-mode = "rgmii";
0064
0065         rxd0-skew-ps = <0>;
0066         rxd1-skew-ps = <0>;
0067         rxd2-skew-ps = <0>;
0068         rxd3-skew-ps = <0>;
0069         txen-skew-ps = <0>;
0070         txc-skew-ps = <2600>;
0071         rxdv-skew-ps = <0>;
0072         rxc-skew-ps = <2000>;
0073 };
0074
0075 &gpio0 {
0076         status = "okay";
0077 };
0078
0079 &gpio1 {
0080         status = "okay";
0081 };
0082
0083 &gpio2 {
0084         status = "okay";
0085 };
0086
0087 &i2c0 {
0088         status = "okay";
0089         clock-frequency = <100000>;
0090
0091         /*
0092          * adjust the falling times to decrease the i2c frequency to 50Khz
0093          * because the LCD module does not work at the standard 100Khz
0094          */
0095         i2c-sda-falling-time-ns = <5000>;
0096         i2c-scl-falling-time-ns = <5000>;
0097
0098         eeprom@51 {
0099                 compatible = "atmel,24c32";
0100                 reg = <0x51>;
0101                 pagesize = <32>;
0102         };
0103
0104         rtc@68 {
0105                 compatible = "dallas,ds1339";
0106                 reg = <0x68>;
0107         };
0108 };
0109
0110 &mmc0 {
0111         vmmc-supply = <&regulator_3_3v>;
0112         vqmmc-supply = <&regulator_3_3v>;
0113         status = "okay";
0114 };
0115
0116 &qspi {
0117         status = "okay";
0118
0119         flash: flash@0 {
0120                 #address-cells = <1>;
0121                 #size-cells = <1>;
0122                 compatible = "micron,n25q256a", "jedec,spi-nor";
0123                 reg = <0>;
0124                 spi-max-frequency = <100000000>;
0125
0126                 m25p,fast-read;
0127                 cdns,page-size = <256>;
0128                 cdns,block-size = <16>;
0129                 cdns,read-delay = <4>;
0130                 cdns,tshsl-ns = <50>;
0131                 cdns,tsd2d-ns = <50>;
0132                 cdns,tchsh-ns = <4>;
0133                 cdns,tslch-ns = <4>;
0134
0135                 partition@qspi-boot {
0136                         /* 8MB for raw data. */
0137                         label = "Flash 0 Raw Data";
0138                         reg = <0x0 0x800000>;
0139                 };
0140
0141                 partition@qspi-rootfs {
0142                         /* 120MB for jffs2 data. */
0143                         label = "Flash 0 jffs2 Filesystem";
0144                         reg = <0x800000 0x7800000>;
0145                 };
0146         };
0147 };
0148
0149 &usb1 {
0150         status = "okay";
0151 };