boot/dts/socfpga_arria5.dtsi

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2013 Altera Corporation <www.altera.com>
0004  */
0005
0006 /dts-v1/;
0007 /* First 4KB has trampoline code for secondary cores. */
0008 /memreserve/ 0x00000000 0x0001000;
0009 #include "socfpga.dtsi"
0010
0011 / {
0012         soc {
0013                 clkmgr@ffd04000 {
0014                         clocks {
0015                                 osc1 {
0016                                         clock-frequency = <25000000>;
0017                                 };
0018                         };
0019                 };
0020
0021                 mmc0: dwmmc0@ff704000 {
0022                         broken-cd;
0023                         bus-width = <4>;
0024                         cap-mmc-highspeed;
0025                         cap-sd-highspeed;
0026                 };
0027
0028                 sysmgr@ffd08000 {
0029                         cpu1-start-addr = <0xffd080c4>;
0030                 };
0031         };
0032 };
0033
0034 &watchdog0 {
0035         status = "okay";
0036 };