boot/dts/socfpga_arria10_socdk.dtsi

0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Copyright (C) 2015 Altera Corporation <www.altera.com>
0004  */
0005 #include "socfpga_arria10.dtsi"
0006
0007 / {
0008         model = "Altera SOCFPGA Arria 10";
0009         compatible = "altr,socfpga-arria10-socdk", "altr,socfpga-arria10", "altr,socfpga";
0010
0011         aliases {
0012                 ethernet0 = &gmac0;
0013                 serial0 = &uart1;
0014         };
0015
0016         chosen {
0017                 bootargs = "earlyprintk";
0018                 stdout-path = "serial0:115200n8";
0019         };
0020
0021         memory@0 {
0022                 name = "memory";
0023                 device_type = "memory";
0024                 reg = <0x0 0x40000000>; /* 1GB */
0025         };
0026
0027         a10leds {
0028                 compatible = "gpio-leds";
0029
0030                 a10sr_led0 {
0031                         label = "a10sr-led0";
0032                         gpios = <&a10sr_gpio 0 1>;
0033                 };
0034
0035                 a10sr_led1 {
0036                         label = "a10sr-led1";
0037                         gpios = <&a10sr_gpio 1 1>;
0038                 };
0039
0040                 a10sr_led2 {
0041                         label = "a10sr-led2";
0042                         gpios = <&a10sr_gpio 2 1>;
0043                 };
0044
0045                 a10sr_led3 {
0046                         label = "a10sr-led3";
0047                         gpios = <&a10sr_gpio 3 1>;
0048                 };
0049         };
0050
0051         ref_033v: 033-v-ref {
0052                 compatible = "regulator-fixed";
0053                 regulator-name = "0.33V";
0054                 regulator-min-microvolt = <330000>;
0055                 regulator-max-microvolt = <330000>;
0056         };
0057
0058         soc {
0059                 clkmgr@ffd04000 {
0060                         clocks {
0061                                 osc1 {
0062                                         clock-frequency = <25000000>;
0063                                 };
0064                         };
0065                 };
0066         };
0067 };
0068
0069 &gmac0 {
0070         phy-mode = "rgmii";
0071         phy-addr = <0xffffffff>; /* probe for phy addr */
0072
0073         /*
0074          * These skews assume the user's FPGA design is adding 600ps of delay
0075          * for TX_CLK on Arria 10.
0076          *
0077          * All skews are offset since hardware skew values for the ksz9031
0078          * range from a negative skew to a positive skew.
0079          * See the micrel-ksz90x1.txt Documentation file for details.
0080          */
0081         txd0-skew-ps = <0>; /* -420ps */
0082         txd1-skew-ps = <0>; /* -420ps */
0083         txd2-skew-ps = <0>; /* -420ps */
0084         txd3-skew-ps = <0>; /* -420ps */
0085         rxd0-skew-ps = <420>; /* 0ps */
0086         rxd1-skew-ps = <420>; /* 0ps */
0087         rxd2-skew-ps = <420>; /* 0ps */
0088         rxd3-skew-ps = <420>; /* 0ps */
0089         txen-skew-ps = <0>; /* -420ps */
0090         txc-skew-ps = <1860>; /* 960ps */
0091         rxdv-skew-ps = <420>; /* 0ps */
0092         rxc-skew-ps = <1680>; /* 780ps */
0093         max-frame-size = <3800>;
0094         status = "okay";
0095 };
0096
0097 &gpio1 {
0098         status = "okay";
0099 };
0100
0101 &spi1 {
0102         status = "okay";
0103
0104         resource-manager@0 {
0105                 compatible = "altr,a10sr";
0106                 reg = <0>;
0107                 spi-max-frequency = <100000>;
0108                 /* low-level active IRQ at GPIO1_5 */
0109                 interrupt-parent = <&portb>;
0110                 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
0111                 interrupt-controller;
0112                 #interrupt-cells = <2>;
0113
0114                 a10sr_gpio: gpio-controller {
0115                         compatible = "altr,a10sr-gpio";
0116                         gpio-controller;
0117                         #gpio-cells = <2>;
0118                 };
0119
0120                 a10sr_rst: reset-controller {
0121                         compatible = "altr,a10sr-reset";
0122                         #reset-cells = <1>;
0123                 };
0124         };
0125 };
0126
0127 &i2c1 {
0128         status = "okay";
0129
0130         /*
0131          * adjust the falling times to decrease the i2c frequency to 50Khz
0132          * because the LCD module does not work at the standard 100Khz
0133          */
0134         clock-frequency = <100000>;
0135         i2c-sda-falling-time-ns = <6000>;
0136         i2c-scl-falling-time-ns = <6000>;
0137
0138         adc@14 {
0139                 compatible = "lltc,ltc2497";
0140                 reg = <0x14>;
0141                 vref-supply = <&ref_033v>;
0142         };
0143
0144         adc@16 {
0145                 compatible = "lltc,ltc2497";
0146                 reg = <0x16>;
0147                 vref-supply = <&ref_033v>;
0148         };
0149
0150         eeprom@51 {
0151                 compatible = "atmel,24c32";
0152                 reg = <0x51>;
0153                 pagesize = <32>;
0154         };
0155
0156         rtc@68 {
0157                 compatible = "dallas,ds1339";
0158                 reg = <0x68>;
0159         };
0160
0161         ltc@5c {
0162                 compatible = "ltc2977";
0163                 reg = <0x5c>;
0164         };
0165
0166         temp@4c {
0167                 compatible = "maxim,max1619";
0168                 reg = <0x4c>;
0169         };
0170 };
0171
0172 &uart1 {
0173         status = "okay";
0174 };
0175
0176 &usb0 {
0177         status = "okay";
0178         disable-over-current;
0179 };
0180
0181 &watchdog1 {
0182         status = "okay";
0183 };