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0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
0004 *
0005 * Copyright (C) 2014 Atmel,
0006 * 2014 Nicolas Ferre <nicolas.ferre@atmel.com>
0007 */
0008
0009 #include <dt-bindings/clock/at91.h>
0010 #include <dt-bindings/dma/at91.h>
0011 #include <dt-bindings/pinctrl/at91.h>
0012 #include <dt-bindings/interrupt-controller/irq.h>
0013 #include <dt-bindings/gpio/gpio.h>
0014
0015 / {
0016 #address-cells = <1>;
0017 #size-cells = <1>;
0018 model = "Atmel SAMA5D4 family SoC";
0019 compatible = "atmel,sama5d4";
0020 interrupt-parent = <&aic>;
0021
0022 aliases {
0023 serial0 = &usart3;
0024 serial1 = &usart4;
0025 serial2 = &usart2;
0026 serial3 = &usart0;
0027 serial4 = &usart1;
0028 serial5 = &uart0;
0029 serial6 = &uart1;
0030 gpio0 = &pioA;
0031 gpio1 = &pioB;
0032 gpio2 = &pioC;
0033 gpio3 = &pioD;
0034 gpio4 = &pioE;
0035 pwm0 = &pwm0;
0036 ssc0 = &ssc0;
0037 ssc1 = &ssc1;
0038 tcb0 = &tcb0;
0039 tcb1 = &tcb1;
0040 i2c0 = &i2c0;
0041 i2c1 = &i2c1;
0042 i2c2 = &i2c2;
0043 };
0044 cpus {
0045 #address-cells = <1>;
0046 #size-cells = <0>;
0047
0048 cpu@0 {
0049 device_type = "cpu";
0050 compatible = "arm,cortex-a5";
0051 reg = <0>;
0052 next-level-cache = <&L2>;
0053 };
0054 };
0055
0056 memory@20000000 {
0057 device_type = "memory";
0058 reg = <0x20000000 0x20000000>;
0059 };
0060
0061 clocks {
0062 slow_xtal: slow_xtal {
0063 compatible = "fixed-clock";
0064 #clock-cells = <0>;
0065 clock-frequency = <0>;
0066 };
0067
0068 main_xtal: main_xtal {
0069 compatible = "fixed-clock";
0070 #clock-cells = <0>;
0071 clock-frequency = <0>;
0072 };
0073
0074 adc_op_clk: adc_op_clk{
0075 compatible = "fixed-clock";
0076 #clock-cells = <0>;
0077 clock-frequency = <1000000>;
0078 };
0079 };
0080
0081 ns_sram: sram@210000 {
0082 compatible = "mmio-sram";
0083 reg = <0x00210000 0x10000>;
0084 #address-cells = <1>;
0085 #size-cells = <1>;
0086 ranges = <0 0x00210000 0x10000>;
0087 };
0088
0089 ahb {
0090 compatible = "simple-bus";
0091 #address-cells = <1>;
0092 #size-cells = <1>;
0093 ranges;
0094
0095 nfc_sram: sram@100000 {
0096 compatible = "mmio-sram";
0097 no-memory-wc;
0098 reg = <0x100000 0x2400>;
0099 #address-cells = <1>;
0100 #size-cells = <1>;
0101 ranges = <0 0x100000 0x2400>;
0102 };
0103
0104 vdec0: vdec@300000 {
0105 compatible = "microchip,sama5d4-vdec";
0106 reg = <0x00300000 0x100000>;
0107 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
0108 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
0109 };
0110
0111 usb0: gadget@400000 {
0112 compatible = "atmel,sama5d3-udc";
0113 reg = <0x00400000 0x100000
0114 0xfc02c000 0x4000>;
0115 interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
0116 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
0117 clock-names = "pclk", "hclk";
0118 status = "disabled";
0119 };
0120
0121 usb1: ohci@500000 {
0122 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
0123 reg = <0x00500000 0x100000>;
0124 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
0125 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 6>;
0126 clock-names = "ohci_clk", "hclk", "uhpck";
0127 status = "disabled";
0128 };
0129
0130 usb2: ehci@600000 {
0131 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
0132 reg = <0x00600000 0x100000>;
0133 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
0134 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 46>;
0135 clock-names = "usb_clk", "ehci_clk";
0136 status = "disabled";
0137 };
0138
0139 L2: cache-controller@a00000 {
0140 compatible = "arm,pl310-cache";
0141 reg = <0x00a00000 0x1000>;
0142 interrupts = <67 IRQ_TYPE_LEVEL_HIGH 4>;
0143 cache-unified;
0144 cache-level = <2>;
0145 };
0146
0147 ebi: ebi@10000000 {
0148 compatible = "atmel,sama5d3-ebi";
0149 #address-cells = <2>;
0150 #size-cells = <1>;
0151 atmel,smc = <&hsmc>;
0152 reg = <0x10000000 0x10000000
0153 0x60000000 0x28000000>;
0154 ranges = <0x0 0x0 0x10000000 0x10000000
0155 0x1 0x0 0x60000000 0x10000000
0156 0x2 0x0 0x70000000 0x10000000
0157 0x3 0x0 0x80000000 0x8000000>;
0158 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
0159 status = "disabled";
0160
0161 nand_controller: nand-controller {
0162 compatible = "atmel,sama5d3-nand-controller";
0163 atmel,nfc-sram = <&nfc_sram>;
0164 atmel,nfc-io = <&nfc_io>;
0165 ecc-engine = <&pmecc>;
0166 #address-cells = <2>;
0167 #size-cells = <1>;
0168 ranges;
0169 status = "disabled";
0170 };
0171 };
0172
0173 nfc_io: nfc-io@90000000 {
0174 compatible = "atmel,sama5d3-nfc-io", "syscon";
0175 reg = <0x90000000 0x8000000>;
0176 };
0177
0178 apb {
0179 compatible = "simple-bus";
0180 #address-cells = <1>;
0181 #size-cells = <1>;
0182 ranges;
0183
0184 hlcdc: hlcdc@f0000000 {
0185 compatible = "atmel,sama5d4-hlcdc";
0186 reg = <0xf0000000 0x4000>;
0187 interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>;
0188 clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
0189 clock-names = "periph_clk","sys_clk", "slow_clk";
0190 status = "disabled";
0191
0192 hlcdc-display-controller {
0193 compatible = "atmel,hlcdc-display-controller";
0194 #address-cells = <1>;
0195 #size-cells = <0>;
0196
0197 port@0 {
0198 #address-cells = <1>;
0199 #size-cells = <0>;
0200 reg = <0>;
0201 };
0202 };
0203
0204 hlcdc_pwm: hlcdc-pwm {
0205 compatible = "atmel,hlcdc-pwm";
0206 pinctrl-names = "default";
0207 pinctrl-0 = <&pinctrl_lcd_pwm>;
0208 #pwm-cells = <3>;
0209 };
0210 };
0211
0212 dma1: dma-controller@f0004000 {
0213 compatible = "atmel,sama5d4-dma";
0214 reg = <0xf0004000 0x200>;
0215 interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
0216 #dma-cells = <1>;
0217 clocks = <&pmc PMC_TYPE_PERIPHERAL 50>;
0218 clock-names = "dma_clk";
0219 };
0220
0221 isi: isi@f0008000 {
0222 compatible = "atmel,at91sam9g45-isi";
0223 reg = <0xf0008000 0x4000>;
0224 interrupts = <52 IRQ_TYPE_LEVEL_HIGH 5>;
0225 pinctrl-names = "default";
0226 pinctrl-0 = <&pinctrl_isi_data_0_7>;
0227 clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
0228 clock-names = "isi_clk";
0229 status = "disabled";
0230 port {
0231 #address-cells = <1>;
0232 #size-cells = <0>;
0233 };
0234 };
0235
0236 ramc0: ramc@f0010000 {
0237 compatible = "atmel,sama5d3-ddramc";
0238 reg = <0xf0010000 0x200>;
0239 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 16>;
0240 clock-names = "ddrck", "mpddr";
0241 };
0242
0243 dma0: dma-controller@f0014000 {
0244 compatible = "atmel,sama5d4-dma";
0245 reg = <0xf0014000 0x200>;
0246 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
0247 #dma-cells = <1>;
0248 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
0249 clock-names = "dma_clk";
0250 };
0251
0252 pmc: pmc@f0018000 {
0253 compatible = "atmel,sama5d4-pmc", "syscon";
0254 reg = <0xf0018000 0x120>;
0255 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
0256 #clock-cells = <2>;
0257 clocks = <&clk32k>, <&main_xtal>;
0258 clock-names = "slow_clk", "main_xtal";
0259 };
0260
0261 mmc0: mmc@f8000000 {
0262 compatible = "atmel,hsmci";
0263 reg = <0xf8000000 0x600>;
0264 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
0265 dmas = <&dma1
0266 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0267 | AT91_XDMAC_DT_PERID(0))>;
0268 dma-names = "rxtx";
0269 pinctrl-names = "default";
0270 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
0271 status = "disabled";
0272 #address-cells = <1>;
0273 #size-cells = <0>;
0274 clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
0275 clock-names = "mci_clk";
0276 };
0277
0278 uart0: serial@f8004000 {
0279 compatible = "atmel,at91sam9260-usart";
0280 reg = <0xf8004000 0x100>;
0281 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
0282 dmas = <&dma0
0283 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0284 | AT91_XDMAC_DT_PERID(22))>,
0285 <&dma0
0286 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0287 | AT91_XDMAC_DT_PERID(23))>;
0288 dma-names = "tx", "rx";
0289 pinctrl-names = "default";
0290 pinctrl-0 = <&pinctrl_uart0>;
0291 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
0292 clock-names = "usart";
0293 status = "disabled";
0294 };
0295
0296 ssc0: ssc@f8008000 {
0297 compatible = "atmel,at91sam9g45-ssc";
0298 reg = <0xf8008000 0x4000>;
0299 interrupts = <48 IRQ_TYPE_LEVEL_HIGH 0>;
0300 pinctrl-names = "default";
0301 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
0302 dmas = <&dma1
0303 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0304 | AT91_XDMAC_DT_PERID(26))>,
0305 <&dma1
0306 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0307 | AT91_XDMAC_DT_PERID(27))>;
0308 dma-names = "tx", "rx";
0309 clocks = <&pmc PMC_TYPE_PERIPHERAL 48>;
0310 clock-names = "pclk";
0311 status = "disabled";
0312 };
0313
0314 pwm0: pwm@f800c000 {
0315 compatible = "atmel,sama5d3-pwm";
0316 reg = <0xf800c000 0x300>;
0317 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
0318 #pwm-cells = <3>;
0319 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
0320 status = "disabled";
0321 };
0322
0323 spi0: spi@f8010000 {
0324 #address-cells = <1>;
0325 #size-cells = <0>;
0326 compatible = "atmel,at91rm9200-spi";
0327 reg = <0xf8010000 0x100>;
0328 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
0329 dmas = <&dma1
0330 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0331 | AT91_XDMAC_DT_PERID(10))>,
0332 <&dma1
0333 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0334 | AT91_XDMAC_DT_PERID(11))>;
0335 dma-names = "tx", "rx";
0336 pinctrl-names = "default";
0337 pinctrl-0 = <&pinctrl_spi0>;
0338 clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
0339 clock-names = "spi_clk";
0340 status = "disabled";
0341 };
0342
0343 i2c0: i2c@f8014000 {
0344 compatible = "atmel,sama5d4-i2c";
0345 reg = <0xf8014000 0x4000>;
0346 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
0347 dmas = <&dma1
0348 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0349 | AT91_XDMAC_DT_PERID(2))>,
0350 <&dma1
0351 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0352 | AT91_XDMAC_DT_PERID(3))>;
0353 dma-names = "tx", "rx";
0354 pinctrl-names = "default", "gpio";
0355 pinctrl-0 = <&pinctrl_i2c0>;
0356 pinctrl-1 = <&pinctrl_i2c0_gpio>;
0357 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
0358 scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0359 #address-cells = <1>;
0360 #size-cells = <0>;
0361 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
0362 status = "disabled";
0363 };
0364
0365 i2c1: i2c@f8018000 {
0366 compatible = "atmel,sama5d4-i2c";
0367 reg = <0xf8018000 0x4000>;
0368 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
0369 dmas = <&dma0
0370 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0371 | AT91_XDMAC_DT_PERID(4))>,
0372 <&dma0
0373 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0374 | AT91_XDMAC_DT_PERID(5))>;
0375 dma-names = "tx", "rx";
0376 pinctrl-names = "default", "gpio";
0377 pinctrl-0 = <&pinctrl_i2c1>;
0378 pinctrl-1 = <&pinctrl_i2c1_gpio>;
0379 sda-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>;
0380 scl-gpios = <&pioE 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0381 #address-cells = <1>;
0382 #size-cells = <0>;
0383 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
0384 status = "disabled";
0385 };
0386
0387 tcb0: timer@f801c000 {
0388 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
0389 #address-cells = <1>;
0390 #size-cells = <0>;
0391 reg = <0xf801c000 0x100>;
0392 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
0393 clocks = <&pmc PMC_TYPE_PERIPHERAL 40>, <&clk32k>;
0394 clock-names = "t0_clk", "slow_clk";
0395 };
0396
0397 macb0: ethernet@f8020000 {
0398 compatible = "atmel,sama5d4-gem";
0399 reg = <0xf8020000 0x100>;
0400 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 3>;
0401 pinctrl-names = "default";
0402 pinctrl-0 = <&pinctrl_macb0_rmii>;
0403 #address-cells = <1>;
0404 #size-cells = <0>;
0405 clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_PERIPHERAL 54>;
0406 clock-names = "hclk", "pclk";
0407 status = "disabled";
0408 };
0409
0410 i2c2: i2c@f8024000 {
0411 compatible = "atmel,sama5d4-i2c";
0412 reg = <0xf8024000 0x4000>;
0413 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
0414 dmas = <&dma1
0415 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0416 | AT91_XDMAC_DT_PERID(6))>,
0417 <&dma1
0418 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0419 | AT91_XDMAC_DT_PERID(7))>;
0420 dma-names = "tx", "rx";
0421 pinctrl-names = "default", "gpio";
0422 pinctrl-0 = <&pinctrl_i2c2>;
0423 pinctrl-1 = <&pinctrl_i2c2_gpio>;
0424 sda-gpios = <&pioB 29 GPIO_ACTIVE_HIGH>;
0425 scl-gpios = <&pioB 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0426 #address-cells = <1>;
0427 #size-cells = <0>;
0428 clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
0429 status = "disabled";
0430 };
0431
0432 sfr: sfr@f8028000 {
0433 compatible = "atmel,sama5d4-sfr", "syscon";
0434 reg = <0xf8028000 0x60>;
0435 };
0436
0437 usart0: serial@f802c000 {
0438 compatible = "atmel,at91sam9260-usart";
0439 reg = <0xf802c000 0x100>;
0440 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
0441 dmas = <&dma0
0442 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0443 | AT91_XDMAC_DT_PERID(36))>,
0444 <&dma0
0445 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0446 | AT91_XDMAC_DT_PERID(37))>;
0447 dma-names = "tx", "rx";
0448 pinctrl-names = "default";
0449 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>;
0450 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
0451 clock-names = "usart";
0452 status = "disabled";
0453 };
0454
0455 usart1: serial@f8030000 {
0456 compatible = "atmel,at91sam9260-usart";
0457 reg = <0xf8030000 0x100>;
0458 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
0459 dmas = <&dma0
0460 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0461 | AT91_XDMAC_DT_PERID(38))>,
0462 <&dma0
0463 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0464 | AT91_XDMAC_DT_PERID(39))>;
0465 dma-names = "tx", "rx";
0466 pinctrl-names = "default";
0467 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>;
0468 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
0469 clock-names = "usart";
0470 status = "disabled";
0471 };
0472
0473 mmc1: mmc@fc000000 {
0474 compatible = "atmel,hsmci";
0475 reg = <0xfc000000 0x600>;
0476 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
0477 dmas = <&dma1
0478 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0479 | AT91_XDMAC_DT_PERID(1))>;
0480 dma-names = "rxtx";
0481 pinctrl-names = "default";
0482 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
0483 status = "disabled";
0484 #address-cells = <1>;
0485 #size-cells = <0>;
0486 clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
0487 clock-names = "mci_clk";
0488 };
0489
0490 uart1: serial@fc004000 {
0491 compatible = "atmel,at91sam9260-usart";
0492 reg = <0xfc004000 0x100>;
0493 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
0494 dmas = <&dma0
0495 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0496 | AT91_XDMAC_DT_PERID(24))>,
0497 <&dma0
0498 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0499 | AT91_XDMAC_DT_PERID(25))>;
0500 dma-names = "tx", "rx";
0501 pinctrl-names = "default";
0502 pinctrl-0 = <&pinctrl_uart1>;
0503 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
0504 clock-names = "usart";
0505 status = "disabled";
0506 };
0507
0508 usart2: serial@fc008000 {
0509 compatible = "atmel,at91sam9260-usart";
0510 reg = <0xfc008000 0x100>;
0511 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
0512 dmas = <&dma1
0513 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0514 | AT91_XDMAC_DT_PERID(16))>,
0515 <&dma1
0516 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0517 | AT91_XDMAC_DT_PERID(17))>;
0518 dma-names = "tx", "rx";
0519 pinctrl-names = "default";
0520 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
0521 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
0522 clock-names = "usart";
0523 status = "disabled";
0524 };
0525
0526 usart3: serial@fc00c000 {
0527 compatible = "atmel,at91sam9260-usart";
0528 reg = <0xfc00c000 0x100>;
0529 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
0530 dmas = <&dma1
0531 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0532 | AT91_XDMAC_DT_PERID(18))>,
0533 <&dma1
0534 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0535 | AT91_XDMAC_DT_PERID(19))>;
0536 dma-names = "tx", "rx";
0537 pinctrl-names = "default";
0538 pinctrl-0 = <&pinctrl_usart3>;
0539 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
0540 clock-names = "usart";
0541 status = "disabled";
0542 };
0543
0544 usart4: serial@fc010000 {
0545 compatible = "atmel,at91sam9260-usart";
0546 reg = <0xfc010000 0x100>;
0547 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
0548 dmas = <&dma1
0549 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0550 | AT91_XDMAC_DT_PERID(20))>,
0551 <&dma1
0552 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0553 | AT91_XDMAC_DT_PERID(21))>;
0554 dma-names = "tx", "rx";
0555 pinctrl-names = "default";
0556 pinctrl-0 = <&pinctrl_usart4>;
0557 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
0558 clock-names = "usart";
0559 status = "disabled";
0560 };
0561
0562 ssc1: ssc@fc014000 {
0563 compatible = "atmel,at91sam9g45-ssc";
0564 reg = <0xfc014000 0x4000>;
0565 interrupts = <49 IRQ_TYPE_LEVEL_HIGH 0>;
0566 pinctrl-names = "default";
0567 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
0568 dmas = <&dma1
0569 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0570 | AT91_XDMAC_DT_PERID(28))>,
0571 <&dma1
0572 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0573 | AT91_XDMAC_DT_PERID(29))>;
0574 dma-names = "tx", "rx";
0575 clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
0576 clock-names = "pclk";
0577 status = "disabled";
0578 };
0579
0580 spi1: spi@fc018000 {
0581 #address-cells = <1>;
0582 #size-cells = <0>;
0583 compatible = "atmel,at91rm9200-spi";
0584 reg = <0xfc018000 0x100>;
0585 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 3>;
0586 dmas = <&dma1
0587 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0588 | AT91_XDMAC_DT_PERID(12))>,
0589 <&dma1
0590 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0591 | AT91_XDMAC_DT_PERID(13))>;
0592 dma-names = "tx", "rx";
0593 pinctrl-names = "default";
0594 pinctrl-0 = <&pinctrl_spi1>;
0595 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
0596 clock-names = "spi_clk";
0597 status = "disabled";
0598 };
0599
0600 spi2: spi@fc01c000 {
0601 #address-cells = <1>;
0602 #size-cells = <0>;
0603 compatible = "atmel,at91rm9200-spi";
0604 reg = <0xfc01c000 0x100>;
0605 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 3>;
0606 dmas = <&dma0
0607 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0608 | AT91_XDMAC_DT_PERID(14))>,
0609 <&dma0
0610 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0611 | AT91_XDMAC_DT_PERID(15))>;
0612 dma-names = "tx", "rx";
0613 pinctrl-names = "default";
0614 pinctrl-0 = <&pinctrl_spi2>;
0615 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
0616 clock-names = "spi_clk";
0617 status = "disabled";
0618 };
0619
0620 tcb1: timer@fc020000 {
0621 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
0622 #address-cells = <1>;
0623 #size-cells = <0>;
0624 reg = <0xfc020000 0x100>;
0625 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
0626 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&clk32k>;
0627 clock-names = "t0_clk", "slow_clk";
0628 };
0629
0630 tcb2: timer@fc024000 {
0631 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
0632 #address-cells = <1>;
0633 #size-cells = <0>;
0634 reg = <0xfc024000 0x100>;
0635 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
0636 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&clk32k>;
0637 clock-names = "t0_clk", "slow_clk";
0638 };
0639
0640 macb1: ethernet@fc028000 {
0641 compatible = "atmel,sama5d4-gem";
0642 reg = <0xfc028000 0x100>;
0643 interrupts = <55 IRQ_TYPE_LEVEL_HIGH 3>;
0644 pinctrl-names = "default";
0645 pinctrl-0 = <&pinctrl_macb1_rmii>;
0646 #address-cells = <1>;
0647 #size-cells = <0>;
0648 clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_PERIPHERAL 55>;
0649 clock-names = "hclk", "pclk";
0650 status = "disabled";
0651 };
0652
0653 trng@fc030000 {
0654 compatible = "atmel,at91sam9g45-trng";
0655 reg = <0xfc030000 0x100>;
0656 interrupts = <53 IRQ_TYPE_LEVEL_HIGH 0>;
0657 clocks = <&pmc PMC_TYPE_PERIPHERAL 53>;
0658 };
0659
0660 adc0: adc@fc034000 {
0661 compatible = "atmel,at91sam9x5-adc";
0662 reg = <0xfc034000 0x100>;
0663 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
0664 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>,
0665 <&adc_op_clk>;
0666 clock-names = "adc_clk", "adc_op_clk";
0667 atmel,adc-channels-used = <0x01f>;
0668 atmel,adc-startup-time = <40>;
0669 atmel,adc-use-external-triggers;
0670 atmel,adc-vref = <3000>;
0671 atmel,adc-sample-hold-time = <11>;
0672 atmel,adc-ts-pressure-threshold = <10000>;
0673 status = "disabled";
0674 };
0675
0676 aes: crypto@fc044000 {
0677 compatible = "atmel,at91sam9g46-aes";
0678 reg = <0xfc044000 0x100>;
0679 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
0680 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0681 | AT91_XDMAC_DT_PERID(41))>,
0682 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0683 | AT91_XDMAC_DT_PERID(40))>;
0684 dma-names = "tx", "rx";
0685 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
0686 clock-names = "aes_clk";
0687 };
0688
0689 tdes: crpyto@fc04c000 {
0690 compatible = "atmel,at91sam9g46-tdes";
0691 reg = <0xfc04c000 0x100>;
0692 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>;
0693 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0694 | AT91_XDMAC_DT_PERID(42))>,
0695 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0696 | AT91_XDMAC_DT_PERID(43))>;
0697 dma-names = "tx", "rx";
0698 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
0699 clock-names = "tdes_clk";
0700 };
0701
0702 sha: crypto@fc050000 {
0703 compatible = "atmel,at91sam9g46-sha";
0704 reg = <0xfc050000 0x100>;
0705 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>;
0706 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
0707 | AT91_XDMAC_DT_PERID(44))>;
0708 dma-names = "tx";
0709 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
0710 clock-names = "sha_clk";
0711 };
0712
0713 hsmc: smc@fc05c000 {
0714 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
0715 reg = <0xfc05c000 0x1000>;
0716 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
0717 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
0718 #address-cells = <1>;
0719 #size-cells = <1>;
0720 ranges;
0721
0722 pmecc: ecc-engine@ffffc070 {
0723 compatible = "atmel,sama5d4-pmecc";
0724 reg = <0xfc05c070 0x490>,
0725 <0xfc05c500 0x100>;
0726 };
0727 };
0728
0729 reset_controller: reset-controller@fc068600 {
0730 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
0731 reg = <0xfc068600 0x10>;
0732 clocks = <&clk32k>;
0733 };
0734
0735 shutdown_controller: shdwc@fc068610 {
0736 compatible = "atmel,at91sam9x5-shdwc";
0737 reg = <0xfc068610 0x10>;
0738 clocks = <&clk32k>;
0739 };
0740
0741 pit: timer@fc068630 {
0742 compatible = "atmel,at91sam9260-pit";
0743 reg = <0xfc068630 0x10>;
0744 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
0745 clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
0746 };
0747
0748 watchdog: watchdog@fc068640 {
0749 compatible = "atmel,sama5d4-wdt";
0750 reg = <0xfc068640 0x10>;
0751 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
0752 clocks = <&clk32k>;
0753 status = "disabled";
0754 };
0755
0756 clk32k: sckc@fc068650 {
0757 compatible = "atmel,sama5d4-sckc";
0758 reg = <0xfc068650 0x4>;
0759 #clock-cells = <0>;
0760 clocks = <&slow_xtal>;
0761 };
0762
0763 rtc@fc0686b0 {
0764 compatible = "atmel,sama5d4-rtc";
0765 reg = <0xfc0686b0 0x30>;
0766 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
0767 clocks = <&clk32k>;
0768 };
0769
0770 dbgu: serial@fc069000 {
0771 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
0772 reg = <0xfc069000 0x200>;
0773 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
0774 pinctrl-names = "default";
0775 pinctrl-0 = <&pinctrl_dbgu>;
0776 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
0777 clock-names = "usart";
0778 status = "disabled";
0779 };
0780
0781
0782 pinctrl: pinctrl@fc06a000 {
0783 #address-cells = <1>;
0784 #size-cells = <1>;
0785 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
0786 ranges = <0xfc068000 0xfc068000 0x100
0787 0xfc06a000 0xfc06a000 0x4000>;
0788 /* WARNING: revisit as pin spec has changed */
0789 atmel,mux-mask = <
0790 /* A B C */
0791 0xffffffff 0x3ffcfe7c 0x1c010101 /* pioA */
0792 0x7fffffff 0xfffccc3a 0x3f00cc3a /* pioB */
0793 0xffffffff 0x3ff83fff 0xff00ffff /* pioC */
0794 0xb003ff00 0x8002a800 0x00000000 /* pioD */
0795 0xffffffff 0x7fffffff 0x76fff1bf /* pioE */
0796 >;
0797
0798 pioA: gpio@fc06a000 {
0799 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
0800 reg = <0xfc06a000 0x100>;
0801 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 1>;
0802 #gpio-cells = <2>;
0803 gpio-controller;
0804 interrupt-controller;
0805 #interrupt-cells = <2>;
0806 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
0807 };
0808
0809 pioB: gpio@fc06b000 {
0810 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
0811 reg = <0xfc06b000 0x100>;
0812 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 1>;
0813 #gpio-cells = <2>;
0814 gpio-controller;
0815 interrupt-controller;
0816 #interrupt-cells = <2>;
0817 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
0818 };
0819
0820 pioC: gpio@fc06c000 {
0821 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
0822 reg = <0xfc06c000 0x100>;
0823 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 1>;
0824 #gpio-cells = <2>;
0825 gpio-controller;
0826 interrupt-controller;
0827 #interrupt-cells = <2>;
0828 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
0829 };
0830
0831 pioD: gpio@fc068000 {
0832 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
0833 reg = <0xfc068000 0x100>;
0834 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
0835 #gpio-cells = <2>;
0836 gpio-controller;
0837 interrupt-controller;
0838 #interrupt-cells = <2>;
0839 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
0840 };
0841
0842 pioE: gpio@fc06d000 {
0843 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
0844 reg = <0xfc06d000 0x100>;
0845 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 1>;
0846 #gpio-cells = <2>;
0847 gpio-controller;
0848 interrupt-controller;
0849 #interrupt-cells = <2>;
0850 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
0851 };
0852
0853 /* pinctrl pin settings */
0854 adc0 {
0855 pinctrl_adc0_adtrg: adc0_adtrg {
0856 atmel,pins =
0857 <AT91_PIOE 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with USBA_VBUS */
0858 };
0859 pinctrl_adc0_ad0: adc0_ad0 {
0860 atmel,pins =
0861 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0862 };
0863 pinctrl_adc0_ad1: adc0_ad1 {
0864 atmel,pins =
0865 <AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0866 };
0867 pinctrl_adc0_ad2: adc0_ad2 {
0868 atmel,pins =
0869 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0870 };
0871 pinctrl_adc0_ad3: adc0_ad3 {
0872 atmel,pins =
0873 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0874 };
0875 pinctrl_adc0_ad4: adc0_ad4 {
0876 atmel,pins =
0877 <AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0878 };
0879 };
0880
0881 dbgu {
0882 pinctrl_dbgu: dbgu-0 {
0883 atmel,pins =
0884 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with D14 and TDI */
0885 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with D15 and TDO */
0886 };
0887 };
0888
0889 ebi {
0890 pinctrl_ebi_addr: ebi-addr-0 {
0891 atmel,pins =
0892 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE
0893 AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
0894 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
0895 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
0896 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
0897 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
0898 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
0899 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
0900 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
0901 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
0902 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
0903 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
0904 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
0905 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
0906 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
0907 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
0908 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
0909 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
0910 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
0911 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
0912 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
0913 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
0914 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE
0915 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
0916 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
0917 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0918 };
0919
0920 pinctrl_ebi_nand_addr: ebi-addr-1 {
0921 atmel,pins =
0922 <AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
0923 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0924 };
0925
0926 pinctrl_ebi_cs0: ebi-cs0-0 {
0927 atmel,pins =
0928 <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0929 };
0930
0931 pinctrl_ebi_cs1: ebi-cs1-0 {
0932 atmel,pins =
0933 <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0934 };
0935
0936 pinctrl_ebi_cs2: ebi-cs2-0 {
0937 atmel,pins =
0938 <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0939 };
0940
0941 pinctrl_ebi_cs3: ebi-cs3-0 {
0942 atmel,pins =
0943 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0944 };
0945
0946 pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
0947 atmel,pins =
0948 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE
0949 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE
0950 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE
0951 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE
0952 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE
0953 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE
0954 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE
0955 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0956 };
0957
0958 pinctrl_ebi_data_8_15: ebi-data-msb-0 {
0959 atmel,pins =
0960 <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE
0961 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE
0962 AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE
0963 AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE
0964 AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE
0965 AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE
0966 AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE
0967 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
0968 };
0969
0970 pinctrl_ebi_nandrdy: ebi-nandrdy-0 {
0971 atmel,pins =
0972 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0973 };
0974
0975 pinctrl_ebi_nrd_nandoe: ebi-nrd-nandoe-0 {
0976 atmel,pins =
0977 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0978 };
0979
0980 pinctrl_ebi_nwait: ebi-nwait-0 {
0981 atmel,pins =
0982 <AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0983 };
0984
0985 pinctrl_ebi_nwe_nandwe: ebi-nwe-nandwe-0 {
0986 atmel,pins =
0987 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0988 };
0989
0990 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
0991 atmel,pins =
0992 <AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0993 };
0994 };
0995
0996 i2c0 {
0997 pinctrl_i2c0: i2c0-0 {
0998 atmel,pins =
0999 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
1000 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1001 };
1002
1003 pinctrl_i2c0_gpio: i2c0-gpio {
1004 atmel,pins =
1005 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1006 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1007 };
1008 };
1009
1010 i2c1 {
1011 pinctrl_i2c1: i2c1-0 {
1012 atmel,pins =
1013 <AT91_PIOE 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* TWD1, conflicts with UART0 RX and DIBP */
1014 AT91_PIOE 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* TWCK1, conflicts with UART0 TX and DIBN */
1015 };
1016
1017 pinctrl_i2c1_gpio: i2c1-gpio {
1018 atmel,pins =
1019 <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1020 AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1021 };
1022 };
1023
1024 i2c2 {
1025 pinctrl_i2c2: i2c2-0 {
1026 atmel,pins =
1027 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* TWD2, conflicts with RD0 and PWML1 */
1028 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */
1029 };
1030
1031 pinctrl_i2c2_gpio: i2c2-gpio {
1032 atmel,pins =
1033 <AT91_PIOB 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1034 AT91_PIOB 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1035 };
1036 };
1037
1038 isi {
1039 pinctrl_isi_data_0_7: isi-0-data-0-7 {
1040 atmel,pins =
1041 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D0 */
1042 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D1 */
1043 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D2 */
1044 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D3 */
1045 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D4 */
1046 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D5 */
1047 AT91_PIOC 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D6 */
1048 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D7 */
1049 AT91_PIOB 1 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_PCK, conflict with G0_RXCK */
1050 AT91_PIOB 3 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_VSYNC */
1051 AT91_PIOB 4 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_HSYNC */
1052 };
1053 pinctrl_isi_data_8_9: isi-0-data-8-9 {
1054 atmel,pins =
1055 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D8, conflicts with SPI0_MISO, PWMH2 */
1056 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D9, conflicts with SPI0_MOSI, PWML2 */
1057 };
1058 pinctrl_isi_data_10_11: isi-0-data-10-11 {
1059 atmel,pins =
1060 <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D10, conflicts with SPI0_SPCK, PWMH3 */
1061 AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D11, conflicts with SPI0_NPCS0, PWML3 */
1062 };
1063 };
1064
1065 lcd {
1066 pinctrl_lcd_base: lcd-base-0 {
1067 atmel,pins =
1068 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */
1069 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */
1070 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */
1071 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
1072 };
1073 pinctrl_lcd_pwm: lcd-pwm-0 {
1074 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */
1075 };
1076 pinctrl_lcd_rgb444: lcd-rgb-0 {
1077 atmel,pins =
1078 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1079 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1080 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1081 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1082 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1083 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1084 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1085 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1086 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1087 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1088 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1089 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */
1090 };
1091 pinctrl_lcd_rgb565: lcd-rgb-1 {
1092 atmel,pins =
1093 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1094 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1095 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1096 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1097 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1098 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1099 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1100 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1101 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1102 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1103 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1104 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1105 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1106 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1107 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1108 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */
1109 };
1110 pinctrl_lcd_rgb666: lcd-rgb-2 {
1111 atmel,pins =
1112 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1113 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1114 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1115 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1116 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1117 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1118 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1119 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1120 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1121 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1122 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1123 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1124 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1125 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1126 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1127 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1128 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1129 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1130 };
1131 pinctrl_lcd_rgb777: lcd-rgb-3 {
1132 atmel,pins =
1133 /* LCDDAT0 conflicts with TMS */
1134 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1135 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1136 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1137 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1138 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1139 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1140 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1141 /* LCDDAT8 conflicts with TCK */
1142 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1143 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1144 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1145 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1146 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1147 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1148 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1149 /* LCDDAT16 conflicts with NTRST */
1150 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
1151 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1152 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1153 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1154 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1155 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1156 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1157 };
1158 pinctrl_lcd_rgb888: lcd-rgb-4 {
1159 atmel,pins =
1160 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1161 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1162 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1163 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1164 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1165 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1166 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1167 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1168 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1169 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1170 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1171 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1172 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1173 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1174 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1175 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1176 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
1177 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
1178 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1179 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1180 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1181 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1182 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1183 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1184 };
1185 };
1186
1187 macb0 {
1188 pinctrl_macb0_rmii: macb0_rmii-0 {
1189 atmel,pins =
1190 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX0 */
1191 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX1 */
1192 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX0 */
1193 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX1 */
1194 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXDV */
1195 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXER */
1196 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXEN */
1197 AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXCK */
1198 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDC */
1199 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDIO */
1200 >;
1201 };
1202 };
1203
1204 macb1 {
1205 pinctrl_macb1_rmii: macb1_rmii-0 {
1206 atmel,pins =
1207 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX0 */
1208 AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX1 */
1209 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX0 */
1210 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX1 */
1211 AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXDV */
1212 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXER */
1213 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXEN */
1214 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXCK */
1215 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDC */
1216 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDIO */
1217 >;
1218 };
1219 };
1220
1221 mmc0 {
1222 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
1223 atmel,pins =
1224 <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* MCI0_CK, conflict with PCK1(ISI_MCK) */
1225 AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDA, conflict with NAND_D0 */
1226 AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA0, conflict with NAND_D1 */
1227 >;
1228 };
1229 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
1230 atmel,pins =
1231 <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA1, conflict with NAND_D2 */
1232 AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA2, conflict with NAND_D3 */
1233 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA3, conflict with NAND_D4 */
1234 >;
1235 };
1236 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
1237 atmel,pins =
1238 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA4, conflict with NAND_D5 */
1239 AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA5, conflict with NAND_D6 */
1240 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA6, conflict with NAND_D7 */
1241 AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA7, conflict with NAND_OE */
1242 >;
1243 };
1244 };
1245
1246 mmc1 {
1247 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
1248 atmel,pins =
1249 <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* MCI1_CK */
1250 AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_CDA */
1251 AT91_PIOE 20 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA0 */
1252 >;
1253 };
1254 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
1255 atmel,pins =
1256 <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA1 */
1257 AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA2 */
1258 AT91_PIOE 23 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA3 */
1259 >;
1260 };
1261 };
1262
1263 nand0 {
1264 pinctrl_nand: nand-0 {
1265 atmel,pins =
1266 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A Read Enable */
1267 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A Write Enable */
1268
1269 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC17 ALE */
1270 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC18 CLE */
1271
1272 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC15 NCS3/Chip Enable */
1273 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC16 NANDRDY */
1274 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 Data bit 0 */
1275 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 Data bit 1 */
1276 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 Data bit 2 */
1277 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 Data bit 3 */
1278 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 Data bit 4 */
1279 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 Data bit 5 */
1280 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A Data bit 6 */
1281 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC12 periph A Data bit 7 */
1282 };
1283 };
1284
1285 spi0 {
1286 pinctrl_spi0: spi0-0 {
1287 atmel,pins =
1288 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MISO */
1289 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MOSI */
1290 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_SPCK */
1291 >;
1292 };
1293 };
1294
1295 ssc0 {
1296 pinctrl_ssc0_tx: ssc0_tx {
1297 atmel,pins =
1298 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK0 */
1299 AT91_PIOB 31 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF0 */
1300 AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD0 */
1301 };
1302
1303 pinctrl_ssc0_rx: ssc0_rx {
1304 atmel,pins =
1305 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK0 */
1306 AT91_PIOB 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF0 */
1307 AT91_PIOB 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD0 */
1308 };
1309 };
1310
1311 ssc1 {
1312 pinctrl_ssc1_tx: ssc1_tx {
1313 atmel,pins =
1314 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK1 */
1315 AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF1 */
1316 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD1 */
1317 };
1318
1319 pinctrl_ssc1_rx: ssc1_rx {
1320 atmel,pins =
1321 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK1 */
1322 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF1 */
1323 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD1 */
1324 };
1325 };
1326
1327 spi1 {
1328 pinctrl_spi1: spi1-0 {
1329 atmel,pins =
1330 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MISO */
1331 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MOSI */
1332 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_SPCK */
1333 >;
1334 };
1335 };
1336
1337 spi2 {
1338 pinctrl_spi2: spi2-0 {
1339 atmel,pins =
1340 <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MISO conflicts with RTS0 */
1341 AT91_PIOD 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MOSI conflicts with TXD0 */
1342 AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_SPCK conflicts with RTS1 */
1343 >;
1344 };
1345 };
1346
1347 uart0 {
1348 pinctrl_uart0: uart0-0 {
1349 atmel,pins =
1350 <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1351 AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1352 >;
1353 };
1354 };
1355
1356 uart1 {
1357 pinctrl_uart1: uart1-0 {
1358 atmel,pins =
1359 <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* RXD */
1360 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE /* TXD */
1361 >;
1362 };
1363 };
1364
1365 usart0 {
1366 pinctrl_usart0: usart0-0 {
1367 atmel,pins =
1368 <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
1369 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
1370 >;
1371 };
1372 pinctrl_usart0_rts: usart0_rts-0 {
1373 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1374 };
1375 pinctrl_usart0_cts: usart0_cts-0 {
1376 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1377 };
1378 };
1379
1380 usart1 {
1381 pinctrl_usart1: usart1-0 {
1382 atmel,pins =
1383 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
1384 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
1385 >;
1386 };
1387 pinctrl_usart1_rts: usart1_rts-0 {
1388 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1389 };
1390 pinctrl_usart1_cts: usart1_cts-0 {
1391 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1392 };
1393 };
1394
1395 usart2 {
1396 pinctrl_usart2: usart2-0 {
1397 atmel,pins =
1398 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1399 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD - conflicts with G0_COL, PCK2 */
1400 >;
1401 };
1402 pinctrl_usart2_rts: usart2_rts-0 {
1403 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_RX3, PWMH1 */
1404 };
1405 pinctrl_usart2_cts: usart2_cts-0 {
1406 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_TXER, ISI_VSYNC */
1407 };
1408 };
1409
1410 usart3 {
1411 pinctrl_usart3: usart3-0 {
1412 atmel,pins =
1413 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1414 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1415 >;
1416 };
1417 };
1418
1419 usart4 {
1420 pinctrl_usart4: usart4-0 {
1421 atmel,pins =
1422 <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1423 AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1424 >;
1425 };
1426 pinctrl_usart4_rts: usart4_rts-0 {
1427 atmel,pins = <AT91_PIOE 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with NWAIT, A19 */
1428 };
1429 pinctrl_usart4_cts: usart4_cts-0 {
1430 atmel,pins = <AT91_PIOE 0 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with A0/NBS0, MCI0_CDB */
1431 };
1432 };
1433 };
1434
1435 aic: interrupt-controller@fc06e000 {
1436 #interrupt-cells = <3>;
1437 compatible = "atmel,sama5d4-aic";
1438 interrupt-controller;
1439 reg = <0xfc06e000 0x200>;
1440 atmel,external-irqs = <56>;
1441 };
1442 };
1443 };
1444 };
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