0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * sam9x60.dtsi - Device Tree Include file for Microchip SAM9X60 SoC
0004 *
0005 * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
0006 *
0007 * Author: Sandeep Sheriker M <sandeepsheriker.mallikarjun@microchip.com>
0008 */
0009
0010 #include <dt-bindings/dma/at91.h>
0011 #include <dt-bindings/pinctrl/at91.h>
0012 #include <dt-bindings/interrupt-controller/irq.h>
0013 #include <dt-bindings/gpio/gpio.h>
0014 #include <dt-bindings/clock/at91.h>
0015 #include <dt-bindings/mfd/atmel-flexcom.h>
0016
0017 / {
0018 #address-cells = <1>;
0019 #size-cells = <1>;
0020 model = "Microchip SAM9X60 SoC";
0021 compatible = "microchip,sam9x60";
0022 interrupt-parent = <&aic>;
0023
0024 aliases {
0025 serial0 = &dbgu;
0026 gpio0 = &pioA;
0027 gpio1 = &pioB;
0028 gpio2 = &pioC;
0029 gpio3 = &pioD;
0030 tcb0 = &tcb0;
0031 tcb1 = &tcb1;
0032 };
0033
0034 cpus {
0035 #address-cells = <1>;
0036 #size-cells = <0>;
0037
0038 cpu@0 {
0039 compatible = "arm,arm926ej-s";
0040 device_type = "cpu";
0041 reg = <0>;
0042 };
0043 };
0044
0045 memory@20000000 {
0046 device_type = "memory";
0047 reg = <0x20000000 0x10000000>;
0048 };
0049
0050 clocks {
0051 slow_xtal: slow_xtal {
0052 compatible = "fixed-clock";
0053 #clock-cells = <0>;
0054 };
0055
0056 main_xtal: main_xtal {
0057 compatible = "fixed-clock";
0058 #clock-cells = <0>;
0059 };
0060 };
0061
0062 sram: sram@300000 {
0063 compatible = "mmio-sram";
0064 reg = <0x00300000 0x100000>;
0065 #address-cells = <1>;
0066 #size-cells = <1>;
0067 ranges = <0 0x00300000 0x100000>;
0068 };
0069
0070 ahb {
0071 compatible = "simple-bus";
0072 #address-cells = <1>;
0073 #size-cells = <1>;
0074 ranges;
0075
0076 usb0: gadget@500000 {
0077 #address-cells = <1>;
0078 #size-cells = <0>;
0079 compatible = "microchip,sam9x60-udc";
0080 reg = <0x00500000 0x100000
0081 0xf803c000 0x400>;
0082 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
0083 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
0084 clock-names = "pclk", "hclk";
0085 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
0086 assigned-clock-rates = <480000000>;
0087 status = "disabled";
0088 };
0089
0090 usb1: ohci@600000 {
0091 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
0092 reg = <0x00600000 0x100000>;
0093 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
0094 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
0095 clock-names = "ohci_clk", "hclk", "uhpck";
0096 status = "disabled";
0097 };
0098
0099 usb2: ehci@700000 {
0100 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
0101 reg = <0x00700000 0x100000>;
0102 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
0103 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
0104 clock-names = "usb_clk", "ehci_clk";
0105 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
0106 assigned-clock-rates = <480000000>;
0107 status = "disabled";
0108 };
0109
0110 ebi: ebi@10000000 {
0111 compatible = "microchip,sam9x60-ebi";
0112 #address-cells = <2>;
0113 #size-cells = <1>;
0114 atmel,smc = <&smc>;
0115 microchip,sfr = <&sfr>;
0116 reg = <0x10000000 0x60000000>;
0117 ranges = <0x0 0x0 0x10000000 0x10000000
0118 0x1 0x0 0x20000000 0x10000000
0119 0x2 0x0 0x30000000 0x10000000
0120 0x3 0x0 0x40000000 0x10000000
0121 0x4 0x0 0x50000000 0x10000000
0122 0x5 0x0 0x60000000 0x10000000>;
0123 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
0124 status = "disabled";
0125
0126 nand_controller: nand-controller {
0127 compatible = "microchip,sam9x60-nand-controller";
0128 ecc-engine = <&pmecc>;
0129 #address-cells = <2>;
0130 #size-cells = <1>;
0131 ranges;
0132 status = "disabled";
0133 };
0134 };
0135
0136 sdmmc0: sdio-host@80000000 {
0137 compatible = "microchip,sam9x60-sdhci";
0138 reg = <0x80000000 0x300>;
0139 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
0140 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>, <&pmc PMC_TYPE_GCK 12>;
0141 clock-names = "hclock", "multclk";
0142 assigned-clocks = <&pmc PMC_TYPE_GCK 12>;
0143 assigned-clock-rates = <100000000>;
0144 status = "disabled";
0145 };
0146
0147 sdmmc1: sdio-host@90000000 {
0148 compatible = "microchip,sam9x60-sdhci";
0149 reg = <0x90000000 0x300>;
0150 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
0151 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_GCK 26>;
0152 clock-names = "hclock", "multclk";
0153 assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
0154 assigned-clock-rates = <100000000>;
0155 status = "disabled";
0156 };
0157
0158 apb {
0159 compatible = "simple-bus";
0160 #address-cells = <1>;
0161 #size-cells = <1>;
0162 ranges;
0163
0164 flx4: flexcom@f0000000 {
0165 compatible = "atmel,sama5d2-flexcom";
0166 reg = <0xf0000000 0x200>;
0167 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
0168 #address-cells = <1>;
0169 #size-cells = <1>;
0170 ranges = <0x0 0xf0000000 0x800>;
0171 status = "disabled";
0172 };
0173
0174 flx5: flexcom@f0004000 {
0175 compatible = "atmel,sama5d2-flexcom";
0176 reg = <0xf0004000 0x200>;
0177 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
0178 #address-cells = <1>;
0179 #size-cells = <1>;
0180 ranges = <0x0 0xf0004000 0x800>;
0181 status = "disabled";
0182 };
0183
0184 dma0: dma-controller@f0008000 {
0185 compatible = "microchip,sam9x60-dma", "atmel,sama5d4-dma";
0186 reg = <0xf0008000 0x1000>;
0187 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
0188 #dma-cells = <1>;
0189 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
0190 clock-names = "dma_clk";
0191 };
0192
0193 ssc: ssc@f0010000 {
0194 compatible = "atmel,at91sam9g45-ssc";
0195 reg = <0xf0010000 0x4000>;
0196 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
0197 dmas = <&dma0
0198 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
0199 AT91_XDMAC_DT_PERID(38))>,
0200 <&dma0
0201 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
0202 AT91_XDMAC_DT_PERID(39))>;
0203 dma-names = "tx", "rx";
0204 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
0205 clock-names = "pclk";
0206 status = "disabled";
0207 };
0208
0209 qspi: spi@f0014000 {
0210 compatible = "microchip,sam9x60-qspi";
0211 reg = <0xf0014000 0x100>, <0x70000000 0x10000000>;
0212 reg-names = "qspi_base", "qspi_mmap";
0213 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 7>;
0214 dmas = <&dma0
0215 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
0216 AT91_XDMAC_DT_PERID(26))>,
0217 <&dma0
0218 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
0219 AT91_XDMAC_DT_PERID(27))>;
0220 dma-names = "tx", "rx";
0221 clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&pmc PMC_TYPE_SYSTEM 19>;
0222 clock-names = "pclk", "qspick";
0223 atmel,pmc = <&pmc>;
0224 #address-cells = <1>;
0225 #size-cells = <0>;
0226 status = "disabled";
0227 };
0228
0229 i2s: i2s@f001c000 {
0230 compatible = "microchip,sam9x60-i2smcc";
0231 reg = <0xf001c000 0x100>;
0232 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
0233 dmas = <&dma0
0234 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
0235 AT91_XDMAC_DT_PERID(36))>,
0236 <&dma0
0237 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
0238 AT91_XDMAC_DT_PERID(37))>;
0239 dma-names = "tx", "rx";
0240 clocks = <&pmc PMC_TYPE_PERIPHERAL 34>, <&pmc PMC_TYPE_GCK 34>;
0241 clock-names = "pclk", "gclk";
0242 status = "disabled";
0243 };
0244
0245 flx11: flexcom@f0020000 {
0246 compatible = "atmel,sama5d2-flexcom";
0247 reg = <0xf0020000 0x200>;
0248 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
0249 #address-cells = <1>;
0250 #size-cells = <1>;
0251 ranges = <0x0 0xf0020000 0x800>;
0252 status = "disabled";
0253 };
0254
0255 flx12: flexcom@f0024000 {
0256 compatible = "atmel,sama5d2-flexcom";
0257 reg = <0xf0024000 0x200>;
0258 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
0259 #address-cells = <1>;
0260 #size-cells = <1>;
0261 ranges = <0x0 0xf0024000 0x800>;
0262 status = "disabled";
0263 };
0264
0265 pit64b: timer@f0028000 {
0266 compatible = "microchip,sam9x60-pit64b";
0267 reg = <0xf0028000 0x100>;
0268 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 7>;
0269 clocks = <&pmc PMC_TYPE_PERIPHERAL 37>, <&pmc PMC_TYPE_GCK 37>;
0270 clock-names = "pclk", "gclk";
0271 };
0272
0273 sha: crypto@f002c000 {
0274 compatible = "atmel,at91sam9g46-sha";
0275 reg = <0xf002c000 0x100>;
0276 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
0277 dmas = <&dma0
0278 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
0279 AT91_XDMAC_DT_PERID(34))>;
0280 dma-names = "tx";
0281 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
0282 clock-names = "sha_clk";
0283 };
0284
0285 trng: trng@f0030000 {
0286 compatible = "microchip,sam9x60-trng";
0287 reg = <0xf0030000 0x100>;
0288 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 0>;
0289 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
0290 };
0291
0292 aes: crypto@f0034000 {
0293 compatible = "atmel,at91sam9g46-aes";
0294 reg = <0xf0034000 0x100>;
0295 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 0>;
0296 dmas = <&dma0
0297 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
0298 AT91_XDMAC_DT_PERID(32))>,
0299 <&dma0
0300 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
0301 AT91_XDMAC_DT_PERID(33))>;
0302 dma-names = "tx", "rx";
0303 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
0304 clock-names = "aes_clk";
0305 };
0306
0307 tdes: crypto@f0038000 {
0308 compatible = "atmel,at91sam9g46-tdes";
0309 reg = <0xf0038000 0x100>;
0310 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
0311 dmas = <&dma0
0312 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
0313 AT91_XDMAC_DT_PERID(31))>,
0314 <&dma0
0315 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
0316 AT91_XDMAC_DT_PERID(30))>;
0317 dma-names = "tx", "rx";
0318 clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
0319 clock-names = "tdes_clk";
0320 };
0321
0322 classd: classd@f003c000 {
0323 compatible = "atmel,sama5d2-classd";
0324 reg = <0xf003c000 0x100>;
0325 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 7>;
0326 dmas = <&dma0
0327 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
0328 AT91_XDMAC_DT_PERID(35))>;
0329 dma-names = "tx";
0330 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&pmc PMC_TYPE_GCK 42>;
0331 clock-names = "pclk", "gclk";
0332 status = "disabled";
0333 };
0334
0335 can0: can@f8000000 {
0336 compatible = "microchip,sam9x60-can", "atmel,at91sam9x5-can";
0337 reg = <0xf8000000 0x300>;
0338 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>;
0339 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
0340 clock-names = "can_clk";
0341 status = "disabled";
0342 };
0343
0344 can1: can@f8004000 {
0345 compatible = "microchip,sam9x60-can", "atmel,at91sam9x5-can";
0346 reg = <0xf8004000 0x300>;
0347 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
0348 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
0349 clock-names = "can_clk";
0350 status = "disabled";
0351 };
0352
0353 tcb0: timer@f8008000 {
0354 compatible = "microchip,sam9x60-tcb", "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
0355 #address-cells = <1>;
0356 #size-cells = <0>;
0357 reg = <0xf8008000 0x100>;
0358 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
0359 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k 0>;
0360 clock-names = "t0_clk", "slow_clk";
0361 };
0362
0363 tcb1: timer@f800c000 {
0364 compatible = "microchip,sam9x60-tcb", "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
0365 #address-cells = <1>;
0366 #size-cells = <0>;
0367 reg = <0xf800c000 0x100>;
0368 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
0369 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>, <&clk32k 0>;
0370 clock-names = "t0_clk", "slow_clk";
0371 };
0372
0373 flx6: flexcom@f8010000 {
0374 compatible = "atmel,sama5d2-flexcom";
0375 reg = <0xf8010000 0x200>;
0376 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
0377 #address-cells = <1>;
0378 #size-cells = <1>;
0379 ranges = <0x0 0xf8010000 0x800>;
0380 status = "disabled";
0381 };
0382
0383 flx7: flexcom@f8014000 {
0384 compatible = "atmel,sama5d2-flexcom";
0385 reg = <0xf8014000 0x200>;
0386 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
0387 #address-cells = <1>;
0388 #size-cells = <1>;
0389 ranges = <0x0 0xf8014000 0x800>;
0390 status = "disabled";
0391 };
0392
0393 flx8: flexcom@f8018000 {
0394 compatible = "atmel,sama5d2-flexcom";
0395 reg = <0xf8018000 0x200>;
0396 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
0397 #address-cells = <1>;
0398 #size-cells = <1>;
0399 ranges = <0x0 0xf8018000 0x800>;
0400 status = "disabled";
0401 };
0402
0403 flx0: flexcom@f801c000 {
0404 compatible = "atmel,sama5d2-flexcom";
0405 reg = <0xf801c000 0x200>;
0406 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
0407 #address-cells = <1>;
0408 #size-cells = <1>;
0409 ranges = <0x0 0xf801c000 0x800>;
0410 status = "disabled";
0411 };
0412
0413 flx1: flexcom@f8020000 {
0414 compatible = "atmel,sama5d2-flexcom";
0415 reg = <0xf8020000 0x200>;
0416 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
0417 #address-cells = <1>;
0418 #size-cells = <1>;
0419 ranges = <0x0 0xf8020000 0x800>;
0420 status = "disabled";
0421 };
0422
0423 flx2: flexcom@f8024000 {
0424 compatible = "atmel,sama5d2-flexcom";
0425 reg = <0xf8024000 0x200>;
0426 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
0427 #address-cells = <1>;
0428 #size-cells = <1>;
0429 ranges = <0x0 0xf8024000 0x800>;
0430 status = "disabled";
0431 };
0432
0433 flx3: flexcom@f8028000 {
0434 compatible = "atmel,sama5d2-flexcom";
0435 reg = <0xf8028000 0x200>;
0436 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
0437 #address-cells = <1>;
0438 #size-cells = <1>;
0439 ranges = <0x0 0xf8028000 0x800>;
0440 status = "disabled";
0441 };
0442
0443 macb0: ethernet@f802c000 {
0444 compatible = "cdns,sam9x60-macb", "cdns,macb";
0445 reg = <0xf802c000 0x1000>;
0446 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
0447 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_PERIPHERAL 24>;
0448 clock-names = "hclk", "pclk";
0449 status = "disabled";
0450 };
0451
0452 macb1: ethernet@f8030000 {
0453 compatible = "cdns,sam9x60-macb", "cdns,macb";
0454 reg = <0xf8030000 0x1000>;
0455 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
0456 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 27>;
0457 clock-names = "hclk", "pclk";
0458 status = "disabled";
0459 };
0460
0461 pwm0: pwm@f8034000 {
0462 compatible = "microchip,sam9x60-pwm";
0463 reg = <0xf8034000 0x300>;
0464 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
0465 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
0466 #pwm-cells = <3>;
0467 status = "disabled";
0468 };
0469
0470 hlcdc: hlcdc@f8038000 {
0471 compatible = "microchip,sam9x60-hlcdc";
0472 reg = <0xf8038000 0x4000>;
0473 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
0474 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_GCK 25>, <&clk32k 1>;
0475 clock-names = "periph_clk","sys_clk", "slow_clk";
0476 assigned-clocks = <&pmc PMC_TYPE_GCK 25>;
0477 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_MCK>;
0478 status = "disabled";
0479
0480 hlcdc-display-controller {
0481 compatible = "atmel,hlcdc-display-controller";
0482 #address-cells = <1>;
0483 #size-cells = <0>;
0484
0485 port@0 {
0486 #address-cells = <1>;
0487 #size-cells = <0>;
0488 reg = <0>;
0489 };
0490 };
0491
0492 hlcdc_pwm: hlcdc-pwm {
0493 compatible = "atmel,hlcdc-pwm";
0494 #pwm-cells = <3>;
0495 };
0496 };
0497
0498 flx9: flexcom@f8040000 {
0499 compatible = "atmel,sama5d2-flexcom";
0500 reg = <0xf8040000 0x200>;
0501 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
0502 #address-cells = <1>;
0503 #size-cells = <1>;
0504 ranges = <0x0 0xf8040000 0x800>;
0505 status = "disabled";
0506 };
0507
0508 flx10: flexcom@f8044000 {
0509 compatible = "atmel,sama5d2-flexcom";
0510 reg = <0xf8044000 0x200>;
0511 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
0512 #address-cells = <1>;
0513 #size-cells = <1>;
0514 ranges = <0x0 0xf8044000 0x800>;
0515 status = "disabled";
0516 };
0517
0518 isi: isi@f8048000 {
0519 compatible = "microchip,sam9x60-isi", "atmel,at91sam9g45-isi";
0520 reg = <0xf8048000 0x100>;
0521 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 5>;
0522 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
0523 clock-names = "isi_clk";
0524 status = "disabled";
0525 port {
0526 #address-cells = <1>;
0527 #size-cells = <0>;
0528 };
0529 };
0530
0531 adc: adc@f804c000 {
0532 compatible = "microchip,sam9x60-adc", "atmel,sama5d2-adc";
0533 reg = <0xf804c000 0x100>;
0534 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
0535 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
0536 clock-names = "adc_clk";
0537 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(40))>;
0538 dma-names = "rx";
0539 atmel,min-sample-rate-hz = <200000>;
0540 atmel,max-sample-rate-hz = <20000000>;
0541 atmel,startup-time-ms = <4>;
0542 atmel,trigger-edge-type = <IRQ_TYPE_EDGE_RISING>;
0543 #io-channel-cells = <1>;
0544 status = "disabled";
0545 };
0546
0547 sfr: sfr@f8050000 {
0548 compatible = "microchip,sam9x60-sfr", "syscon";
0549 reg = <0xf8050000 0x100>;
0550 };
0551
0552 matrix: matrix@ffffde00 {
0553 compatible = "microchip,sam9x60-matrix", "atmel,at91sam9x5-matrix", "syscon";
0554 reg = <0xffffde00 0x200>;
0555 };
0556
0557 pmecc: ecc-engine@ffffe000 {
0558 compatible = "microchip,sam9x60-pmecc", "atmel,at91sam9g45-pmecc";
0559 reg = <0xffffe000 0x300>,
0560 <0xffffe600 0x100>;
0561 };
0562
0563 mpddrc: mpddrc@ffffe800 {
0564 compatible = "microchip,sam9x60-ddramc", "atmel,sama5d3-ddramc";
0565 reg = <0xffffe800 0x200>;
0566 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_CORE PMC_MCK>;
0567 clock-names = "ddrck", "mpddr";
0568 };
0569
0570 smc: smc@ffffea00 {
0571 compatible = "microchip,sam9x60-smc", "atmel,at91sam9260-smc", "syscon";
0572 reg = <0xffffea00 0x100>;
0573 };
0574
0575 aic: interrupt-controller@fffff100 {
0576 compatible = "microchip,sam9x60-aic";
0577 #interrupt-cells = <3>;
0578 interrupt-controller;
0579 reg = <0xfffff100 0x100>;
0580 atmel,external-irqs = <31>;
0581 };
0582
0583 dbgu: serial@fffff200 {
0584 compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
0585 reg = <0xfffff200 0x200>;
0586 interrupts = <47 IRQ_TYPE_LEVEL_HIGH 7>;
0587 dmas = <&dma0
0588 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
0589 AT91_XDMAC_DT_PERID(28))>,
0590 <&dma0
0591 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
0592 AT91_XDMAC_DT_PERID(29))>;
0593 dma-names = "tx", "rx";
0594 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
0595 clock-names = "usart";
0596 status = "disabled";
0597 };
0598
0599 pinctrl: pinctrl@fffff400 {
0600 #address-cells = <1>;
0601 #size-cells = <1>;
0602 compatible = "microchip,sam9x60-pinctrl", "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
0603 ranges = <0xfffff400 0xfffff400 0x800>;
0604
0605 /* mux-mask corresponding to sam9x60 SoC in TFBGA228L package */
0606 atmel,mux-mask = <
0607 /* A B C */
0608 0xffffffff 0xffe03fff 0xef00019d /* pioA */
0609 0x03ffffff 0x02fc7e7f 0x00780000 /* pioB */
0610 0xffffffff 0xffffffff 0xf83fffff /* pioC */
0611 0x003fffff 0x003f8000 0x00000000 /* pioD */
0612 >;
0613
0614 pioA: gpio@fffff400 {
0615 compatible = "microchip,sam9x60-gpio", "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
0616 reg = <0xfffff400 0x200>;
0617 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
0618 #gpio-cells = <2>;
0619 gpio-controller;
0620 interrupt-controller;
0621 #interrupt-cells = <2>;
0622 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
0623 };
0624
0625 pioB: gpio@fffff600 {
0626 compatible = "microchip,sam9x60-gpio", "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
0627 reg = <0xfffff600 0x200>;
0628 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
0629 #gpio-cells = <2>;
0630 gpio-controller;
0631 #gpio-lines = <26>;
0632 interrupt-controller;
0633 #interrupt-cells = <2>;
0634 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
0635 };
0636
0637 pioC: gpio@fffff800 {
0638 compatible = "microchip,sam9x60-gpio", "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
0639 reg = <0xfffff800 0x200>;
0640 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
0641 #gpio-cells = <2>;
0642 gpio-controller;
0643 interrupt-controller;
0644 #interrupt-cells = <2>;
0645 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
0646 };
0647
0648 pioD: gpio@fffffa00 {
0649 compatible = "microchip,sam9x60-gpio", "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
0650 reg = <0xfffffa00 0x200>;
0651 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 1>;
0652 #gpio-cells = <2>;
0653 gpio-controller;
0654 #gpio-lines = <22>;
0655 interrupt-controller;
0656 #interrupt-cells = <2>;
0657 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>;
0658 };
0659 };
0660
0661 pmc: pmc@fffffc00 {
0662 compatible = "microchip,sam9x60-pmc", "syscon";
0663 reg = <0xfffffc00 0x200>;
0664 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
0665 #clock-cells = <2>;
0666 clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>;
0667 clock-names = "td_slck", "md_slck", "main_xtal";
0668 };
0669
0670 reset_controller: reset-controller@fffffe00 {
0671 compatible = "microchip,sam9x60-rstc";
0672 reg = <0xfffffe00 0x10>;
0673 clocks = <&clk32k 0>;
0674 };
0675
0676 shutdown_controller: shdwc@fffffe10 {
0677 compatible = "microchip,sam9x60-shdwc";
0678 reg = <0xfffffe10 0x10>;
0679 clocks = <&clk32k 0>;
0680 #address-cells = <1>;
0681 #size-cells = <0>;
0682 atmel,wakeup-rtc-timer;
0683 atmel,wakeup-rtt-timer;
0684 status = "disabled";
0685 };
0686
0687 rtt: rtc@fffffe20 {
0688 compatible = "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
0689 reg = <0xfffffe20 0x20>;
0690 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
0691 clocks = <&clk32k 0>;
0692 };
0693
0694 pit: timer@fffffe40 {
0695 compatible = "atmel,at91sam9260-pit";
0696 reg = <0xfffffe40 0x10>;
0697 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
0698 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
0699 };
0700
0701 clk32k: sckc@fffffe50 {
0702 compatible = "microchip,sam9x60-sckc";
0703 reg = <0xfffffe50 0x4>;
0704 clocks = <&slow_xtal>;
0705 #clock-cells = <1>;
0706 };
0707
0708 gpbr: syscon@fffffe60 {
0709 compatible = "microchip,sam9x60-gpbr", "atmel,at91sam9260-gpbr", "syscon";
0710 reg = <0xfffffe60 0x10>;
0711 };
0712
0713 rtc: rtc@fffffea8 {
0714 compatible = "microchip,sam9x60-rtc", "atmel,at91sam9x5-rtc";
0715 reg = <0xfffffea8 0x100>;
0716 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
0717 clocks = <&clk32k 0>;
0718 };
0719
0720 watchdog: watchdog@ffffff80 {
0721 compatible = "microchip,sam9x60-wdt";
0722 reg = <0xffffff80 0x24>;
0723 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
0724 clocks = <&clk32k 0>;
0725 status = "disabled";
0726 };
0727 };
0728 };
0729 };
