boot/dts/s3c6410-smdk6410.dts

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Samsung S3C6410 based SMDK6410 board device tree source.
0004  *
0005  * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
0006  *
0007  * Device tree source file for Samsung SMDK6410 board which is based on
0008  * Samsung's S3C6410 SoC.
0009  */
0010
0011 /dts-v1/;
0012
0013 #include <dt-bindings/gpio/gpio.h>
0014 #include <dt-bindings/interrupt-controller/irq.h>
0015
0016 #include "s3c6410.dtsi"
0017
0018 / {
0019         model = "Samsung SMDK6410 board based on S3C6410";
0020         compatible = "samsung,smdk6410", "samsung,s3c6410";
0021
0022         memory@50000000 {
0023                 device_type = "memory";
0024                 reg = <0x50000000 0x8000000>;
0025         };
0026
0027         chosen {
0028                 bootargs = "console=ttySAC0,115200n8 earlyprintk rootwait root=/dev/mmcblk0p1";
0029         };
0030
0031         fin_pll: oscillator-0 {
0032                 compatible = "fixed-clock";
0033                 clock-frequency = <12000000>;
0034                 clock-output-names = "fin_pll";
0035                 #clock-cells = <0>;
0036         };
0037
0038         xusbxti: oscillator-1 {
0039                 compatible = "fixed-clock";
0040                 clock-output-names = "xusbxti";
0041                 clock-frequency = <48000000>;
0042                 #clock-cells = <0>;
0043         };
0044
0045         srom-cs1-bus@18000000 {
0046                 compatible = "simple-bus";
0047                 #address-cells = <1>;
0048                 #size-cells = <1>;
0049                 reg = <0x18000000 0x8000000>;
0050                 ranges;
0051
0052                 ethernet@18000000 {
0053                         compatible = "smsc,lan9115";
0054                         reg = <0x18000000 0x10000>;
0055                         interrupt-parent = <&gpn>;
0056                         interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
0057                         phy-mode = "mii";
0058                         reg-io-width = <4>;
0059                         smsc,force-internal-phy;
0060                 };
0061         };
0062 };
0063
0064 &clocks {
0065         clocks = <&fin_pll>;
0066 };
0067
0068 &sdhci0 {
0069         pinctrl-names = "default";
0070         pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
0071         bus-width = <4>;
0072         status = "okay";
0073 };
0074
0075 &uart0 {
0076         pinctrl-names = "default";
0077         pinctrl-0 = <&uart0_data>, <&uart0_fctl>;
0078         status = "okay";
0079 };
0080
0081 &uart1 {
0082         pinctrl-names = "default";
0083         pinctrl-0 = <&uart1_data>;
0084         status = "okay";
0085 };
0086
0087 &uart2 {
0088         pinctrl-names = "default";
0089         pinctrl-0 = <&uart2_data>;
0090         status = "okay";
0091 };
0092
0093 &uart3 {
0094         pinctrl-names = "default";
0095         pinctrl-0 = <&uart3_data>;
0096         status = "okay";
0097 };