0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Google Veyron Tiger Rev 0+ board device tree source
0004 *
0005 * Copyright 2016 Google, Inc
0006 */
0007
0008 /dts-v1/;
0009 #include "rk3288-veyron-fievel.dts"
0010 #include "rk3288-veyron-edp.dtsi"
0011
0012 / {
0013 model = "Google Tiger";
0014 compatible = "google,veyron-tiger-rev8", "google,veyron-tiger-rev7",
0015 "google,veyron-tiger-rev6", "google,veyron-tiger-rev5",
0016 "google,veyron-tiger-rev4", "google,veyron-tiger-rev3",
0017 "google,veyron-tiger-rev2", "google,veyron-tiger-rev1",
0018 "google,veyron-tiger-rev0", "google,veyron-tiger",
0019 "google,veyron", "rockchip,rk3288";
0020
0021 /delete-node/ vcc18-lcd;
0022 };
0023
0024 &backlight {
0025 /* Tiger panel PWM must be >= 1%, so start non-zero brightness at 3 */
0026 brightness-levels = <3 255>;
0027 num-interpolated-steps = <252>;
0028 };
0029
0030 &backlight_regulator {
0031 vin-supply = <&vccsys>;
0032 };
0033
0034 &i2c3 {
0035 status = "okay";
0036
0037 clock-frequency = <400000>;
0038 i2c-scl-falling-time-ns = <50>;
0039 i2c-scl-rising-time-ns = <300>;
0040
0041 touchscreen@10 {
0042 compatible = "elan,ekth3500";
0043 reg = <0x10>;
0044 interrupt-parent = <&gpio2>;
0045 interrupts = <RK_PB6 IRQ_TYPE_EDGE_FALLING>;
0046 pinctrl-names = "default";
0047 pinctrl-0 = <&touch_int &touch_rst>;
0048 reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
0049 vcc33-supply = <&vcc33_io>;
0050 vccio-supply = <&vcc33_io>;
0051 wakeup-source;
0052 };
0053 };
0054
0055 &panel {
0056 compatible = "auo,b101ean01";
0057
0058 /delete-node/ panel-timing;
0059
0060 panel-timing {
0061 clock-frequency = <66666667>;
0062 hactive = <1280>;
0063 hfront-porch = <18>;
0064 hback-porch = <21>;
0065 hsync-len = <32>;
0066 vactive = <800>;
0067 vfront-porch = <4>;
0068 vback-porch = <8>;
0069 vsync-len = <18>;
0070 };
0071 };
0072
0073 &pinctrl {
0074 lcd {
0075 /delete-node/ avdd-1v8-disp-en;
0076 };
0077
0078 touchscreen {
0079 touch_int: touch-int {
0080 rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
0081 };
0082
0083 touch_rst: touch-rst {
0084 rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
0085 };
0086 };
0087 };
