0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Google Veyron Speedy Rev 1+ board device tree source
0004 *
0005 * Copyright 2015 Google, Inc
0006 */
0007
0008 /dts-v1/;
0009 #include "rk3288-veyron-chromebook.dtsi"
0010 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
0011 #include "cros-ec-sbs.dtsi"
0012
0013 / {
0014 model = "Google Speedy";
0015 compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
0016 "google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
0017 "google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
0018 "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
0019 "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
0020 };
0021
0022 &cpu_alert0 {
0023 temperature = <65000>;
0024 };
0025
0026 &cpu_alert1 {
0027 temperature = <70000>;
0028 };
0029
0030 &cpu_crit {
0031 temperature = <90000>;
0032 };
0033
0034 &edp {
0035 /delete-property/pinctrl-names;
0036 /delete-property/pinctrl-0;
0037
0038 force-hpd;
0039 };
0040
0041 &gpu_alert0 {
0042 temperature = <80000>;
0043 };
0044
0045 &gpu_crit {
0046 temperature = <90000>;
0047 };
0048
0049 &rk808 {
0050 pinctrl-names = "default";
0051 pinctrl-0 = <&pmic_int_l>;
0052 };
0053
0054 &sdmmc {
0055 disable-wp;
0056 pinctrl-names = "default";
0057 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
0058 &sdmmc_bus4>;
0059 };
0060
0061 &vcc_5v {
0062 enable-active-high;
0063 gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
0064 pinctrl-names = "default";
0065 pinctrl-0 = <&drv_5v>;
0066 };
0067
0068 &vcc50_hdmi {
0069 enable-active-high;
0070 gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
0071 pinctrl-names = "default";
0072 pinctrl-0 = <&vcc50_hdmi_en>;
0073 };
0074
0075 &gpio0 {
0076 gpio-line-names = "PMIC_SLEEP_AP",
0077 "DDRIO_PWROFF",
0078 "DDRIO_RETEN",
0079 "TS3A227E_INT_L",
0080 "PMIC_INT_L",
0081 "PWR_KEY_L",
0082 "AP_LID_INT_L",
0083 "EC_IN_RW",
0084
0085 "AC_PRESENT_AP",
0086 /*
0087 * RECOVERY_SW_L is Chrome OS ABI. Schematics call
0088 * it REC_MODE_L.
0089 */
0090 "RECOVERY_SW_L",
0091 "OTP_OUT",
0092 "HOST1_PWR_EN",
0093 "USBOTG_PWREN_H",
0094 "AP_WARM_RESET_H",
0095 "nFALUT2",
0096 "I2C0_SDA_PMIC",
0097
0098 "I2C0_SCL_PMIC",
0099 "SUSPEND_L",
0100 "USB_INT";
0101 };
0102
0103 &gpio2 {
0104 gpio-line-names = "CONFIG0",
0105 "CONFIG1",
0106 "CONFIG2",
0107 "",
0108 "",
0109 "",
0110 "",
0111 "CONFIG3",
0112
0113 "PWRLIMIT#_CPU",
0114 "EMMC_RST_L",
0115 "",
0116 "",
0117 "BL_PWR_EN",
0118 "AVDD_1V8_DISP_EN";
0119 };
0120
0121 &gpio3 {
0122 gpio-line-names = "FLASH0_D0",
0123 "FLASH0_D1",
0124 "FLASH0_D2",
0125 "FLASH0_D3",
0126 "FLASH0_D4",
0127 "FLASH0_D5",
0128 "FLASH0_D6",
0129 "FLASH0_D7",
0130
0131 "",
0132 "",
0133 "",
0134 "",
0135 "",
0136 "",
0137 "",
0138 "",
0139
0140 "FLASH0_CS2/EMMC_CMD",
0141 "",
0142 "FLASH0_DQS/EMMC_CLKO";
0143 };
0144
0145 &gpio4 {
0146 gpio-line-names = "",
0147 "",
0148 "",
0149 "",
0150 "",
0151 "",
0152 "",
0153 "",
0154
0155 "",
0156 "",
0157 "",
0158 "",
0159 "",
0160 "",
0161 "",
0162 "",
0163
0164 "UART0_RXD",
0165 "UART0_TXD",
0166 "UART0_CTS",
0167 "UART0_RTS",
0168 "SDIO0_D0",
0169 "SDIO0_D1",
0170 "SDIO0_D2",
0171 "SDIO0_D3",
0172
0173 "SDIO0_CMD",
0174 "SDIO0_CLK",
0175 "BT_DEV_WAKE",
0176 "",
0177 "WIFI_ENABLE_H",
0178 "BT_ENABLE_L",
0179 "WIFI_HOST_WAKE",
0180 "BT_HOST_WAKE";
0181 };
0182
0183 &gpio5 {
0184 gpio-line-names = "",
0185 "",
0186 "",
0187 "",
0188 "",
0189 "",
0190 "",
0191 "",
0192
0193 "",
0194 "",
0195 "",
0196 "",
0197 "SPI0_CLK",
0198 "SPI0_CS0",
0199 "SPI0_TXD",
0200 "SPI0_RXD",
0201
0202 "",
0203 "",
0204 "",
0205 "VCC50_HDMI_EN";
0206 };
0207
0208 &gpio6 {
0209 gpio-line-names = "I2S0_SCLK",
0210 "I2S0_LRCK_RX",
0211 "I2S0_LRCK_TX",
0212 "I2S0_SDI",
0213 "I2S0_SDO0",
0214 "HP_DET_H",
0215 "ALS_INT", /* not connected */
0216 "INT_CODEC",
0217
0218 "I2S0_CLK",
0219 "I2C2_SDA",
0220 "I2C2_SCL",
0221 "MICDET",
0222 "",
0223 "",
0224 "",
0225 "",
0226
0227 "SDMMC_D0",
0228 "SDMMC_D1",
0229 "SDMMC_D2",
0230 "SDMMC_D3",
0231 "SDMMC_CLK",
0232 "SDMMC_CMD";
0233 };
0234
0235 &gpio7 {
0236 gpio-line-names = "LCDC_BL",
0237 "PWM_LOG",
0238 "BL_EN",
0239 "TRACKPAD_INT",
0240 "TPM_INT_H",
0241 "SDMMC_DET_L",
0242 /*
0243 * AP_FLASH_WP_L is Chrome OS ABI. Schematics call
0244 * it FW_WP_AP.
0245 */
0246 "AP_FLASH_WP_L",
0247 "EC_INT",
0248
0249 "CPU_NMI",
0250 "DVS_OK",
0251 "",
0252 "EDP_HOTPLUG",
0253 "DVS1",
0254 "nFALUT1",
0255 "LCD_EN",
0256 "DVS2",
0257
0258 "VCC5V_GOOD_H",
0259 "I2C4_SDA_TP",
0260 "I2C4_SCL_TP",
0261 "I2C5_SDA_HDMI",
0262 "I2C5_SCL_HDMI",
0263 "5V_DRV",
0264 "UART2_RXD",
0265 "UART2_TXD";
0266 };
0267
0268 &gpio8 {
0269 gpio-line-names = "RAM_ID0",
0270 "RAM_ID1",
0271 "RAM_ID2",
0272 "RAM_ID3",
0273 "I2C1_SDA_TPM",
0274 "I2C1_SCL_TPM",
0275 "SPI2_CLK",
0276 "SPI2_CS0",
0277
0278 "SPI2_RXD",
0279 "SPI2_TXD";
0280 };
0281
0282 &pinctrl {
0283 pinctrl-names = "default", "sleep";
0284 pinctrl-0 = <
0285 /* Common for sleep and wake, but no owners */
0286 &ddr0_retention
0287 &ddrio_pwroff
0288 &global_pwroff
0289
0290 /* Wake only */
0291 &suspend_l_wake
0292 >;
0293 pinctrl-1 = <
0294 /* Common for sleep and wake, but no owners */
0295 &ddr0_retention
0296 &ddrio_pwroff
0297 &global_pwroff
0298
0299 /* Sleep only */
0300 &suspend_l_sleep
0301 >;
0302
0303 buck-5v {
0304 drv_5v: drv-5v {
0305 rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
0306 };
0307 };
0308
0309 hdmi {
0310 vcc50_hdmi_en: vcc50-hdmi-en {
0311 rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
0312 };
0313 };
0314
0315 pmic {
0316 dvs_1: dvs-1 {
0317 rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
0318 };
0319
0320 dvs_2: dvs-2 {
0321 rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
0322 };
0323 };
0324 };
