0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Google Veyron Minnie Rev 0+ board device tree source
0004 *
0005 * Copyright 2015 Google, Inc
0006 */
0007
0008 /dts-v1/;
0009 #include "rk3288-veyron-chromebook.dtsi"
0010 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
0011
0012 / {
0013 model = "Google Minnie";
0014 compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
0015 "google,veyron-minnie-rev2", "google,veyron-minnie-rev1",
0016 "google,veyron-minnie-rev0", "google,veyron-minnie",
0017 "google,veyron", "rockchip,rk3288";
0018
0019 volume_buttons: volume-buttons {
0020 compatible = "gpio-keys";
0021 pinctrl-names = "default";
0022 pinctrl-0 = <&volum_down_l &volum_up_l>;
0023
0024 key-volum-down {
0025 label = "Volum_down";
0026 gpios = <&gpio5 RK_PB3 GPIO_ACTIVE_LOW>;
0027 linux,code = <KEY_VOLUMEDOWN>;
0028 debounce-interval = <100>;
0029 };
0030
0031 key-volum-up {
0032 label = "Volum_up";
0033 gpios = <&gpio5 RK_PB2 GPIO_ACTIVE_LOW>;
0034 linux,code = <KEY_VOLUMEUP>;
0035 debounce-interval = <100>;
0036 };
0037 };
0038 };
0039
0040 &backlight {
0041 /* Minnie panel PWM must be >= 1%, so start non-zero brightness at 3 */
0042 brightness-levels = <3 255>;
0043 num-interpolated-steps = <252>;
0044 };
0045
0046 &i2c_tunnel {
0047 battery: bq27500@55 {
0048 compatible = "ti,bq27500";
0049 reg = <0x55>;
0050 };
0051 };
0052
0053 &i2c3 {
0054 status = "okay";
0055
0056 clock-frequency = <400000>;
0057 i2c-scl-falling-time-ns = <50>;
0058 i2c-scl-rising-time-ns = <300>;
0059
0060 touchscreen@10 {
0061 compatible = "elan,ekth3500";
0062 reg = <0x10>;
0063 interrupt-parent = <&gpio2>;
0064 interrupts = <RK_PB6 IRQ_TYPE_EDGE_FALLING>;
0065 pinctrl-names = "default";
0066 pinctrl-0 = <&touch_int &touch_rst>;
0067 reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
0068 vcc33-supply = <&vcc33_touch>;
0069 vccio-supply = <&vcc33_touch>;
0070 };
0071 };
0072
0073 &panel {
0074 compatible = "auo,b101ean01";
0075
0076 /delete-node/ panel-timing;
0077
0078 panel-timing {
0079 clock-frequency = <66666667>;
0080 hactive = <1280>;
0081 hfront-porch = <18>;
0082 hback-porch = <21>;
0083 hsync-len = <32>;
0084 vactive = <800>;
0085 vfront-porch = <4>;
0086 vback-porch = <8>;
0087 vsync-len = <18>;
0088 };
0089 };
0090
0091 &rk808 {
0092 pinctrl-names = "default";
0093 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
0094
0095 regulators {
0096 vcc33_touch: LDO_REG2 {
0097 regulator-min-microvolt = <3300000>;
0098 regulator-max-microvolt = <3300000>;
0099 regulator-name = "vcc33_touch";
0100 regulator-state-mem {
0101 regulator-off-in-suspend;
0102 };
0103 };
0104
0105 vcc5v_touch: SWITCH_REG2 {
0106 regulator-name = "vcc5v_touch";
0107 regulator-state-mem {
0108 regulator-off-in-suspend;
0109 };
0110 };
0111 };
0112 };
0113
0114 &sdmmc {
0115 disable-wp;
0116 pinctrl-names = "default";
0117 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
0118 &sdmmc_bus4>;
0119 };
0120
0121 &vcc_5v {
0122 enable-active-high;
0123 gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
0124 pinctrl-names = "default";
0125 pinctrl-0 = <&drv_5v>;
0126 };
0127
0128 &vcc50_hdmi {
0129 enable-active-high;
0130 gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
0131 pinctrl-names = "default";
0132 pinctrl-0 = <&vcc50_hdmi_en>;
0133 };
0134
0135 &gpio0 {
0136 gpio-line-names = "PMIC_SLEEP_AP",
0137 "DDRIO_PWROFF",
0138 "DDRIO_RETEN",
0139 "TS3A227E_INT_L",
0140 "PMIC_INT_L",
0141 "PWR_KEY_L",
0142 "AP_LID_INT_L",
0143 "EC_IN_RW",
0144
0145 "AC_PRESENT_AP",
0146 /*
0147 * RECOVERY_SW_L is Chrome OS ABI. Schematics call
0148 * it REC_MODE_L.
0149 */
0150 "RECOVERY_SW_L",
0151 "OTP_OUT",
0152 "HOST1_PWR_EN",
0153 "USBOTG_PWREN_H",
0154 "AP_WARM_RESET_H",
0155 "nFALUT2",
0156 "I2C0_SDA_PMIC",
0157
0158 "I2C0_SCL_PMIC",
0159 "SUSPEND_L",
0160 "USB_INT";
0161 };
0162
0163 &gpio2 {
0164 gpio-line-names = "CONFIG0",
0165 "CONFIG1",
0166 "CONFIG2",
0167 "",
0168 "",
0169 "",
0170 "",
0171 "CONFIG3",
0172
0173 "PROCHOT#",
0174 "EMMC_RST_L",
0175 "",
0176 "",
0177 "BL_PWR_EN",
0178 "AVDD_1V8_DISP_EN",
0179 "TOUCH_INT",
0180 "TOUCH_RST",
0181
0182 "I2C3_SCL_TP",
0183 "I2C3_SDA_TP";
0184 };
0185
0186 &gpio3 {
0187 gpio-line-names = "FLASH0_D0",
0188 "FLASH0_D1",
0189 "FLASH0_D2",
0190 "FLASH0_D3",
0191 "FLASH0_D4",
0192 "FLASH0_D5",
0193 "FLASH0_D6",
0194 "FLASH0_D7",
0195
0196 "",
0197 "",
0198 "",
0199 "",
0200 "",
0201 "",
0202 "",
0203 "",
0204
0205 "FLASH0_CS2/EMMC_CMD",
0206 "",
0207 "FLASH0_DQS/EMMC_CLKO";
0208 };
0209
0210 &gpio4 {
0211 gpio-line-names = "",
0212 "",
0213 "",
0214 "",
0215 "",
0216 "",
0217 "",
0218 "",
0219
0220 "",
0221 "",
0222 "",
0223 "",
0224 "",
0225 "",
0226 "",
0227 "",
0228
0229 "UART0_RXD",
0230 "UART0_TXD",
0231 "UART0_CTS",
0232 "UART0_RTS",
0233 "SDIO0_D0",
0234 "SDIO0_D1",
0235 "SDIO0_D2",
0236 "SDIO0_D3",
0237
0238 "SDIO0_CMD",
0239 "SDIO0_CLK",
0240 "dev_wake",
0241 "",
0242 "WIFI_ENABLE_H",
0243 "BT_ENABLE_L",
0244 "WIFI_HOST_WAKE",
0245 "BT_HOST_WAKE";
0246 };
0247
0248 &gpio5 {
0249 gpio-line-names = "",
0250 "",
0251 "",
0252 "",
0253 "",
0254 "",
0255 "",
0256 "",
0257
0258 "",
0259 "",
0260 "Volum_Up#",
0261 "Volum_Down#",
0262 "SPI0_CLK",
0263 "SPI0_CS0",
0264 "SPI0_TXD",
0265 "SPI0_RXD",
0266
0267 "",
0268 "",
0269 "",
0270 "VCC50_HDMI_EN";
0271 };
0272
0273 &gpio6 {
0274 gpio-line-names = "I2S0_SCLK",
0275 "I2S0_LRCK_RX",
0276 "I2S0_LRCK_TX",
0277 "I2S0_SDI",
0278 "I2S0_SDO0",
0279 "HP_DET_H",
0280 "",
0281 "INT_CODEC",
0282
0283 "I2S0_CLK",
0284 "I2C2_SDA",
0285 "I2C2_SCL",
0286 "MICDET",
0287 "",
0288 "",
0289 "",
0290 "",
0291
0292 "SDMMC_D0",
0293 "SDMMC_D1",
0294 "SDMMC_D2",
0295 "SDMMC_D3",
0296 "SDMMC_CLK",
0297 "SDMMC_CMD";
0298 };
0299
0300 &gpio7 {
0301 gpio-line-names = "LCDC_BL",
0302 "PWM_LOG",
0303 "BL_EN",
0304 "TRACKPAD_INT",
0305 "TPM_INT_H",
0306 "SDMMC_DET_L",
0307 /*
0308 * AP_FLASH_WP_L is Chrome OS ABI. Schematics call
0309 * it FW_WP_AP.
0310 */
0311 "AP_FLASH_WP_L",
0312 "EC_INT",
0313
0314 "CPU_NMI",
0315 "DVS_OK",
0316 "SDMMC_WP",
0317 "EDP_HPD",
0318 "DVS1",
0319 "nFALUT1",
0320 "LCD_EN",
0321 "DVS2",
0322
0323 "VCC5V_GOOD_H",
0324 "I2C4_SDA_TP",
0325 "I2C4_SCL_TP",
0326 "I2C5_SDA_HDMI",
0327 "I2C5_SCL_HDMI",
0328 "5V_DRV",
0329 "UART2_RXD",
0330 "UART2_TXD";
0331 };
0332
0333 &gpio8 {
0334 gpio-line-names = "RAM_ID0",
0335 "RAM_ID1",
0336 "RAM_ID2",
0337 "RAM_ID3",
0338 "I2C1_SDA_TPM",
0339 "I2C1_SCL_TPM",
0340 "SPI2_CLK",
0341 "SPI2_CS0",
0342
0343 "SPI2_RXD",
0344 "SPI2_TXD";
0345 };
0346
0347 &pinctrl {
0348 pinctrl-names = "default", "sleep";
0349 pinctrl-0 = <
0350 /* Common for sleep and wake, but no owners */
0351 &ddr0_retention
0352 &ddrio_pwroff
0353 &global_pwroff
0354
0355 /* Wake only */
0356 &suspend_l_wake
0357 >;
0358 pinctrl-1 = <
0359 /* Common for sleep and wake, but no owners */
0360 &ddr0_retention
0361 &ddrio_pwroff
0362 &global_pwroff
0363
0364 /* Sleep only */
0365 &suspend_l_sleep
0366 >;
0367
0368 buck-5v {
0369 drv_5v: drv-5v {
0370 rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
0371 };
0372 };
0373
0374 buttons {
0375 volum_down_l: volum-down-l {
0376 rockchip,pins = <5 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
0377 };
0378
0379 volum_up_l: volum-up-l {
0380 rockchip,pins = <5 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
0381 };
0382 };
0383
0384 hdmi {
0385 vcc50_hdmi_en: vcc50-hdmi-en {
0386 rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
0387 };
0388 };
0389
0390 pmic {
0391 dvs_1: dvs-1 {
0392 rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
0393 };
0394
0395 dvs_2: dvs-2 {
0396 rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
0397 };
0398 };
0399
0400 prochot {
0401 gpio_prochot: gpio-prochot {
0402 rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
0403 };
0404 };
0405
0406 touchscreen {
0407 touch_int: touch-int {
0408 rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
0409 };
0410
0411 touch_rst: touch-rst {
0412 rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
0413 };
0414 };
0415 };
