0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Google Veyron (and derivatives) fragment for the edp displays
0004 *
0005 * Copyright 2019 Google LLC
0006 */
0007
0008 / {
0009 backlight_regulator: backlight-regulator {
0010 compatible = "regulator-fixed";
0011 enable-active-high;
0012 gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
0013 pinctrl-names = "default";
0014 pinctrl-0 = <&bl_pwr_en>;
0015 regulator-name = "backlight_regulator";
0016 vin-supply = <&vcc33_sys>;
0017 startup-delay-us = <15000>;
0018 };
0019
0020 panel_regulator: panel-regulator {
0021 compatible = "regulator-fixed";
0022 enable-active-high;
0023 gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
0024 pinctrl-names = "default";
0025 pinctrl-0 = <&lcd_enable_h>;
0026 regulator-name = "panel_regulator";
0027 vin-supply = <&vcc33_sys>;
0028 };
0029
0030 vcc18_lcd: vcc18-lcd {
0031 compatible = "regulator-fixed";
0032 enable-active-high;
0033 gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
0034 pinctrl-names = "default";
0035 pinctrl-0 = <&avdd_1v8_disp_en>;
0036 regulator-name = "vcc18_lcd";
0037 regulator-always-on;
0038 regulator-boot-on;
0039 vin-supply = <&vcc18_wl>;
0040 };
0041
0042 backlight: backlight {
0043 compatible = "pwm-backlight";
0044 brightness-levels = <0 255>;
0045 num-interpolated-steps = <255>;
0046 default-brightness-level = <128>;
0047 enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
0048 pinctrl-names = "default";
0049 pinctrl-0 = <&bl_en>;
0050 pwms = <&pwm0 0 1000000 0>;
0051 post-pwm-on-delay-ms = <10>;
0052 pwm-off-delay-ms = <10>;
0053 power-supply = <&backlight_regulator>;
0054 };
0055
0056 panel: panel {
0057 compatible = "innolux,n116bge";
0058 status = "okay";
0059 power-supply = <&panel_regulator>;
0060 backlight = <&backlight>;
0061
0062 panel-timing {
0063 clock-frequency = <74250000>;
0064 hactive = <1366>;
0065 hfront-porch = <136>;
0066 hback-porch = <60>;
0067 hsync-len = <30>;
0068 hsync-active = <0>;
0069 vactive = <768>;
0070 vfront-porch = <8>;
0071 vback-porch = <12>;
0072 vsync-len = <12>;
0073 vsync-active = <0>;
0074 };
0075
0076 ports {
0077 panel_in: port {
0078 panel_in_edp: endpoint {
0079 remote-endpoint = <&edp_out_panel>;
0080 };
0081 };
0082 };
0083 };
0084 };
0085
0086 &edp {
0087 status = "okay";
0088
0089 pinctrl-names = "default";
0090 pinctrl-0 = <&edp_hpd>;
0091
0092 ports {
0093 edp_out: port@1 {
0094 reg = <1>;
0095 #address-cells = <1>;
0096 #size-cells = <0>;
0097 edp_out_panel: endpoint@0 {
0098 reg = <0>;
0099 remote-endpoint = <&panel_in_edp>;
0100 };
0101 };
0102 };
0103 };
0104
0105 &edp_phy {
0106 status = "okay";
0107 };
0108
0109 &pwm0 {
0110 status = "okay";
0111 };
0112
0113 &vopl {
0114 status = "okay";
0115 };
0116
0117 &vopl_mmu {
0118 status = "okay";
0119 };
0120
0121 &pinctrl {
0122 backlight {
0123 bl_pwr_en: bl_pwr_en {
0124 rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
0125 };
0126
0127 bl_en: bl-en {
0128 rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
0129 };
0130 };
0131
0132 lcd {
0133 lcd_enable_h: lcd-en {
0134 rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
0135 };
0136
0137 avdd_1v8_disp_en: avdd-1v8-disp-en {
0138 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
0139 };
0140 };
0141 };
