0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Google Veyron (and derivatives) fragment for the max98090 audio
0004 * codec and analog headphone jack.
0005 *
0006 * Copyright 2016 Google, Inc
0007 */
0008
0009 / {
0010 sound {
0011 compatible = "rockchip,rockchip-audio-max98090";
0012 pinctrl-names = "default";
0013 pinctrl-0 = <&mic_det>, <&hp_det>;
0014 rockchip,model = "VEYRON-I2S";
0015 rockchip,i2s-controller = <&i2s>;
0016 rockchip,audio-codec = <&max98090>;
0017 rockchip,hp-det-gpios = <&gpio6 RK_PA5 GPIO_ACTIVE_HIGH>;
0018 rockchip,mic-det-gpios = <&gpio6 RK_PB3 GPIO_ACTIVE_LOW>;
0019 rockchip,headset-codec = <&headsetcodec>;
0020 rockchip,hdmi-codec = <&hdmi>;
0021 };
0022 };
0023
0024 &i2c2 {
0025 max98090: max98090@10 {
0026 compatible = "maxim,max98090";
0027 reg = <0x10>;
0028 interrupt-parent = <&gpio6>;
0029 interrupts = <RK_PA7 IRQ_TYPE_EDGE_FALLING>;
0030 clock-names = "mclk";
0031 clocks = <&cru SCLK_I2S0_OUT>;
0032 pinctrl-names = "default";
0033 pinctrl-0 = <&int_codec>;
0034 };
0035 };
0036
0037 &i2c4 {
0038 headsetcodec: ts3a227e@3b {
0039 compatible = "ti,ts3a227e";
0040 reg = <0x3b>;
0041 interrupt-parent = <&gpio0>;
0042 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
0043 pinctrl-names = "default";
0044 pinctrl-0 = <&ts3a227e_int_l>;
0045 ti,micbias = <7>; /* MICBIAS = 2.8V */
0046 };
0047 };
0048
0049 &i2s {
0050 status = "okay";
0051 };
0052
0053 &io_domains {
0054 audio-supply = <&vcc18_codec>;
0055 };
0056
0057 &rk808 {
0058 vcc10-supply = <&vcc33_sys>;
0059
0060 regulators {
0061 vcc18_codec: LDO_REG6 {
0062 regulator-name = "vcc18_codec";
0063 regulator-always-on;
0064 regulator-boot-on;
0065 regulator-min-microvolt = <1800000>;
0066 regulator-max-microvolt = <1800000>;
0067 regulator-state-mem {
0068 regulator-off-in-suspend;
0069 };
0070 };
0071 };
0072 };
0073
0074 &pinctrl {
0075 codec {
0076 hp_det: hp-det {
0077 rockchip,pins = <6 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
0078 };
0079
0080 /*
0081 * HACK: We're going to _pull down_ this _active low_ interrupt
0082 * so that it never fires. We don't need this interrupt because
0083 * we've got a ts3a227e chip but the driver requires it.
0084 */
0085 int_codec: int-codec {
0086 rockchip,pins = <6 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
0087 };
0088
0089 mic_det: mic-det {
0090 rockchip,pins = <6 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
0091 };
0092 };
0093
0094 headset {
0095 ts3a227e_int_l: ts3a227e-int-l {
0096 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
0097 };
0098 };
0099 };
