0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Device tree file for Phytec phyCORE-RK3288 SoM
0004 * Copyright (C) 2017 PHYTEC Messtechnik GmbH
0005 * Author: Wadim Egorov <w.egorov@phytec.de>
0006 */
0007
0008 #include <dt-bindings/net/ti-dp83867.h>
0009 #include "rk3288.dtsi"
0010
0011 / {
0012 model = "Phytec RK3288 phyCORE";
0013 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
0014
0015 /*
0016 * Set the minimum memory size here and
0017 * let the bootloader set the real size.
0018 */
0019 memory {
0020 device_type = "memory";
0021 reg = <0x0 0x0 0x0 0x8000000>;
0022 };
0023
0024 aliases {
0025 rtc0 = &i2c_rtc;
0026 rtc1 = &rk818;
0027 };
0028
0029 ext_gmac: external-gmac-clock {
0030 compatible = "fixed-clock";
0031 #clock-cells = <0>;
0032 clock-frequency = <125000000>;
0033 clock-output-names = "ext_gmac";
0034 };
0035
0036 leds: user-leds {
0037 compatible = "gpio-leds";
0038 pinctrl-names = "default";
0039 pinctrl-0 = <&user_led_pin>;
0040
0041 user_led: led-0 {
0042 label = "green_led";
0043 gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
0044 linux,default-trigger = "heartbeat";
0045 default-state = "keep";
0046 };
0047 };
0048
0049 vdd_emmc_io: vdd-emmc-io {
0050 compatible = "regulator-fixed";
0051 regulator-name = "vdd_emmc_io";
0052 regulator-min-microvolt = <1800000>;
0053 regulator-max-microvolt = <1800000>;
0054 vin-supply = <&vdd_3v3_io>;
0055 };
0056
0057 vdd_in_otg_out: vdd-in-otg-out {
0058 compatible = "regulator-fixed";
0059 regulator-name = "vdd_in_otg_out";
0060 regulator-always-on;
0061 regulator-boot-on;
0062 regulator-min-microvolt = <5000000>;
0063 regulator-max-microvolt = <5000000>;
0064 };
0065
0066 vdd_misc_1v8: vdd-misc-1v8 {
0067 compatible = "regulator-fixed";
0068 regulator-name = "vdd_misc_1v8";
0069 regulator-always-on;
0070 regulator-boot-on;
0071 regulator-min-microvolt = <1800000>;
0072 regulator-max-microvolt = <1800000>;
0073 };
0074 };
0075
0076 &emmc {
0077 status = "okay";
0078 bus-width = <8>;
0079 cap-mmc-highspeed;
0080 disable-wp;
0081 non-removable;
0082 pinctrl-names = "default";
0083 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
0084 vmmc-supply = <&vdd_3v3_io>;
0085 vqmmc-supply = <&vdd_emmc_io>;
0086 };
0087
0088 &gmac {
0089 assigned-clocks = <&cru SCLK_MAC>;
0090 assigned-clock-parents = <&ext_gmac>;
0091 clock_in_out = "input";
0092 pinctrl-names = "default";
0093 pinctrl-0 = <&rgmii_pins &phy_rst &phy_int>;
0094 phy-handle = <&phy0>;
0095 phy-supply = <&vdd_eth_2v5>;
0096 phy-mode = "rgmii-id";
0097 snps,reset-active-low;
0098 snps,reset-delays-us = <0 10000 1000000>;
0099 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
0100 tx_delay = <0x0>;
0101 rx_delay = <0x0>;
0102
0103 mdio0 {
0104 compatible = "snps,dwmac-mdio";
0105 #address-cells = <1>;
0106 #size-cells = <0>;
0107
0108 phy0: ethernet-phy@0 {
0109 compatible = "ethernet-phy-ieee802.3-c22";
0110 reg = <0>;
0111 interrupt-parent = <&gpio4>;
0112 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
0113 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
0114 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
0115 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
0116 enet-phy-lane-no-swap;
0117 ti,clk-output-sel = <DP83867_CLK_O_SEL_CHN_A_TCLK>;
0118 };
0119 };
0120 };
0121
0122 &hdmi {
0123 ddc-i2c-bus = <&i2c5>;
0124 };
0125
0126 &io_domains {
0127 status = "okay";
0128 sdcard-supply = <&vdd_io_sd>;
0129 flash0-supply = <&vdd_emmc_io>;
0130 flash1-supply = <&vdd_misc_1v8>;
0131 gpio1830-supply = <&vdd_3v3_io>;
0132 gpio30-supply = <&vdd_3v3_io>;
0133 bb-supply = <&vdd_3v3_io>;
0134 dvp-supply = <&vdd_3v3_io>;
0135 lcdc-supply = <&vdd_3v3_io>;
0136 wifi-supply = <&vdd_3v3_io>;
0137 audio-supply = <&vdd_3v3_io>;
0138 };
0139
0140 &i2c0 {
0141 status = "okay";
0142 clock-frequency = <400000>;
0143
0144 rk818: pmic@1c {
0145 compatible = "rockchip,rk818";
0146 reg = <0x1c>;
0147 interrupt-parent = <&gpio0>;
0148 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
0149 pinctrl-names = "default";
0150 pinctrl-0 = <&pmic_int>;
0151 rockchip,system-power-controller;
0152 wakeup-source;
0153 #clock-cells = <1>;
0154
0155 vcc1-supply = <&vdd_sys>;
0156 vcc2-supply = <&vdd_sys>;
0157 vcc3-supply = <&vdd_sys>;
0158 vcc4-supply = <&vdd_sys>;
0159 boost-supply = <&vdd_in_otg_out>;
0160 vcc6-supply = <&vdd_sys>;
0161 vcc7-supply = <&vdd_misc_1v8>;
0162 vcc8-supply = <&vdd_misc_1v8>;
0163 vcc9-supply = <&vdd_3v3_io>;
0164 vddio-supply = <&vdd_3v3_io>;
0165
0166 regulators {
0167 vdd_log: DCDC_REG1 {
0168 regulator-name = "vdd_log";
0169 regulator-always-on;
0170 regulator-boot-on;
0171 regulator-min-microvolt = <1100000>;
0172 regulator-max-microvolt = <1100000>;
0173 regulator-state-mem {
0174 regulator-off-in-suspend;
0175 };
0176 };
0177
0178 vdd_gpu: DCDC_REG2 {
0179 regulator-name = "vdd_gpu";
0180 regulator-always-on;
0181 regulator-boot-on;
0182 regulator-min-microvolt = <800000>;
0183 regulator-max-microvolt = <1250000>;
0184 regulator-state-mem {
0185 regulator-on-in-suspend;
0186 regulator-suspend-microvolt = <1000000>;
0187 };
0188 };
0189
0190 vcc_ddr: DCDC_REG3 {
0191 regulator-name = "vcc_ddr";
0192 regulator-always-on;
0193 regulator-boot-on;
0194 regulator-state-mem {
0195 regulator-on-in-suspend;
0196 };
0197 };
0198
0199 vdd_3v3_io: DCDC_REG4 {
0200 regulator-name = "vdd_3v3_io";
0201 regulator-always-on;
0202 regulator-boot-on;
0203 regulator-min-microvolt = <3300000>;
0204 regulator-max-microvolt = <3300000>;
0205 regulator-state-mem {
0206 regulator-on-in-suspend;
0207 regulator-suspend-microvolt = <3300000>;
0208 };
0209 };
0210
0211 vdd_sys: DCDC_BOOST {
0212 regulator-name = "vdd_sys";
0213 regulator-always-on;
0214 regulator-boot-on;
0215 regulator-min-microvolt = <5000000>;
0216 regulator-max-microvolt = <5000000>;
0217 regulator-state-mem {
0218 regulator-on-in-suspend;
0219 regulator-suspend-microvolt = <5000000>;
0220 };
0221 };
0222
0223 /* vcc9 */
0224 vdd_sd: SWITCH_REG {
0225 regulator-name = "vdd_sd";
0226 regulator-always-on;
0227 regulator-boot-on;
0228 regulator-state-mem {
0229 regulator-off-in-suspend;
0230 };
0231 };
0232
0233 /* vcc6 */
0234 vdd_eth_2v5: LDO_REG2 {
0235 regulator-name = "vdd_eth_2v5";
0236 regulator-always-on;
0237 regulator-boot-on;
0238 regulator-min-microvolt = <2500000>;
0239 regulator-max-microvolt = <2500000>;
0240 regulator-state-mem {
0241 regulator-on-in-suspend;
0242 regulator-suspend-microvolt = <2500000>;
0243 };
0244 };
0245
0246 /* vcc7 */
0247 vdd_1v0: LDO_REG3 {
0248 regulator-name = "vdd_1v0";
0249 regulator-always-on;
0250 regulator-boot-on;
0251 regulator-min-microvolt = <1000000>;
0252 regulator-max-microvolt = <1000000>;
0253 regulator-state-mem {
0254 regulator-on-in-suspend;
0255 regulator-suspend-microvolt = <1000000>;
0256 };
0257 };
0258
0259 /* vcc8 */
0260 vdd_1v8_lcd_ldo: LDO_REG4 {
0261 regulator-name = "vdd_1v8_lcd_ldo";
0262 regulator-always-on;
0263 regulator-boot-on;
0264 regulator-min-microvolt = <1800000>;
0265 regulator-max-microvolt = <1800000>;
0266 regulator-state-mem {
0267 regulator-on-in-suspend;
0268 regulator-suspend-microvolt = <1800000>;
0269 };
0270 };
0271
0272 /* vcc8 */
0273 vdd_1v0_lcd: LDO_REG6 {
0274 regulator-name = "vdd_1v0_lcd";
0275 regulator-always-on;
0276 regulator-boot-on;
0277 regulator-min-microvolt = <1000000>;
0278 regulator-max-microvolt = <1000000>;
0279 regulator-state-mem {
0280 regulator-on-in-suspend;
0281 regulator-suspend-microvolt = <1000000>;
0282 };
0283 };
0284
0285 /* vcc7 */
0286 vdd_1v8_ldo: LDO_REG7 {
0287 regulator-name = "vdd_1v8_ldo";
0288 regulator-always-on;
0289 regulator-boot-on;
0290 regulator-min-microvolt = <1800000>;
0291 regulator-max-microvolt = <1800000>;
0292 regulator-state-mem {
0293 regulator-off-in-suspend;
0294 regulator-suspend-microvolt = <1800000>;
0295 };
0296 };
0297
0298 /* vcc9 */
0299 vdd_io_sd: LDO_REG9 {
0300 regulator-name = "vdd_io_sd";
0301 regulator-always-on;
0302 regulator-boot-on;
0303 regulator-min-microvolt = <1800000>;
0304 regulator-max-microvolt = <3300000>;
0305 regulator-state-mem {
0306 regulator-off-in-suspend;
0307 };
0308 };
0309 };
0310 };
0311
0312 /* M24C32-D */
0313 i2c_eeprom: eeprom@50 {
0314 compatible = "atmel,24c32";
0315 reg = <0x50>;
0316 pagesize = <32>;
0317 };
0318
0319 vdd_cpu: regulator@60 {
0320 compatible = "fcs,fan53555";
0321 reg = <0x60>;
0322 fcs,suspend-voltage-selector = <1>;
0323 regulator-always-on;
0324 regulator-boot-on;
0325 regulator-enable-ramp-delay = <300>;
0326 regulator-name = "vdd_cpu";
0327 regulator-min-microvolt = <800000>;
0328 regulator-max-microvolt = <1430000>;
0329 regulator-ramp-delay = <8000>;
0330 vin-supply = <&vdd_sys>;
0331 };
0332 };
0333
0334 &pinctrl {
0335 pcfg_output_high: pcfg-output-high {
0336 output-high;
0337 };
0338
0339 emmc {
0340 /*
0341 * We run eMMC at max speed; bump up drive strength.
0342 * We also have external pulls, so disable the internal ones.
0343 */
0344 emmc_clk: emmc-clk {
0345 rockchip,pins = <3 RK_PC2 2 &pcfg_pull_none_12ma>;
0346 };
0347
0348 emmc_cmd: emmc-cmd {
0349 rockchip,pins = <3 RK_PC0 2 &pcfg_pull_none_12ma>;
0350 };
0351
0352 emmc_bus8: emmc-bus8 {
0353 rockchip,pins = <3 RK_PA0 2 &pcfg_pull_none_12ma>,
0354 <3 RK_PA1 2 &pcfg_pull_none_12ma>,
0355 <3 RK_PA2 2 &pcfg_pull_none_12ma>,
0356 <3 RK_PA3 2 &pcfg_pull_none_12ma>,
0357 <3 RK_PA4 2 &pcfg_pull_none_12ma>,
0358 <3 RK_PA5 2 &pcfg_pull_none_12ma>,
0359 <3 RK_PA6 2 &pcfg_pull_none_12ma>,
0360 <3 RK_PA7 2 &pcfg_pull_none_12ma>;
0361 };
0362 };
0363
0364 gmac {
0365 phy_int: phy-int {
0366 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
0367 };
0368
0369 phy_rst: phy-rst {
0370 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
0371 };
0372 };
0373
0374 leds {
0375 user_led_pin: user-led-pin {
0376 rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_output_high>;
0377 };
0378 };
0379
0380 pmic {
0381 pmic_int: pmic-int {
0382 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
0383 };
0384
0385 /* Pin for switching state between sleep and non-sleep state */
0386 pmic_sleep: pmic-sleep {
0387 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
0388 };
0389 };
0390 };
0391
0392 &pwm1 {
0393 status = "okay";
0394 };
0395
0396 &saradc {
0397 status = "okay";
0398 vref-supply = <&vdd_1v8_ldo>;
0399 };
0400
0401 &spi2 {
0402 status = "okay";
0403
0404 serial_flash: flash@0 {
0405 compatible = "micron,n25q128a13", "jedec,spi-nor";
0406 reg = <0x0>;
0407 spi-max-frequency = <50000000>;
0408 m25p,fast-read;
0409 #address-cells = <1>;
0410 #size-cells = <1>;
0411 status = "okay";
0412 };
0413 };
0414
0415 &tsadc {
0416 status = "okay";
0417 rockchip,hw-tshut-mode = <0>;
0418 rockchip,hw-tshut-polarity = <0>;
0419 };
0420
0421 &vopb {
0422 status = "okay";
0423 };
0424
0425 &vopb_mmu {
0426 status = "okay";
0427 };
0428
0429 &vopl {
0430 status = "okay";
0431 };
0432
0433 &vopl_mmu {
0434 status = "okay";
0435 };
0436
0437 &wdt {
0438 status = "okay";
0439 };
