0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * RDA8810PL SoC
0004 *
0005 * Copyright (c) 2017 Andreas Färber
0006 * Copyright (c) 2018 Manivannan Sadhasivam
0007 */
0008
0009 #include <dt-bindings/interrupt-controller/irq.h>
0010
0011 / {
0012 compatible = "rda,8810pl";
0013 interrupt-parent = <&intc>;
0014 #address-cells = <1>;
0015 #size-cells = <1>;
0016
0017 cpus {
0018 #address-cells = <1>;
0019 #size-cells = <0>;
0020
0021 cpu@0 {
0022 device_type = "cpu";
0023 compatible = "arm,cortex-a5";
0024 reg = <0x0>;
0025 };
0026 };
0027
0028 sram@100000 {
0029 compatible = "mmio-sram";
0030 reg = <0x100000 0x10000>;
0031 #address-cells = <1>;
0032 #size-cells = <1>;
0033 ranges;
0034 };
0035
0036 modem@10000000 {
0037 compatible = "simple-bus";
0038 #address-cells = <1>;
0039 #size-cells = <1>;
0040 ranges = <0x0 0x10000000 0xfffffff>;
0041
0042 gpioc@1a08000 {
0043 compatible = "rda,8810pl-gpio";
0044 reg = <0x1a08000 0x1000>;
0045 gpio-controller;
0046 #gpio-cells = <2>;
0047 ngpios = <32>;
0048 };
0049 };
0050
0051 apb@20800000 {
0052 compatible = "simple-bus";
0053 #address-cells = <1>;
0054 #size-cells = <1>;
0055 ranges = <0x0 0x20800000 0x100000>;
0056
0057 intc: interrupt-controller@0 {
0058 compatible = "rda,8810pl-intc";
0059 reg = <0x0 0x1000>;
0060 interrupt-controller;
0061 #interrupt-cells = <2>;
0062 };
0063 };
0064
0065 apb@20900000 {
0066 compatible = "simple-bus";
0067 #address-cells = <1>;
0068 #size-cells = <1>;
0069 ranges = <0x0 0x20900000 0x100000>;
0070
0071 timer@10000 {
0072 compatible = "rda,8810pl-timer";
0073 reg = <0x10000 0x1000>;
0074 interrupts = <16 IRQ_TYPE_LEVEL_HIGH>,
0075 <17 IRQ_TYPE_LEVEL_HIGH>;
0076 interrupt-names = "hwtimer", "ostimer";
0077 };
0078
0079 gpioa@30000 {
0080 compatible = "rda,8810pl-gpio";
0081 reg = <0x30000 0x1000>;
0082 gpio-controller;
0083 #gpio-cells = <2>;
0084 ngpios = <32>;
0085 interrupt-controller;
0086 #interrupt-cells = <2>;
0087 interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
0088 };
0089
0090 gpiob@31000 {
0091 compatible = "rda,8810pl-gpio";
0092 reg = <0x31000 0x1000>;
0093 gpio-controller;
0094 #gpio-cells = <2>;
0095 ngpios = <32>;
0096 interrupt-controller;
0097 #interrupt-cells = <2>;
0098 interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
0099 };
0100
0101 gpiod@32000 {
0102 compatible = "rda,8810pl-gpio";
0103 reg = <0x32000 0x1000>;
0104 gpio-controller;
0105 #gpio-cells = <2>;
0106 ngpios = <32>;
0107 interrupt-controller;
0108 #interrupt-cells = <2>;
0109 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
0110 };
0111 };
0112
0113 apb@20a00000 {
0114 compatible = "simple-bus";
0115 #address-cells = <1>;
0116 #size-cells = <1>;
0117 ranges = <0x0 0x20a00000 0x100000>;
0118
0119 uart1: serial@0 {
0120 compatible = "rda,8810pl-uart";
0121 reg = <0x0 0x1000>;
0122 interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
0123 status = "disabled";
0124 };
0125
0126 uart2: serial@10000 {
0127 compatible = "rda,8810pl-uart";
0128 reg = <0x10000 0x1000>;
0129 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
0130 status = "disabled";
0131 };
0132
0133 uart3: serial@90000 {
0134 compatible = "rda,8810pl-uart";
0135 reg = <0x90000 0x1000>;
0136 interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
0137 status = "disabled";
0138 };
0139 };
0140
0141 l2: cache-controller@21100000 {
0142 compatible = "arm,pl310-cache";
0143 reg = <0x21100000 0x1000>;
0144 cache-unified;
0145 cache-level = <2>;
0146 };
0147 };
