0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the R-Car E2 (R8A77940) SoC
0004 *
0005 * Copyright (C) 2014 Renesas Electronics Corporation
0006 * Copyright (C) 2014 Ulrich Hecht
0007 */
0008
0009 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
0010 #include <dt-bindings/interrupt-controller/arm-gic.h>
0011 #include <dt-bindings/interrupt-controller/irq.h>
0012 #include <dt-bindings/power/r8a7794-sysc.h>
0013
0014 / {
0015 compatible = "renesas,r8a7794";
0016 #address-cells = <2>;
0017 #size-cells = <2>;
0018
0019 aliases {
0020 i2c0 = &i2c0;
0021 i2c1 = &i2c1;
0022 i2c2 = &i2c2;
0023 i2c3 = &i2c3;
0024 i2c4 = &i2c4;
0025 i2c5 = &i2c5;
0026 i2c6 = &i2c6;
0027 i2c7 = &i2c7;
0028 spi0 = &qspi;
0029 vin0 = &vin0;
0030 vin1 = &vin1;
0031 };
0032
0033 /*
0034 * The external audio clocks are configured as 0 Hz fixed frequency
0035 * clocks by default.
0036 * Boards that provide audio clocks should override them.
0037 */
0038 audio_clka: audio_clka {
0039 compatible = "fixed-clock";
0040 #clock-cells = <0>;
0041 clock-frequency = <0>;
0042 };
0043 audio_clkb: audio_clkb {
0044 compatible = "fixed-clock";
0045 #clock-cells = <0>;
0046 clock-frequency = <0>;
0047 };
0048 audio_clkc: audio_clkc {
0049 compatible = "fixed-clock";
0050 #clock-cells = <0>;
0051 clock-frequency = <0>;
0052 };
0053
0054 /* External CAN clock */
0055 can_clk: can {
0056 compatible = "fixed-clock";
0057 #clock-cells = <0>;
0058 /* This value must be overridden by the board. */
0059 clock-frequency = <0>;
0060 };
0061
0062 cpus {
0063 #address-cells = <1>;
0064 #size-cells = <0>;
0065
0066 cpu0: cpu@0 {
0067 device_type = "cpu";
0068 compatible = "arm,cortex-a7";
0069 reg = <0>;
0070 clock-frequency = <1000000000>;
0071 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
0072 power-domains = <&sysc R8A7794_PD_CA7_CPU0>;
0073 enable-method = "renesas,apmu";
0074 next-level-cache = <&L2_CA7>;
0075 };
0076
0077 cpu1: cpu@1 {
0078 device_type = "cpu";
0079 compatible = "arm,cortex-a7";
0080 reg = <1>;
0081 clock-frequency = <1000000000>;
0082 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
0083 power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
0084 enable-method = "renesas,apmu";
0085 next-level-cache = <&L2_CA7>;
0086 };
0087
0088 L2_CA7: cache-controller-0 {
0089 compatible = "cache";
0090 power-domains = <&sysc R8A7794_PD_CA7_SCU>;
0091 cache-unified;
0092 cache-level = <2>;
0093 };
0094 };
0095
0096 /* External root clock */
0097 extal_clk: extal {
0098 compatible = "fixed-clock";
0099 #clock-cells = <0>;
0100 /* This value must be overridden by the board. */
0101 clock-frequency = <0>;
0102 };
0103
0104 pmu {
0105 compatible = "arm,cortex-a7-pmu";
0106 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
0107 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
0108 interrupt-affinity = <&cpu0>, <&cpu1>;
0109 };
0110
0111 /* External SCIF clock */
0112 scif_clk: scif {
0113 compatible = "fixed-clock";
0114 #clock-cells = <0>;
0115 /* This value must be overridden by the board. */
0116 clock-frequency = <0>;
0117 };
0118
0119 soc {
0120 compatible = "simple-bus";
0121 interrupt-parent = <&gic>;
0122
0123 #address-cells = <2>;
0124 #size-cells = <2>;
0125 ranges;
0126
0127 rwdt: watchdog@e6020000 {
0128 compatible = "renesas,r8a7794-wdt",
0129 "renesas,rcar-gen2-wdt";
0130 reg = <0 0xe6020000 0 0x0c>;
0131 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
0132 clocks = <&cpg CPG_MOD 402>;
0133 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0134 resets = <&cpg 402>;
0135 status = "disabled";
0136 };
0137
0138 gpio0: gpio@e6050000 {
0139 compatible = "renesas,gpio-r8a7794",
0140 "renesas,rcar-gen2-gpio";
0141 reg = <0 0xe6050000 0 0x50>;
0142 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0143 #gpio-cells = <2>;
0144 gpio-controller;
0145 gpio-ranges = <&pfc 0 0 32>;
0146 #interrupt-cells = <2>;
0147 interrupt-controller;
0148 clocks = <&cpg CPG_MOD 912>;
0149 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0150 resets = <&cpg 912>;
0151 };
0152
0153 gpio1: gpio@e6051000 {
0154 compatible = "renesas,gpio-r8a7794",
0155 "renesas,rcar-gen2-gpio";
0156 reg = <0 0xe6051000 0 0x50>;
0157 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
0158 #gpio-cells = <2>;
0159 gpio-controller;
0160 gpio-ranges = <&pfc 0 32 26>;
0161 #interrupt-cells = <2>;
0162 interrupt-controller;
0163 clocks = <&cpg CPG_MOD 911>;
0164 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0165 resets = <&cpg 911>;
0166 };
0167
0168 gpio2: gpio@e6052000 {
0169 compatible = "renesas,gpio-r8a7794",
0170 "renesas,rcar-gen2-gpio";
0171 reg = <0 0xe6052000 0 0x50>;
0172 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
0173 #gpio-cells = <2>;
0174 gpio-controller;
0175 gpio-ranges = <&pfc 0 64 32>;
0176 #interrupt-cells = <2>;
0177 interrupt-controller;
0178 clocks = <&cpg CPG_MOD 910>;
0179 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0180 resets = <&cpg 910>;
0181 };
0182
0183 gpio3: gpio@e6053000 {
0184 compatible = "renesas,gpio-r8a7794",
0185 "renesas,rcar-gen2-gpio";
0186 reg = <0 0xe6053000 0 0x50>;
0187 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0188 #gpio-cells = <2>;
0189 gpio-controller;
0190 gpio-ranges = <&pfc 0 96 32>;
0191 #interrupt-cells = <2>;
0192 interrupt-controller;
0193 clocks = <&cpg CPG_MOD 909>;
0194 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0195 resets = <&cpg 909>;
0196 };
0197
0198 gpio4: gpio@e6054000 {
0199 compatible = "renesas,gpio-r8a7794",
0200 "renesas,rcar-gen2-gpio";
0201 reg = <0 0xe6054000 0 0x50>;
0202 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0203 #gpio-cells = <2>;
0204 gpio-controller;
0205 gpio-ranges = <&pfc 0 128 32>;
0206 #interrupt-cells = <2>;
0207 interrupt-controller;
0208 clocks = <&cpg CPG_MOD 908>;
0209 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0210 resets = <&cpg 908>;
0211 };
0212
0213 gpio5: gpio@e6055000 {
0214 compatible = "renesas,gpio-r8a7794",
0215 "renesas,rcar-gen2-gpio";
0216 reg = <0 0xe6055000 0 0x50>;
0217 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
0218 #gpio-cells = <2>;
0219 gpio-controller;
0220 gpio-ranges = <&pfc 0 160 28>;
0221 #interrupt-cells = <2>;
0222 interrupt-controller;
0223 clocks = <&cpg CPG_MOD 907>;
0224 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0225 resets = <&cpg 907>;
0226 };
0227
0228 gpio6: gpio@e6055400 {
0229 compatible = "renesas,gpio-r8a7794",
0230 "renesas,rcar-gen2-gpio";
0231 reg = <0 0xe6055400 0 0x50>;
0232 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
0233 #gpio-cells = <2>;
0234 gpio-controller;
0235 gpio-ranges = <&pfc 0 192 26>;
0236 #interrupt-cells = <2>;
0237 interrupt-controller;
0238 clocks = <&cpg CPG_MOD 905>;
0239 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0240 resets = <&cpg 905>;
0241 };
0242
0243 pfc: pinctrl@e6060000 {
0244 compatible = "renesas,pfc-r8a7794";
0245 reg = <0 0xe6060000 0 0x11c>;
0246 };
0247
0248 cpg: clock-controller@e6150000 {
0249 compatible = "renesas,r8a7794-cpg-mssr";
0250 reg = <0 0xe6150000 0 0x1000>;
0251 clocks = <&extal_clk>, <&usb_extal_clk>;
0252 clock-names = "extal", "usb_extal";
0253 #clock-cells = <2>;
0254 #power-domain-cells = <0>;
0255 #reset-cells = <1>;
0256 };
0257
0258 apmu@e6151000 {
0259 compatible = "renesas,r8a7794-apmu", "renesas,apmu";
0260 reg = <0 0xe6151000 0 0x188>;
0261 cpus = <&cpu0>, <&cpu1>;
0262 };
0263
0264 rst: reset-controller@e6160000 {
0265 compatible = "renesas,r8a7794-rst";
0266 reg = <0 0xe6160000 0 0x0100>;
0267 };
0268
0269 sysc: system-controller@e6180000 {
0270 compatible = "renesas,r8a7794-sysc";
0271 reg = <0 0xe6180000 0 0x0200>;
0272 #power-domain-cells = <1>;
0273 };
0274
0275 irqc0: interrupt-controller@e61c0000 {
0276 compatible = "renesas,irqc-r8a7794", "renesas,irqc";
0277 #interrupt-cells = <2>;
0278 interrupt-controller;
0279 reg = <0 0xe61c0000 0 0x200>;
0280 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
0281 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
0282 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
0283 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
0284 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
0285 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
0286 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
0287 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
0288 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
0289 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
0290 clocks = <&cpg CPG_MOD 407>;
0291 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0292 resets = <&cpg 407>;
0293 };
0294
0295 ipmmu_sy0: iommu@e6280000 {
0296 compatible = "renesas,ipmmu-r8a7794",
0297 "renesas,ipmmu-vmsa";
0298 reg = <0 0xe6280000 0 0x1000>;
0299 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
0300 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
0301 #iommu-cells = <1>;
0302 status = "disabled";
0303 };
0304
0305 ipmmu_sy1: iommu@e6290000 {
0306 compatible = "renesas,ipmmu-r8a7794",
0307 "renesas,ipmmu-vmsa";
0308 reg = <0 0xe6290000 0 0x1000>;
0309 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
0310 #iommu-cells = <1>;
0311 status = "disabled";
0312 };
0313
0314 ipmmu_ds: iommu@e6740000 {
0315 compatible = "renesas,ipmmu-r8a7794",
0316 "renesas,ipmmu-vmsa";
0317 reg = <0 0xe6740000 0 0x1000>;
0318 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
0319 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
0320 #iommu-cells = <1>;
0321 status = "disabled";
0322 };
0323
0324 ipmmu_mp: iommu@ec680000 {
0325 compatible = "renesas,ipmmu-r8a7794",
0326 "renesas,ipmmu-vmsa";
0327 reg = <0 0xec680000 0 0x1000>;
0328 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
0329 #iommu-cells = <1>;
0330 status = "disabled";
0331 };
0332
0333 ipmmu_mx: iommu@fe951000 {
0334 compatible = "renesas,ipmmu-r8a7794",
0335 "renesas,ipmmu-vmsa";
0336 reg = <0 0xfe951000 0 0x1000>;
0337 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
0338 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
0339 #iommu-cells = <1>;
0340 status = "disabled";
0341 };
0342
0343 ipmmu_gp: iommu@e62a0000 {
0344 compatible = "renesas,ipmmu-r8a7794",
0345 "renesas,ipmmu-vmsa";
0346 reg = <0 0xe62a0000 0 0x1000>;
0347 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
0348 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
0349 #iommu-cells = <1>;
0350 status = "disabled";
0351 };
0352
0353 icram0: sram@e63a0000 {
0354 compatible = "mmio-sram";
0355 reg = <0 0xe63a0000 0 0x12000>;
0356 #address-cells = <1>;
0357 #size-cells = <1>;
0358 ranges = <0 0 0xe63a0000 0x12000>;
0359 };
0360
0361 icram1: sram@e63c0000 {
0362 compatible = "mmio-sram";
0363 reg = <0 0xe63c0000 0 0x1000>;
0364 #address-cells = <1>;
0365 #size-cells = <1>;
0366 ranges = <0 0 0xe63c0000 0x1000>;
0367
0368 smp-sram@0 {
0369 compatible = "renesas,smp-sram";
0370 reg = <0 0x100>;
0371 };
0372 };
0373
0374 /* The memory map in the User's Manual maps the cores to
0375 * bus numbers
0376 */
0377 i2c0: i2c@e6508000 {
0378 compatible = "renesas,i2c-r8a7794",
0379 "renesas,rcar-gen2-i2c";
0380 reg = <0 0xe6508000 0 0x40>;
0381 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
0382 clocks = <&cpg CPG_MOD 931>;
0383 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0384 resets = <&cpg 931>;
0385 #address-cells = <1>;
0386 #size-cells = <0>;
0387 i2c-scl-internal-delay-ns = <6>;
0388 status = "disabled";
0389 };
0390
0391 i2c1: i2c@e6518000 {
0392 compatible = "renesas,i2c-r8a7794",
0393 "renesas,rcar-gen2-i2c";
0394 reg = <0 0xe6518000 0 0x40>;
0395 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
0396 clocks = <&cpg CPG_MOD 930>;
0397 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0398 resets = <&cpg 930>;
0399 #address-cells = <1>;
0400 #size-cells = <0>;
0401 i2c-scl-internal-delay-ns = <6>;
0402 status = "disabled";
0403 };
0404
0405 i2c2: i2c@e6530000 {
0406 compatible = "renesas,i2c-r8a7794",
0407 "renesas,rcar-gen2-i2c";
0408 reg = <0 0xe6530000 0 0x40>;
0409 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
0410 clocks = <&cpg CPG_MOD 929>;
0411 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0412 resets = <&cpg 929>;
0413 #address-cells = <1>;
0414 #size-cells = <0>;
0415 i2c-scl-internal-delay-ns = <6>;
0416 status = "disabled";
0417 };
0418
0419 i2c3: i2c@e6540000 {
0420 compatible = "renesas,i2c-r8a7794",
0421 "renesas,rcar-gen2-i2c";
0422 reg = <0 0xe6540000 0 0x40>;
0423 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
0424 clocks = <&cpg CPG_MOD 928>;
0425 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0426 resets = <&cpg 928>;
0427 #address-cells = <1>;
0428 #size-cells = <0>;
0429 i2c-scl-internal-delay-ns = <6>;
0430 status = "disabled";
0431 };
0432
0433 i2c4: i2c@e6520000 {
0434 compatible = "renesas,i2c-r8a7794",
0435 "renesas,rcar-gen2-i2c";
0436 reg = <0 0xe6520000 0 0x40>;
0437 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
0438 clocks = <&cpg CPG_MOD 927>;
0439 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0440 resets = <&cpg 927>;
0441 #address-cells = <1>;
0442 #size-cells = <0>;
0443 i2c-scl-internal-delay-ns = <6>;
0444 status = "disabled";
0445 };
0446
0447 i2c5: i2c@e6528000 {
0448 compatible = "renesas,i2c-r8a7794",
0449 "renesas,rcar-gen2-i2c";
0450 reg = <0 0xe6528000 0 0x40>;
0451 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
0452 clocks = <&cpg CPG_MOD 925>;
0453 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0454 resets = <&cpg 925>;
0455 #address-cells = <1>;
0456 #size-cells = <0>;
0457 i2c-scl-internal-delay-ns = <6>;
0458 status = "disabled";
0459 };
0460
0461 i2c6: i2c@e6500000 {
0462 compatible = "renesas,iic-r8a7794",
0463 "renesas,rcar-gen2-iic",
0464 "renesas,rmobile-iic";
0465 reg = <0 0xe6500000 0 0x425>;
0466 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
0467 clocks = <&cpg CPG_MOD 318>;
0468 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
0469 <&dmac1 0x61>, <&dmac1 0x62>;
0470 dma-names = "tx", "rx", "tx", "rx";
0471 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0472 resets = <&cpg 318>;
0473 #address-cells = <1>;
0474 #size-cells = <0>;
0475 status = "disabled";
0476 };
0477
0478 i2c7: i2c@e6510000 {
0479 compatible = "renesas,iic-r8a7794",
0480 "renesas,rcar-gen2-iic",
0481 "renesas,rmobile-iic";
0482 reg = <0 0xe6510000 0 0x425>;
0483 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
0484 clocks = <&cpg CPG_MOD 323>;
0485 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
0486 <&dmac1 0x65>, <&dmac1 0x66>;
0487 dma-names = "tx", "rx", "tx", "rx";
0488 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0489 resets = <&cpg 323>;
0490 #address-cells = <1>;
0491 #size-cells = <0>;
0492 status = "disabled";
0493 };
0494
0495 hsusb: usb@e6590000 {
0496 compatible = "renesas,usbhs-r8a7794",
0497 "renesas,rcar-gen2-usbhs";
0498 reg = <0 0xe6590000 0 0x100>;
0499 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
0500 clocks = <&cpg CPG_MOD 704>;
0501 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0502 resets = <&cpg 704>;
0503 renesas,buswait = <4>;
0504 phys = <&usb0 1>;
0505 phy-names = "usb";
0506 status = "disabled";
0507 };
0508
0509 usbphy: usb-phy@e6590100 {
0510 compatible = "renesas,usb-phy-r8a7794",
0511 "renesas,rcar-gen2-usb-phy";
0512 reg = <0 0xe6590100 0 0x100>;
0513 #address-cells = <1>;
0514 #size-cells = <0>;
0515 clocks = <&cpg CPG_MOD 704>;
0516 clock-names = "usbhs";
0517 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0518 resets = <&cpg 704>;
0519 status = "disabled";
0520
0521 usb0: usb-channel@0 {
0522 reg = <0>;
0523 #phy-cells = <1>;
0524 };
0525 usb2: usb-channel@2 {
0526 reg = <2>;
0527 #phy-cells = <1>;
0528 };
0529 };
0530
0531 dmac0: dma-controller@e6700000 {
0532 compatible = "renesas,dmac-r8a7794",
0533 "renesas,rcar-dmac";
0534 reg = <0 0xe6700000 0 0x20000>;
0535 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
0536 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
0537 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
0538 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
0539 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
0540 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
0541 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
0542 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
0543 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
0544 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
0545 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
0546 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
0547 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
0548 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
0549 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
0550 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
0551 interrupt-names = "error",
0552 "ch0", "ch1", "ch2", "ch3",
0553 "ch4", "ch5", "ch6", "ch7",
0554 "ch8", "ch9", "ch10", "ch11",
0555 "ch12", "ch13", "ch14";
0556 clocks = <&cpg CPG_MOD 219>;
0557 clock-names = "fck";
0558 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0559 resets = <&cpg 219>;
0560 #dma-cells = <1>;
0561 dma-channels = <15>;
0562 };
0563
0564 dmac1: dma-controller@e6720000 {
0565 compatible = "renesas,dmac-r8a7794",
0566 "renesas,rcar-dmac";
0567 reg = <0 0xe6720000 0 0x20000>;
0568 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
0569 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
0570 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
0571 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
0572 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
0573 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
0574 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
0575 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
0576 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
0577 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
0578 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
0579 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
0580 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
0581 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
0582 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
0583 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
0584 interrupt-names = "error",
0585 "ch0", "ch1", "ch2", "ch3",
0586 "ch4", "ch5", "ch6", "ch7",
0587 "ch8", "ch9", "ch10", "ch11",
0588 "ch12", "ch13", "ch14";
0589 clocks = <&cpg CPG_MOD 218>;
0590 clock-names = "fck";
0591 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0592 resets = <&cpg 218>;
0593 #dma-cells = <1>;
0594 dma-channels = <15>;
0595 };
0596
0597 avb: ethernet@e6800000 {
0598 compatible = "renesas,etheravb-r8a7794",
0599 "renesas,etheravb-rcar-gen2";
0600 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
0601 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
0602 clocks = <&cpg CPG_MOD 812>;
0603 clock-names = "fck";
0604 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0605 resets = <&cpg 812>;
0606 #address-cells = <1>;
0607 #size-cells = <0>;
0608 status = "disabled";
0609 };
0610
0611 qspi: spi@e6b10000 {
0612 compatible = "renesas,qspi-r8a7794", "renesas,qspi";
0613 reg = <0 0xe6b10000 0 0x2c>;
0614 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
0615 clocks = <&cpg CPG_MOD 917>;
0616 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
0617 <&dmac1 0x17>, <&dmac1 0x18>;
0618 dma-names = "tx", "rx", "tx", "rx";
0619 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0620 resets = <&cpg 917>;
0621 num-cs = <1>;
0622 #address-cells = <1>;
0623 #size-cells = <0>;
0624 status = "disabled";
0625 };
0626
0627 scifa0: serial@e6c40000 {
0628 compatible = "renesas,scifa-r8a7794",
0629 "renesas,rcar-gen2-scifa", "renesas,scifa";
0630 reg = <0 0xe6c40000 0 64>;
0631 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
0632 clocks = <&cpg CPG_MOD 204>;
0633 clock-names = "fck";
0634 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
0635 <&dmac1 0x21>, <&dmac1 0x22>;
0636 dma-names = "tx", "rx", "tx", "rx";
0637 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0638 resets = <&cpg 204>;
0639 status = "disabled";
0640 };
0641
0642 scifa1: serial@e6c50000 {
0643 compatible = "renesas,scifa-r8a7794",
0644 "renesas,rcar-gen2-scifa", "renesas,scifa";
0645 reg = <0 0xe6c50000 0 64>;
0646 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
0647 clocks = <&cpg CPG_MOD 203>;
0648 clock-names = "fck";
0649 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
0650 <&dmac1 0x25>, <&dmac1 0x26>;
0651 dma-names = "tx", "rx", "tx", "rx";
0652 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0653 resets = <&cpg 203>;
0654 status = "disabled";
0655 };
0656
0657 scifa2: serial@e6c60000 {
0658 compatible = "renesas,scifa-r8a7794",
0659 "renesas,rcar-gen2-scifa", "renesas,scifa";
0660 reg = <0 0xe6c60000 0 64>;
0661 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
0662 clocks = <&cpg CPG_MOD 202>;
0663 clock-names = "fck";
0664 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
0665 <&dmac1 0x27>, <&dmac1 0x28>;
0666 dma-names = "tx", "rx", "tx", "rx";
0667 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0668 resets = <&cpg 202>;
0669 status = "disabled";
0670 };
0671
0672 scifa3: serial@e6c70000 {
0673 compatible = "renesas,scifa-r8a7794",
0674 "renesas,rcar-gen2-scifa", "renesas,scifa";
0675 reg = <0 0xe6c70000 0 64>;
0676 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
0677 clocks = <&cpg CPG_MOD 1106>;
0678 clock-names = "fck";
0679 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
0680 <&dmac1 0x1b>, <&dmac1 0x1c>;
0681 dma-names = "tx", "rx", "tx", "rx";
0682 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0683 resets = <&cpg 1106>;
0684 status = "disabled";
0685 };
0686
0687 scifa4: serial@e6c78000 {
0688 compatible = "renesas,scifa-r8a7794",
0689 "renesas,rcar-gen2-scifa", "renesas,scifa";
0690 reg = <0 0xe6c78000 0 64>;
0691 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
0692 clocks = <&cpg CPG_MOD 1107>;
0693 clock-names = "fck";
0694 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
0695 <&dmac1 0x1f>, <&dmac1 0x20>;
0696 dma-names = "tx", "rx", "tx", "rx";
0697 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0698 resets = <&cpg 1107>;
0699 status = "disabled";
0700 };
0701
0702 scifa5: serial@e6c80000 {
0703 compatible = "renesas,scifa-r8a7794",
0704 "renesas,rcar-gen2-scifa", "renesas,scifa";
0705 reg = <0 0xe6c80000 0 64>;
0706 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
0707 clocks = <&cpg CPG_MOD 1108>;
0708 clock-names = "fck";
0709 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
0710 <&dmac1 0x23>, <&dmac1 0x24>;
0711 dma-names = "tx", "rx", "tx", "rx";
0712 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0713 resets = <&cpg 1108>;
0714 status = "disabled";
0715 };
0716
0717 scifb0: serial@e6c20000 {
0718 compatible = "renesas,scifb-r8a7794",
0719 "renesas,rcar-gen2-scifb", "renesas,scifb";
0720 reg = <0 0xe6c20000 0 0x100>;
0721 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
0722 clocks = <&cpg CPG_MOD 206>;
0723 clock-names = "fck";
0724 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
0725 <&dmac1 0x3d>, <&dmac1 0x3e>;
0726 dma-names = "tx", "rx", "tx", "rx";
0727 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0728 resets = <&cpg 206>;
0729 status = "disabled";
0730 };
0731
0732 scifb1: serial@e6c30000 {
0733 compatible = "renesas,scifb-r8a7794",
0734 "renesas,rcar-gen2-scifb", "renesas,scifb";
0735 reg = <0 0xe6c30000 0 0x100>;
0736 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
0737 clocks = <&cpg CPG_MOD 207>;
0738 clock-names = "fck";
0739 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
0740 <&dmac1 0x19>, <&dmac1 0x1a>;
0741 dma-names = "tx", "rx", "tx", "rx";
0742 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0743 resets = <&cpg 207>;
0744 status = "disabled";
0745 };
0746
0747 scifb2: serial@e6ce0000 {
0748 compatible = "renesas,scifb-r8a7794",
0749 "renesas,rcar-gen2-scifb", "renesas,scifb";
0750 reg = <0 0xe6ce0000 0 0x100>;
0751 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
0752 clocks = <&cpg CPG_MOD 216>;
0753 clock-names = "fck";
0754 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
0755 <&dmac1 0x1d>, <&dmac1 0x1e>;
0756 dma-names = "tx", "rx", "tx", "rx";
0757 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0758 resets = <&cpg 216>;
0759 status = "disabled";
0760 };
0761
0762 scif0: serial@e6e60000 {
0763 compatible = "renesas,scif-r8a7794",
0764 "renesas,rcar-gen2-scif",
0765 "renesas,scif";
0766 reg = <0 0xe6e60000 0 64>;
0767 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
0768 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
0769 <&scif_clk>;
0770 clock-names = "fck", "brg_int", "scif_clk";
0771 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
0772 <&dmac1 0x29>, <&dmac1 0x2a>;
0773 dma-names = "tx", "rx", "tx", "rx";
0774 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0775 resets = <&cpg 721>;
0776 status = "disabled";
0777 };
0778
0779 scif1: serial@e6e68000 {
0780 compatible = "renesas,scif-r8a7794",
0781 "renesas,rcar-gen2-scif",
0782 "renesas,scif";
0783 reg = <0 0xe6e68000 0 64>;
0784 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
0785 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
0786 <&scif_clk>;
0787 clock-names = "fck", "brg_int", "scif_clk";
0788 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
0789 <&dmac1 0x2d>, <&dmac1 0x2e>;
0790 dma-names = "tx", "rx", "tx", "rx";
0791 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0792 resets = <&cpg 720>;
0793 status = "disabled";
0794 };
0795
0796 scif2: serial@e6e58000 {
0797 compatible = "renesas,scif-r8a7794",
0798 "renesas,rcar-gen2-scif", "renesas,scif";
0799 reg = <0 0xe6e58000 0 64>;
0800 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
0801 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
0802 <&scif_clk>;
0803 clock-names = "fck", "brg_int", "scif_clk";
0804 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
0805 <&dmac1 0x2b>, <&dmac1 0x2c>;
0806 dma-names = "tx", "rx", "tx", "rx";
0807 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0808 resets = <&cpg 719>;
0809 status = "disabled";
0810 };
0811
0812 scif3: serial@e6ea8000 {
0813 compatible = "renesas,scif-r8a7794",
0814 "renesas,rcar-gen2-scif", "renesas,scif";
0815 reg = <0 0xe6ea8000 0 64>;
0816 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
0817 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
0818 <&scif_clk>;
0819 clock-names = "fck", "brg_int", "scif_clk";
0820 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
0821 <&dmac1 0x2f>, <&dmac1 0x30>;
0822 dma-names = "tx", "rx", "tx", "rx";
0823 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0824 resets = <&cpg 718>;
0825 status = "disabled";
0826 };
0827
0828 scif4: serial@e6ee0000 {
0829 compatible = "renesas,scif-r8a7794",
0830 "renesas,rcar-gen2-scif", "renesas,scif";
0831 reg = <0 0xe6ee0000 0 64>;
0832 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
0833 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
0834 <&scif_clk>;
0835 clock-names = "fck", "brg_int", "scif_clk";
0836 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
0837 <&dmac1 0xfb>, <&dmac1 0xfc>;
0838 dma-names = "tx", "rx", "tx", "rx";
0839 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0840 resets = <&cpg 715>;
0841 status = "disabled";
0842 };
0843
0844 scif5: serial@e6ee8000 {
0845 compatible = "renesas,scif-r8a7794",
0846 "renesas,rcar-gen2-scif", "renesas,scif";
0847 reg = <0 0xe6ee8000 0 64>;
0848 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
0849 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
0850 <&scif_clk>;
0851 clock-names = "fck", "brg_int", "scif_clk";
0852 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
0853 <&dmac1 0xfd>, <&dmac1 0xfe>;
0854 dma-names = "tx", "rx", "tx", "rx";
0855 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0856 resets = <&cpg 714>;
0857 status = "disabled";
0858 };
0859
0860 hscif0: serial@e62c0000 {
0861 compatible = "renesas,hscif-r8a7794",
0862 "renesas,rcar-gen2-hscif", "renesas,hscif";
0863 reg = <0 0xe62c0000 0 96>;
0864 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
0865 clocks = <&cpg CPG_MOD 717>,
0866 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
0867 clock-names = "fck", "brg_int", "scif_clk";
0868 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
0869 <&dmac1 0x39>, <&dmac1 0x3a>;
0870 dma-names = "tx", "rx", "tx", "rx";
0871 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0872 resets = <&cpg 717>;
0873 status = "disabled";
0874 };
0875
0876 hscif1: serial@e62c8000 {
0877 compatible = "renesas,hscif-r8a7794",
0878 "renesas,rcar-gen2-hscif", "renesas,hscif";
0879 reg = <0 0xe62c8000 0 96>;
0880 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
0881 clocks = <&cpg CPG_MOD 716>,
0882 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
0883 clock-names = "fck", "brg_int", "scif_clk";
0884 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
0885 <&dmac1 0x4d>, <&dmac1 0x4e>;
0886 dma-names = "tx", "rx", "tx", "rx";
0887 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0888 resets = <&cpg 716>;
0889 status = "disabled";
0890 };
0891
0892 hscif2: serial@e62d0000 {
0893 compatible = "renesas,hscif-r8a7794",
0894 "renesas,rcar-gen2-hscif", "renesas,hscif";
0895 reg = <0 0xe62d0000 0 96>;
0896 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
0897 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
0898 <&scif_clk>;
0899 clock-names = "fck", "brg_int", "scif_clk";
0900 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
0901 <&dmac1 0x3b>, <&dmac1 0x3c>;
0902 dma-names = "tx", "rx", "tx", "rx";
0903 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0904 resets = <&cpg 713>;
0905 status = "disabled";
0906 };
0907
0908 can0: can@e6e80000 {
0909 compatible = "renesas,can-r8a7794",
0910 "renesas,rcar-gen2-can";
0911 reg = <0 0xe6e80000 0 0x1000>;
0912 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
0913 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
0914 <&can_clk>;
0915 clock-names = "clkp1", "clkp2", "can_clk";
0916 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0917 resets = <&cpg 916>;
0918 status = "disabled";
0919 };
0920
0921 can1: can@e6e88000 {
0922 compatible = "renesas,can-r8a7794",
0923 "renesas,rcar-gen2-can";
0924 reg = <0 0xe6e88000 0 0x1000>;
0925 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
0926 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
0927 <&can_clk>;
0928 clock-names = "clkp1", "clkp2", "can_clk";
0929 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0930 resets = <&cpg 915>;
0931 status = "disabled";
0932 };
0933
0934 vin0: video@e6ef0000 {
0935 compatible = "renesas,vin-r8a7794",
0936 "renesas,rcar-gen2-vin";
0937 reg = <0 0xe6ef0000 0 0x1000>;
0938 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
0939 clocks = <&cpg CPG_MOD 811>;
0940 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0941 resets = <&cpg 811>;
0942 status = "disabled";
0943 };
0944
0945 vin1: video@e6ef1000 {
0946 compatible = "renesas,vin-r8a7794",
0947 "renesas,rcar-gen2-vin";
0948 reg = <0 0xe6ef1000 0 0x1000>;
0949 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
0950 clocks = <&cpg CPG_MOD 810>;
0951 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0952 resets = <&cpg 810>;
0953 status = "disabled";
0954 };
0955
0956 rcar_sound: sound@ec500000 {
0957 /*
0958 * #sound-dai-cells is required
0959 *
0960 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
0961 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
0962 */
0963 compatible = "renesas,rcar_sound-r8a7794",
0964 "renesas,rcar_sound-gen2";
0965 reg = <0 0xec500000 0 0x1000>, /* SCU */
0966 <0 0xec5a0000 0 0x100>, /* ADG */
0967 <0 0xec540000 0 0x1000>, /* SSIU */
0968 <0 0xec541000 0 0x280>, /* SSI */
0969 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
0970 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
0971
0972 clocks = <&cpg CPG_MOD 1005>,
0973 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
0974 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
0975 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
0976 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
0977 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
0978 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
0979 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
0980 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
0981 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
0982 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
0983 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
0984 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
0985 <&cpg CPG_CORE R8A7794_CLK_M2>;
0986 clock-names = "ssi-all",
0987 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
0988 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
0989 "ssi.1", "ssi.0",
0990 "src.6", "src.5", "src.4", "src.3",
0991 "src.2", "src.1",
0992 "ctu.0", "ctu.1",
0993 "mix.0", "mix.1",
0994 "dvc.0", "dvc.1",
0995 "clk_a", "clk_b", "clk_c", "clk_i";
0996 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
0997 resets = <&cpg 1005>,
0998 <&cpg 1006>, <&cpg 1007>,
0999 <&cpg 1008>, <&cpg 1009>,
1000 <&cpg 1010>, <&cpg 1011>,
1001 <&cpg 1012>, <&cpg 1013>,
1002 <&cpg 1014>, <&cpg 1015>;
1003 reset-names = "ssi-all",
1004 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1005 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1006 "ssi.1", "ssi.0";
1007
1008 status = "disabled";
1009
1010 rcar_sound,dvc {
1011 dvc0: dvc-0 {
1012 dmas = <&audma0 0xbc>;
1013 dma-names = "tx";
1014 };
1015 dvc1: dvc-1 {
1016 dmas = <&audma0 0xbe>;
1017 dma-names = "tx";
1018 };
1019 };
1020
1021 rcar_sound,mix {
1022 mix0: mix-0 { };
1023 mix1: mix-1 { };
1024 };
1025
1026 rcar_sound,ctu {
1027 ctu00: ctu-0 { };
1028 ctu01: ctu-1 { };
1029 ctu02: ctu-2 { };
1030 ctu03: ctu-3 { };
1031 ctu10: ctu-4 { };
1032 ctu11: ctu-5 { };
1033 ctu12: ctu-6 { };
1034 ctu13: ctu-7 { };
1035 };
1036
1037 rcar_sound,src {
1038 src-0 {
1039 status = "disabled";
1040 };
1041 src1: src-1 {
1042 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1043 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1044 dma-names = "rx", "tx";
1045 };
1046 src2: src-2 {
1047 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1048 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1049 dma-names = "rx", "tx";
1050 };
1051 src3: src-3 {
1052 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1053 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1054 dma-names = "rx", "tx";
1055 };
1056 src4: src-4 {
1057 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1058 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1059 dma-names = "rx", "tx";
1060 };
1061 src5: src-5 {
1062 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1063 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1064 dma-names = "rx", "tx";
1065 };
1066 src6: src-6 {
1067 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1068 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1069 dma-names = "rx", "tx";
1070 };
1071 };
1072
1073 rcar_sound,ssi {
1074 ssi0: ssi-0 {
1075 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1076 dmas = <&audma0 0x01>, <&audma0 0x02>,
1077 <&audma0 0x15>, <&audma0 0x16>;
1078 dma-names = "rx", "tx", "rxu", "txu";
1079 };
1080 ssi1: ssi-1 {
1081 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1082 dmas = <&audma0 0x03>, <&audma0 0x04>,
1083 <&audma0 0x49>, <&audma0 0x4a>;
1084 dma-names = "rx", "tx", "rxu", "txu";
1085 };
1086 ssi2: ssi-2 {
1087 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1088 dmas = <&audma0 0x05>, <&audma0 0x06>,
1089 <&audma0 0x63>, <&audma0 0x64>;
1090 dma-names = "rx", "tx", "rxu", "txu";
1091 };
1092 ssi3: ssi-3 {
1093 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1094 dmas = <&audma0 0x07>, <&audma0 0x08>,
1095 <&audma0 0x6f>, <&audma0 0x70>;
1096 dma-names = "rx", "tx", "rxu", "txu";
1097 };
1098 ssi4: ssi-4 {
1099 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1100 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1101 <&audma0 0x71>, <&audma0 0x72>;
1102 dma-names = "rx", "tx", "rxu", "txu";
1103 };
1104 ssi5: ssi-5 {
1105 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1106 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1107 <&audma0 0x73>, <&audma0 0x74>;
1108 dma-names = "rx", "tx", "rxu", "txu";
1109 };
1110 ssi6: ssi-6 {
1111 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1112 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1113 <&audma0 0x75>, <&audma0 0x76>;
1114 dma-names = "rx", "tx", "rxu", "txu";
1115 };
1116 ssi7: ssi-7 {
1117 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1118 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1119 <&audma0 0x79>, <&audma0 0x7a>;
1120 dma-names = "rx", "tx", "rxu", "txu";
1121 };
1122 ssi8: ssi-8 {
1123 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1124 dmas = <&audma0 0x11>, <&audma0 0x12>,
1125 <&audma0 0x7b>, <&audma0 0x7c>;
1126 dma-names = "rx", "tx", "rxu", "txu";
1127 };
1128 ssi9: ssi-9 {
1129 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1130 dmas = <&audma0 0x13>, <&audma0 0x14>,
1131 <&audma0 0x7d>, <&audma0 0x7e>;
1132 dma-names = "rx", "tx", "rxu", "txu";
1133 };
1134 };
1135 };
1136
1137 audma0: dma-controller@ec700000 {
1138 compatible = "renesas,dmac-r8a7794",
1139 "renesas,rcar-dmac";
1140 reg = <0 0xec700000 0 0x10000>;
1141 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1142 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1143 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1144 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1145 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1146 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1147 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1148 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1149 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1150 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1151 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1152 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1153 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1154 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1155 interrupt-names = "error",
1156 "ch0", "ch1", "ch2", "ch3", "ch4",
1157 "ch5", "ch6", "ch7", "ch8", "ch9",
1158 "ch10", "ch11",
1159 "ch12";
1160 clocks = <&cpg CPG_MOD 502>;
1161 clock-names = "fck";
1162 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1163 resets = <&cpg 502>;
1164 #dma-cells = <1>;
1165 dma-channels = <13>;
1166 };
1167
1168 pci0: pci@ee090000 {
1169 compatible = "renesas,pci-r8a7794",
1170 "renesas,pci-rcar-gen2";
1171 device_type = "pci";
1172 reg = <0 0xee090000 0 0xc00>,
1173 <0 0xee080000 0 0x1100>;
1174 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1175 clocks = <&cpg CPG_MOD 703>;
1176 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1177 resets = <&cpg 703>;
1178 status = "disabled";
1179
1180 bus-range = <0 0>;
1181 #address-cells = <3>;
1182 #size-cells = <2>;
1183 #interrupt-cells = <1>;
1184 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1185 interrupt-map-mask = <0xf800 0 0 0x7>;
1186 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1187 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1188 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1189
1190 usb@1,0 {
1191 reg = <0x800 0 0 0 0>;
1192 phys = <&usb0 0>;
1193 phy-names = "usb";
1194 };
1195
1196 usb@2,0 {
1197 reg = <0x1000 0 0 0 0>;
1198 phys = <&usb0 0>;
1199 phy-names = "usb";
1200 };
1201 };
1202
1203 pci1: pci@ee0d0000 {
1204 compatible = "renesas,pci-r8a7794",
1205 "renesas,pci-rcar-gen2";
1206 device_type = "pci";
1207 reg = <0 0xee0d0000 0 0xc00>,
1208 <0 0xee0c0000 0 0x1100>;
1209 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MOD 703>;
1211 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1212 resets = <&cpg 703>;
1213 status = "disabled";
1214
1215 bus-range = <1 1>;
1216 #address-cells = <3>;
1217 #size-cells = <2>;
1218 #interrupt-cells = <1>;
1219 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1220 interrupt-map-mask = <0xf800 0 0 0x7>;
1221 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1222 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1223 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1224
1225 usb@1,0 {
1226 reg = <0x10800 0 0 0 0>;
1227 phys = <&usb2 0>;
1228 phy-names = "usb";
1229 };
1230
1231 usb@2,0 {
1232 reg = <0x11000 0 0 0 0>;
1233 phys = <&usb2 0>;
1234 phy-names = "usb";
1235 };
1236 };
1237
1238 sdhi0: mmc@ee100000 {
1239 compatible = "renesas,sdhi-r8a7794",
1240 "renesas,rcar-gen2-sdhi";
1241 reg = <0 0xee100000 0 0x328>;
1242 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1243 clocks = <&cpg CPG_MOD 314>;
1244 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1245 <&dmac1 0xcd>, <&dmac1 0xce>;
1246 dma-names = "tx", "rx", "tx", "rx";
1247 max-frequency = <195000000>;
1248 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1249 resets = <&cpg 314>;
1250 status = "disabled";
1251 };
1252
1253 sdhi1: mmc@ee140000 {
1254 compatible = "renesas,sdhi-r8a7794",
1255 "renesas,rcar-gen2-sdhi";
1256 reg = <0 0xee140000 0 0x100>;
1257 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1258 clocks = <&cpg CPG_MOD 312>;
1259 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1260 <&dmac1 0xc1>, <&dmac1 0xc2>;
1261 dma-names = "tx", "rx", "tx", "rx";
1262 max-frequency = <97500000>;
1263 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1264 resets = <&cpg 312>;
1265 status = "disabled";
1266 };
1267
1268 sdhi2: mmc@ee160000 {
1269 compatible = "renesas,sdhi-r8a7794",
1270 "renesas,rcar-gen2-sdhi";
1271 reg = <0 0xee160000 0 0x100>;
1272 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1273 clocks = <&cpg CPG_MOD 311>;
1274 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1275 <&dmac1 0xd3>, <&dmac1 0xd4>;
1276 dma-names = "tx", "rx", "tx", "rx";
1277 max-frequency = <97500000>;
1278 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1279 resets = <&cpg 311>;
1280 status = "disabled";
1281 };
1282
1283 mmcif0: mmc@ee200000 {
1284 compatible = "renesas,mmcif-r8a7794",
1285 "renesas,sh-mmcif";
1286 reg = <0 0xee200000 0 0x80>;
1287 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1288 clocks = <&cpg CPG_MOD 315>;
1289 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1290 <&dmac1 0xd1>, <&dmac1 0xd2>;
1291 dma-names = "tx", "rx", "tx", "rx";
1292 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1293 resets = <&cpg 315>;
1294 reg-io-width = <4>;
1295 status = "disabled";
1296 };
1297
1298 ether: ethernet@ee700000 {
1299 compatible = "renesas,ether-r8a7794",
1300 "renesas,rcar-gen2-ether";
1301 reg = <0 0xee700000 0 0x400>;
1302 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1303 clocks = <&cpg CPG_MOD 813>;
1304 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1305 resets = <&cpg 813>;
1306 phy-mode = "rmii";
1307 #address-cells = <1>;
1308 #size-cells = <0>;
1309 status = "disabled";
1310 };
1311
1312 gic: interrupt-controller@f1001000 {
1313 compatible = "arm,gic-400";
1314 #interrupt-cells = <3>;
1315 #address-cells = <0>;
1316 interrupt-controller;
1317 reg = <0 0xf1001000 0 0x1000>,
1318 <0 0xf1002000 0 0x2000>,
1319 <0 0xf1004000 0 0x2000>,
1320 <0 0xf1006000 0 0x2000>;
1321 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1322 clocks = <&cpg CPG_MOD 408>;
1323 clock-names = "clk";
1324 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1325 resets = <&cpg 408>;
1326 };
1327
1328 vsp@fe928000 {
1329 compatible = "renesas,vsp1";
1330 reg = <0 0xfe928000 0 0x8000>;
1331 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1332 clocks = <&cpg CPG_MOD 131>;
1333 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1334 resets = <&cpg 131>;
1335 };
1336
1337 vsp@fe930000 {
1338 compatible = "renesas,vsp1";
1339 reg = <0 0xfe930000 0 0x8000>;
1340 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1341 clocks = <&cpg CPG_MOD 128>;
1342 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1343 resets = <&cpg 128>;
1344 };
1345
1346 fdp1@fe940000 {
1347 compatible = "renesas,fdp1";
1348 reg = <0 0xfe940000 0 0x2400>;
1349 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1350 clocks = <&cpg CPG_MOD 119>;
1351 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1352 resets = <&cpg 119>;
1353 };
1354
1355 du: display@feb00000 {
1356 compatible = "renesas,du-r8a7794";
1357 reg = <0 0xfeb00000 0 0x40000>;
1358 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1359 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1360 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1361 clock-names = "du.0", "du.1";
1362 resets = <&cpg 724>;
1363 reset-names = "du.0";
1364 status = "disabled";
1365
1366 ports {
1367 #address-cells = <1>;
1368 #size-cells = <0>;
1369
1370 port@0 {
1371 reg = <0>;
1372 du_out_rgb0: endpoint {
1373 };
1374 };
1375 port@1 {
1376 reg = <1>;
1377 du_out_rgb1: endpoint {
1378 };
1379 };
1380 };
1381 };
1382
1383 prr: chipid@ff000044 {
1384 compatible = "renesas,prr";
1385 reg = <0 0xff000044 0 4>;
1386 };
1387
1388 cmt0: timer@ffca0000 {
1389 compatible = "renesas,r8a7794-cmt0",
1390 "renesas,rcar-gen2-cmt0";
1391 reg = <0 0xffca0000 0 0x1004>;
1392 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1393 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1394 clocks = <&cpg CPG_MOD 124>;
1395 clock-names = "fck";
1396 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1397 resets = <&cpg 124>;
1398
1399 status = "disabled";
1400 };
1401
1402 cmt1: timer@e6130000 {
1403 compatible = "renesas,r8a7794-cmt1",
1404 "renesas,rcar-gen2-cmt1";
1405 reg = <0 0xe6130000 0 0x1004>;
1406 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1407 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1408 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1409 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1410 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1411 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1412 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1413 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1414 clocks = <&cpg CPG_MOD 329>;
1415 clock-names = "fck";
1416 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1417 resets = <&cpg 329>;
1418
1419 status = "disabled";
1420 };
1421 };
1422
1423 timer {
1424 compatible = "arm,armv7-timer";
1425 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1426 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1427 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1428 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1429 };
1430
1431 /* External USB clock - can be overridden by the board */
1432 usb_extal_clk: usb_extal {
1433 compatible = "fixed-clock";
1434 #clock-cells = <0>;
1435 clock-frequency = <48000000>;
1436 };
1437 };
