0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the R-Car M2-N (R8A77930) SoC
0004 *
0005 * Copyright (C) 2014-2015 Renesas Electronics Corporation
0006 */
0007
0008 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
0009 #include <dt-bindings/interrupt-controller/arm-gic.h>
0010 #include <dt-bindings/interrupt-controller/irq.h>
0011 #include <dt-bindings/power/r8a7793-sysc.h>
0012
0013 / {
0014 compatible = "renesas,r8a7793";
0015 #address-cells = <2>;
0016 #size-cells = <2>;
0017
0018 aliases {
0019 i2c0 = &i2c0;
0020 i2c1 = &i2c1;
0021 i2c2 = &i2c2;
0022 i2c3 = &i2c3;
0023 i2c4 = &i2c4;
0024 i2c5 = &i2c5;
0025 i2c6 = &i2c6;
0026 i2c7 = &i2c7;
0027 i2c8 = &i2c8;
0028 spi0 = &qspi;
0029 };
0030
0031 /*
0032 * The external audio clocks are configured as 0 Hz fixed frequency
0033 * clocks by default.
0034 * Boards that provide audio clocks should override them.
0035 */
0036 audio_clk_a: audio_clk_a {
0037 compatible = "fixed-clock";
0038 #clock-cells = <0>;
0039 clock-frequency = <0>;
0040 };
0041 audio_clk_b: audio_clk_b {
0042 compatible = "fixed-clock";
0043 #clock-cells = <0>;
0044 clock-frequency = <0>;
0045 };
0046 audio_clk_c: audio_clk_c {
0047 compatible = "fixed-clock";
0048 #clock-cells = <0>;
0049 clock-frequency = <0>;
0050 };
0051
0052 /* External CAN clock */
0053 can_clk: can {
0054 compatible = "fixed-clock";
0055 #clock-cells = <0>;
0056 /* This value must be overridden by the board. */
0057 clock-frequency = <0>;
0058 };
0059
0060 cpus {
0061 #address-cells = <1>;
0062 #size-cells = <0>;
0063
0064 cpu0: cpu@0 {
0065 device_type = "cpu";
0066 compatible = "arm,cortex-a15";
0067 reg = <0>;
0068 clock-frequency = <1500000000>;
0069 clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
0070 power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
0071 enable-method = "renesas,apmu";
0072 voltage-tolerance = <1>; /* 1% */
0073 clock-latency = <300000>; /* 300 us */
0074
0075 /* kHz - uV - OPPs unknown yet */
0076 operating-points = <1500000 1000000>,
0077 <1312500 1000000>,
0078 <1125000 1000000>,
0079 < 937500 1000000>,
0080 < 750000 1000000>,
0081 < 375000 1000000>;
0082 next-level-cache = <&L2_CA15>;
0083 };
0084
0085 cpu1: cpu@1 {
0086 device_type = "cpu";
0087 compatible = "arm,cortex-a15";
0088 reg = <1>;
0089 clock-frequency = <1500000000>;
0090 clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
0091 power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
0092 enable-method = "renesas,apmu";
0093 voltage-tolerance = <1>; /* 1% */
0094 clock-latency = <300000>; /* 300 us */
0095
0096 /* kHz - uV - OPPs unknown yet */
0097 operating-points = <1500000 1000000>,
0098 <1312500 1000000>,
0099 <1125000 1000000>,
0100 < 937500 1000000>,
0101 < 750000 1000000>,
0102 < 375000 1000000>;
0103 next-level-cache = <&L2_CA15>;
0104 };
0105
0106 L2_CA15: cache-controller-0 {
0107 compatible = "cache";
0108 power-domains = <&sysc R8A7793_PD_CA15_SCU>;
0109 cache-unified;
0110 cache-level = <2>;
0111 };
0112 };
0113
0114 /* External root clock */
0115 extal_clk: extal {
0116 compatible = "fixed-clock";
0117 #clock-cells = <0>;
0118 /* This value must be overridden by the board. */
0119 clock-frequency = <0>;
0120 };
0121
0122 pmu {
0123 compatible = "arm,cortex-a15-pmu";
0124 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
0125 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
0126 interrupt-affinity = <&cpu0>, <&cpu1>;
0127 };
0128
0129 /* External SCIF clock */
0130 scif_clk: scif {
0131 compatible = "fixed-clock";
0132 #clock-cells = <0>;
0133 /* This value must be overridden by the board. */
0134 clock-frequency = <0>;
0135 };
0136
0137 soc {
0138 compatible = "simple-bus";
0139 interrupt-parent = <&gic>;
0140
0141 #address-cells = <2>;
0142 #size-cells = <2>;
0143 ranges;
0144
0145 rwdt: watchdog@e6020000 {
0146 compatible = "renesas,r8a7793-wdt",
0147 "renesas,rcar-gen2-wdt";
0148 reg = <0 0xe6020000 0 0x0c>;
0149 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
0150 clocks = <&cpg CPG_MOD 402>;
0151 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0152 resets = <&cpg 402>;
0153 status = "disabled";
0154 };
0155
0156 gpio0: gpio@e6050000 {
0157 compatible = "renesas,gpio-r8a7793",
0158 "renesas,rcar-gen2-gpio";
0159 reg = <0 0xe6050000 0 0x50>;
0160 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0161 #gpio-cells = <2>;
0162 gpio-controller;
0163 gpio-ranges = <&pfc 0 0 32>;
0164 #interrupt-cells = <2>;
0165 interrupt-controller;
0166 clocks = <&cpg CPG_MOD 912>;
0167 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0168 resets = <&cpg 912>;
0169 };
0170
0171 gpio1: gpio@e6051000 {
0172 compatible = "renesas,gpio-r8a7793",
0173 "renesas,rcar-gen2-gpio";
0174 reg = <0 0xe6051000 0 0x50>;
0175 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
0176 #gpio-cells = <2>;
0177 gpio-controller;
0178 gpio-ranges = <&pfc 0 32 26>;
0179 #interrupt-cells = <2>;
0180 interrupt-controller;
0181 clocks = <&cpg CPG_MOD 911>;
0182 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0183 resets = <&cpg 911>;
0184 };
0185
0186 gpio2: gpio@e6052000 {
0187 compatible = "renesas,gpio-r8a7793",
0188 "renesas,rcar-gen2-gpio";
0189 reg = <0 0xe6052000 0 0x50>;
0190 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
0191 #gpio-cells = <2>;
0192 gpio-controller;
0193 gpio-ranges = <&pfc 0 64 32>;
0194 #interrupt-cells = <2>;
0195 interrupt-controller;
0196 clocks = <&cpg CPG_MOD 910>;
0197 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0198 resets = <&cpg 910>;
0199 };
0200
0201 gpio3: gpio@e6053000 {
0202 compatible = "renesas,gpio-r8a7793",
0203 "renesas,rcar-gen2-gpio";
0204 reg = <0 0xe6053000 0 0x50>;
0205 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0206 #gpio-cells = <2>;
0207 gpio-controller;
0208 gpio-ranges = <&pfc 0 96 32>;
0209 #interrupt-cells = <2>;
0210 interrupt-controller;
0211 clocks = <&cpg CPG_MOD 909>;
0212 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0213 resets = <&cpg 909>;
0214 };
0215
0216 gpio4: gpio@e6054000 {
0217 compatible = "renesas,gpio-r8a7793",
0218 "renesas,rcar-gen2-gpio";
0219 reg = <0 0xe6054000 0 0x50>;
0220 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0221 #gpio-cells = <2>;
0222 gpio-controller;
0223 gpio-ranges = <&pfc 0 128 32>;
0224 #interrupt-cells = <2>;
0225 interrupt-controller;
0226 clocks = <&cpg CPG_MOD 908>;
0227 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0228 resets = <&cpg 908>;
0229 };
0230
0231 gpio5: gpio@e6055000 {
0232 compatible = "renesas,gpio-r8a7793",
0233 "renesas,rcar-gen2-gpio";
0234 reg = <0 0xe6055000 0 0x50>;
0235 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
0236 #gpio-cells = <2>;
0237 gpio-controller;
0238 gpio-ranges = <&pfc 0 160 32>;
0239 #interrupt-cells = <2>;
0240 interrupt-controller;
0241 clocks = <&cpg CPG_MOD 907>;
0242 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0243 resets = <&cpg 907>;
0244 };
0245
0246 gpio6: gpio@e6055400 {
0247 compatible = "renesas,gpio-r8a7793",
0248 "renesas,rcar-gen2-gpio";
0249 reg = <0 0xe6055400 0 0x50>;
0250 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
0251 #gpio-cells = <2>;
0252 gpio-controller;
0253 gpio-ranges = <&pfc 0 192 32>;
0254 #interrupt-cells = <2>;
0255 interrupt-controller;
0256 clocks = <&cpg CPG_MOD 905>;
0257 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0258 resets = <&cpg 905>;
0259 };
0260
0261 gpio7: gpio@e6055800 {
0262 compatible = "renesas,gpio-r8a7793",
0263 "renesas,rcar-gen2-gpio";
0264 reg = <0 0xe6055800 0 0x50>;
0265 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
0266 #gpio-cells = <2>;
0267 gpio-controller;
0268 gpio-ranges = <&pfc 0 224 26>;
0269 #interrupt-cells = <2>;
0270 interrupt-controller;
0271 clocks = <&cpg CPG_MOD 904>;
0272 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0273 resets = <&cpg 904>;
0274 };
0275
0276 pfc: pinctrl@e6060000 {
0277 compatible = "renesas,pfc-r8a7793";
0278 reg = <0 0xe6060000 0 0x250>;
0279 };
0280
0281 /* Special CPG clocks */
0282 cpg: clock-controller@e6150000 {
0283 compatible = "renesas,r8a7793-cpg-mssr";
0284 reg = <0 0xe6150000 0 0x1000>;
0285 clocks = <&extal_clk>, <&usb_extal_clk>;
0286 clock-names = "extal", "usb_extal";
0287 #clock-cells = <2>;
0288 #power-domain-cells = <0>;
0289 #reset-cells = <1>;
0290 };
0291
0292 apmu@e6152000 {
0293 compatible = "renesas,r8a7793-apmu", "renesas,apmu";
0294 reg = <0 0xe6152000 0 0x188>;
0295 cpus = <&cpu0>, <&cpu1>;
0296 };
0297
0298 rst: reset-controller@e6160000 {
0299 compatible = "renesas,r8a7793-rst";
0300 reg = <0 0xe6160000 0 0x0100>;
0301 };
0302
0303 sysc: system-controller@e6180000 {
0304 compatible = "renesas,r8a7793-sysc";
0305 reg = <0 0xe6180000 0 0x0200>;
0306 #power-domain-cells = <1>;
0307 };
0308
0309 irqc0: interrupt-controller@e61c0000 {
0310 compatible = "renesas,irqc-r8a7793", "renesas,irqc";
0311 #interrupt-cells = <2>;
0312 interrupt-controller;
0313 reg = <0 0xe61c0000 0 0x200>;
0314 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
0315 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
0316 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
0317 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
0318 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
0319 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
0320 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
0321 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
0322 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
0323 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
0324 clocks = <&cpg CPG_MOD 407>;
0325 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0326 resets = <&cpg 407>;
0327 };
0328
0329 thermal: thermal@e61f0000 {
0330 compatible = "renesas,thermal-r8a7793",
0331 "renesas,rcar-gen2-thermal",
0332 "renesas,rcar-thermal";
0333 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
0334 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
0335 clocks = <&cpg CPG_MOD 522>;
0336 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0337 resets = <&cpg 522>;
0338 #thermal-sensor-cells = <0>;
0339 };
0340
0341 ipmmu_sy0: iommu@e6280000 {
0342 compatible = "renesas,ipmmu-r8a7793",
0343 "renesas,ipmmu-vmsa";
0344 reg = <0 0xe6280000 0 0x1000>;
0345 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
0346 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
0347 #iommu-cells = <1>;
0348 status = "disabled";
0349 };
0350
0351 ipmmu_sy1: iommu@e6290000 {
0352 compatible = "renesas,ipmmu-r8a7793",
0353 "renesas,ipmmu-vmsa";
0354 reg = <0 0xe6290000 0 0x1000>;
0355 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
0356 #iommu-cells = <1>;
0357 status = "disabled";
0358 };
0359
0360 ipmmu_ds: iommu@e6740000 {
0361 compatible = "renesas,ipmmu-r8a7793",
0362 "renesas,ipmmu-vmsa";
0363 reg = <0 0xe6740000 0 0x1000>;
0364 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
0365 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
0366 #iommu-cells = <1>;
0367 status = "disabled";
0368 };
0369
0370 ipmmu_mp: iommu@ec680000 {
0371 compatible = "renesas,ipmmu-r8a7793",
0372 "renesas,ipmmu-vmsa";
0373 reg = <0 0xec680000 0 0x1000>;
0374 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
0375 #iommu-cells = <1>;
0376 status = "disabled";
0377 };
0378
0379 ipmmu_mx: iommu@fe951000 {
0380 compatible = "renesas,ipmmu-r8a7793",
0381 "renesas,ipmmu-vmsa";
0382 reg = <0 0xfe951000 0 0x1000>;
0383 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
0384 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
0385 #iommu-cells = <1>;
0386 status = "disabled";
0387 };
0388
0389 ipmmu_rt: iommu@ffc80000 {
0390 compatible = "renesas,ipmmu-r8a7793",
0391 "renesas,ipmmu-vmsa";
0392 reg = <0 0xffc80000 0 0x1000>;
0393 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
0394 #iommu-cells = <1>;
0395 status = "disabled";
0396 };
0397
0398 ipmmu_gp: iommu@e62a0000 {
0399 compatible = "renesas,ipmmu-r8a7793",
0400 "renesas,ipmmu-vmsa";
0401 reg = <0 0xe62a0000 0 0x1000>;
0402 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
0403 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
0404 #iommu-cells = <1>;
0405 status = "disabled";
0406 };
0407
0408 icram0: sram@e63a0000 {
0409 compatible = "mmio-sram";
0410 reg = <0 0xe63a0000 0 0x12000>;
0411 #address-cells = <1>;
0412 #size-cells = <1>;
0413 ranges = <0 0 0xe63a0000 0x12000>;
0414 };
0415
0416 icram1: sram@e63c0000 {
0417 compatible = "mmio-sram";
0418 reg = <0 0xe63c0000 0 0x1000>;
0419 #address-cells = <1>;
0420 #size-cells = <1>;
0421 ranges = <0 0 0xe63c0000 0x1000>;
0422
0423 smp-sram@0 {
0424 compatible = "renesas,smp-sram";
0425 reg = <0 0x100>;
0426 };
0427 };
0428
0429 /* The memory map in the User's Manual maps the cores to
0430 * bus numbers
0431 */
0432 i2c0: i2c@e6508000 {
0433 #address-cells = <1>;
0434 #size-cells = <0>;
0435 compatible = "renesas,i2c-r8a7793",
0436 "renesas,rcar-gen2-i2c";
0437 reg = <0 0xe6508000 0 0x40>;
0438 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
0439 clocks = <&cpg CPG_MOD 931>;
0440 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0441 resets = <&cpg 931>;
0442 i2c-scl-internal-delay-ns = <6>;
0443 status = "disabled";
0444 };
0445
0446 i2c1: i2c@e6518000 {
0447 #address-cells = <1>;
0448 #size-cells = <0>;
0449 compatible = "renesas,i2c-r8a7793",
0450 "renesas,rcar-gen2-i2c";
0451 reg = <0 0xe6518000 0 0x40>;
0452 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
0453 clocks = <&cpg CPG_MOD 930>;
0454 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0455 resets = <&cpg 930>;
0456 i2c-scl-internal-delay-ns = <6>;
0457 status = "disabled";
0458 };
0459
0460 i2c2: i2c@e6530000 {
0461 #address-cells = <1>;
0462 #size-cells = <0>;
0463 compatible = "renesas,i2c-r8a7793",
0464 "renesas,rcar-gen2-i2c";
0465 reg = <0 0xe6530000 0 0x40>;
0466 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
0467 clocks = <&cpg CPG_MOD 929>;
0468 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0469 resets = <&cpg 929>;
0470 i2c-scl-internal-delay-ns = <6>;
0471 status = "disabled";
0472 };
0473
0474 i2c3: i2c@e6540000 {
0475 #address-cells = <1>;
0476 #size-cells = <0>;
0477 compatible = "renesas,i2c-r8a7793",
0478 "renesas,rcar-gen2-i2c";
0479 reg = <0 0xe6540000 0 0x40>;
0480 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
0481 clocks = <&cpg CPG_MOD 928>;
0482 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0483 resets = <&cpg 928>;
0484 i2c-scl-internal-delay-ns = <6>;
0485 status = "disabled";
0486 };
0487
0488 i2c4: i2c@e6520000 {
0489 #address-cells = <1>;
0490 #size-cells = <0>;
0491 compatible = "renesas,i2c-r8a7793",
0492 "renesas,rcar-gen2-i2c";
0493 reg = <0 0xe6520000 0 0x40>;
0494 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
0495 clocks = <&cpg CPG_MOD 927>;
0496 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0497 resets = <&cpg 927>;
0498 i2c-scl-internal-delay-ns = <6>;
0499 status = "disabled";
0500 };
0501
0502 i2c5: i2c@e6528000 {
0503 /* doesn't need pinmux */
0504 #address-cells = <1>;
0505 #size-cells = <0>;
0506 compatible = "renesas,i2c-r8a7793",
0507 "renesas,rcar-gen2-i2c";
0508 reg = <0 0xe6528000 0 0x40>;
0509 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
0510 clocks = <&cpg CPG_MOD 925>;
0511 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0512 resets = <&cpg 925>;
0513 i2c-scl-internal-delay-ns = <110>;
0514 status = "disabled";
0515 };
0516
0517 i2c6: i2c@e60b0000 {
0518 /* doesn't need pinmux */
0519 #address-cells = <1>;
0520 #size-cells = <0>;
0521 compatible = "renesas,iic-r8a7793",
0522 "renesas,rcar-gen2-iic",
0523 "renesas,rmobile-iic";
0524 reg = <0 0xe60b0000 0 0x425>;
0525 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
0526 clocks = <&cpg CPG_MOD 926>;
0527 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
0528 <&dmac1 0x77>, <&dmac1 0x78>;
0529 dma-names = "tx", "rx", "tx", "rx";
0530 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0531 resets = <&cpg 926>;
0532 status = "disabled";
0533 };
0534
0535 i2c7: i2c@e6500000 {
0536 #address-cells = <1>;
0537 #size-cells = <0>;
0538 compatible = "renesas,iic-r8a7793",
0539 "renesas,rcar-gen2-iic",
0540 "renesas,rmobile-iic";
0541 reg = <0 0xe6500000 0 0x425>;
0542 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
0543 clocks = <&cpg CPG_MOD 318>;
0544 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
0545 <&dmac1 0x61>, <&dmac1 0x62>;
0546 dma-names = "tx", "rx", "tx", "rx";
0547 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0548 resets = <&cpg 318>;
0549 status = "disabled";
0550 };
0551
0552 i2c8: i2c@e6510000 {
0553 #address-cells = <1>;
0554 #size-cells = <0>;
0555 compatible = "renesas,iic-r8a7793",
0556 "renesas,rcar-gen2-iic",
0557 "renesas,rmobile-iic";
0558 reg = <0 0xe6510000 0 0x425>;
0559 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
0560 clocks = <&cpg CPG_MOD 323>;
0561 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
0562 <&dmac1 0x65>, <&dmac1 0x66>;
0563 dma-names = "tx", "rx", "tx", "rx";
0564 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0565 resets = <&cpg 323>;
0566 status = "disabled";
0567 };
0568
0569 dmac0: dma-controller@e6700000 {
0570 compatible = "renesas,dmac-r8a7793",
0571 "renesas,rcar-dmac";
0572 reg = <0 0xe6700000 0 0x20000>;
0573 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
0574 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
0575 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
0576 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
0577 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
0578 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
0579 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
0580 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
0581 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
0582 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
0583 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
0584 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
0585 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
0586 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
0587 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
0588 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
0589 interrupt-names = "error",
0590 "ch0", "ch1", "ch2", "ch3",
0591 "ch4", "ch5", "ch6", "ch7",
0592 "ch8", "ch9", "ch10", "ch11",
0593 "ch12", "ch13", "ch14";
0594 clocks = <&cpg CPG_MOD 219>;
0595 clock-names = "fck";
0596 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0597 resets = <&cpg 219>;
0598 #dma-cells = <1>;
0599 dma-channels = <15>;
0600 };
0601
0602 dmac1: dma-controller@e6720000 {
0603 compatible = "renesas,dmac-r8a7793",
0604 "renesas,rcar-dmac";
0605 reg = <0 0xe6720000 0 0x20000>;
0606 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
0607 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
0608 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
0609 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
0610 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
0611 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
0612 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
0613 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
0614 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
0615 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
0616 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
0617 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
0618 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
0619 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
0620 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
0621 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
0622 interrupt-names = "error",
0623 "ch0", "ch1", "ch2", "ch3",
0624 "ch4", "ch5", "ch6", "ch7",
0625 "ch8", "ch9", "ch10", "ch11",
0626 "ch12", "ch13", "ch14";
0627 clocks = <&cpg CPG_MOD 218>;
0628 clock-names = "fck";
0629 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0630 resets = <&cpg 218>;
0631 #dma-cells = <1>;
0632 dma-channels = <15>;
0633 };
0634
0635 qspi: spi@e6b10000 {
0636 compatible = "renesas,qspi-r8a7793", "renesas,qspi";
0637 reg = <0 0xe6b10000 0 0x2c>;
0638 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
0639 clocks = <&cpg CPG_MOD 917>;
0640 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
0641 <&dmac1 0x17>, <&dmac1 0x18>;
0642 dma-names = "tx", "rx", "tx", "rx";
0643 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0644 resets = <&cpg 917>;
0645 num-cs = <1>;
0646 #address-cells = <1>;
0647 #size-cells = <0>;
0648 status = "disabled";
0649 };
0650
0651 scifa0: serial@e6c40000 {
0652 compatible = "renesas,scifa-r8a7793",
0653 "renesas,rcar-gen2-scifa", "renesas,scifa";
0654 reg = <0 0xe6c40000 0 64>;
0655 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
0656 clocks = <&cpg CPG_MOD 204>;
0657 clock-names = "fck";
0658 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
0659 <&dmac1 0x21>, <&dmac1 0x22>;
0660 dma-names = "tx", "rx", "tx", "rx";
0661 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0662 resets = <&cpg 204>;
0663 status = "disabled";
0664 };
0665
0666 scifa1: serial@e6c50000 {
0667 compatible = "renesas,scifa-r8a7793",
0668 "renesas,rcar-gen2-scifa", "renesas,scifa";
0669 reg = <0 0xe6c50000 0 64>;
0670 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
0671 clocks = <&cpg CPG_MOD 203>;
0672 clock-names = "fck";
0673 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
0674 <&dmac1 0x25>, <&dmac1 0x26>;
0675 dma-names = "tx", "rx", "tx", "rx";
0676 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0677 resets = <&cpg 203>;
0678 status = "disabled";
0679 };
0680
0681 scifa2: serial@e6c60000 {
0682 compatible = "renesas,scifa-r8a7793",
0683 "renesas,rcar-gen2-scifa", "renesas,scifa";
0684 reg = <0 0xe6c60000 0 64>;
0685 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
0686 clocks = <&cpg CPG_MOD 202>;
0687 clock-names = "fck";
0688 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
0689 <&dmac1 0x27>, <&dmac1 0x28>;
0690 dma-names = "tx", "rx", "tx", "rx";
0691 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0692 resets = <&cpg 202>;
0693 status = "disabled";
0694 };
0695
0696 scifa3: serial@e6c70000 {
0697 compatible = "renesas,scifa-r8a7793",
0698 "renesas,rcar-gen2-scifa", "renesas,scifa";
0699 reg = <0 0xe6c70000 0 64>;
0700 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
0701 clocks = <&cpg CPG_MOD 1106>;
0702 clock-names = "fck";
0703 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
0704 <&dmac1 0x1b>, <&dmac1 0x1c>;
0705 dma-names = "tx", "rx", "tx", "rx";
0706 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0707 resets = <&cpg 1106>;
0708 status = "disabled";
0709 };
0710
0711 scifa4: serial@e6c78000 {
0712 compatible = "renesas,scifa-r8a7793",
0713 "renesas,rcar-gen2-scifa", "renesas,scifa";
0714 reg = <0 0xe6c78000 0 64>;
0715 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
0716 clocks = <&cpg CPG_MOD 1107>;
0717 clock-names = "fck";
0718 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
0719 <&dmac1 0x1f>, <&dmac1 0x20>;
0720 dma-names = "tx", "rx", "tx", "rx";
0721 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0722 resets = <&cpg 1107>;
0723 status = "disabled";
0724 };
0725
0726 scifa5: serial@e6c80000 {
0727 compatible = "renesas,scifa-r8a7793",
0728 "renesas,rcar-gen2-scifa", "renesas,scifa";
0729 reg = <0 0xe6c80000 0 64>;
0730 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
0731 clocks = <&cpg CPG_MOD 1108>;
0732 clock-names = "fck";
0733 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
0734 <&dmac1 0x23>, <&dmac1 0x24>;
0735 dma-names = "tx", "rx", "tx", "rx";
0736 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0737 resets = <&cpg 1108>;
0738 status = "disabled";
0739 };
0740
0741 scifb0: serial@e6c20000 {
0742 compatible = "renesas,scifb-r8a7793",
0743 "renesas,rcar-gen2-scifb", "renesas,scifb";
0744 reg = <0 0xe6c20000 0 0x100>;
0745 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
0746 clocks = <&cpg CPG_MOD 206>;
0747 clock-names = "fck";
0748 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
0749 <&dmac1 0x3d>, <&dmac1 0x3e>;
0750 dma-names = "tx", "rx", "tx", "rx";
0751 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0752 resets = <&cpg 206>;
0753 status = "disabled";
0754 };
0755
0756 scifb1: serial@e6c30000 {
0757 compatible = "renesas,scifb-r8a7793",
0758 "renesas,rcar-gen2-scifb", "renesas,scifb";
0759 reg = <0 0xe6c30000 0 0x100>;
0760 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
0761 clocks = <&cpg CPG_MOD 207>;
0762 clock-names = "fck";
0763 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
0764 <&dmac1 0x19>, <&dmac1 0x1a>;
0765 dma-names = "tx", "rx", "tx", "rx";
0766 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0767 resets = <&cpg 207>;
0768 status = "disabled";
0769 };
0770
0771 scifb2: serial@e6ce0000 {
0772 compatible = "renesas,scifb-r8a7793",
0773 "renesas,rcar-gen2-scifb", "renesas,scifb";
0774 reg = <0 0xe6ce0000 0 0x100>;
0775 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
0776 clocks = <&cpg CPG_MOD 216>;
0777 clock-names = "fck";
0778 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
0779 <&dmac1 0x1d>, <&dmac1 0x1e>;
0780 dma-names = "tx", "rx", "tx", "rx";
0781 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0782 resets = <&cpg 216>;
0783 status = "disabled";
0784 };
0785
0786 scif0: serial@e6e60000 {
0787 compatible = "renesas,scif-r8a7793",
0788 "renesas,rcar-gen2-scif", "renesas,scif";
0789 reg = <0 0xe6e60000 0 64>;
0790 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
0791 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
0792 <&scif_clk>;
0793 clock-names = "fck", "brg_int", "scif_clk";
0794 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
0795 <&dmac1 0x29>, <&dmac1 0x2a>;
0796 dma-names = "tx", "rx", "tx", "rx";
0797 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0798 resets = <&cpg 721>;
0799 status = "disabled";
0800 };
0801
0802 scif1: serial@e6e68000 {
0803 compatible = "renesas,scif-r8a7793",
0804 "renesas,rcar-gen2-scif", "renesas,scif";
0805 reg = <0 0xe6e68000 0 64>;
0806 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
0807 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
0808 <&scif_clk>;
0809 clock-names = "fck", "brg_int", "scif_clk";
0810 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
0811 <&dmac1 0x2d>, <&dmac1 0x2e>;
0812 dma-names = "tx", "rx", "tx", "rx";
0813 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0814 resets = <&cpg 720>;
0815 status = "disabled";
0816 };
0817
0818 scif2: serial@e6e58000 {
0819 compatible = "renesas,scif-r8a7793",
0820 "renesas,rcar-gen2-scif", "renesas,scif";
0821 reg = <0 0xe6e58000 0 64>;
0822 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
0823 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
0824 <&scif_clk>;
0825 clock-names = "fck", "brg_int", "scif_clk";
0826 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
0827 <&dmac1 0x2b>, <&dmac1 0x2c>;
0828 dma-names = "tx", "rx", "tx", "rx";
0829 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0830 resets = <&cpg 719>;
0831 status = "disabled";
0832 };
0833
0834 scif3: serial@e6ea8000 {
0835 compatible = "renesas,scif-r8a7793",
0836 "renesas,rcar-gen2-scif", "renesas,scif";
0837 reg = <0 0xe6ea8000 0 64>;
0838 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
0839 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
0840 <&scif_clk>;
0841 clock-names = "fck", "brg_int", "scif_clk";
0842 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
0843 <&dmac1 0x2f>, <&dmac1 0x30>;
0844 dma-names = "tx", "rx", "tx", "rx";
0845 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0846 resets = <&cpg 718>;
0847 status = "disabled";
0848 };
0849
0850 scif4: serial@e6ee0000 {
0851 compatible = "renesas,scif-r8a7793",
0852 "renesas,rcar-gen2-scif", "renesas,scif";
0853 reg = <0 0xe6ee0000 0 64>;
0854 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
0855 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
0856 <&scif_clk>;
0857 clock-names = "fck", "brg_int", "scif_clk";
0858 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
0859 <&dmac1 0xfb>, <&dmac1 0xfc>;
0860 dma-names = "tx", "rx", "tx", "rx";
0861 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0862 resets = <&cpg 715>;
0863 status = "disabled";
0864 };
0865
0866 scif5: serial@e6ee8000 {
0867 compatible = "renesas,scif-r8a7793",
0868 "renesas,rcar-gen2-scif", "renesas,scif";
0869 reg = <0 0xe6ee8000 0 64>;
0870 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
0871 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
0872 <&scif_clk>;
0873 clock-names = "fck", "brg_int", "scif_clk";
0874 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
0875 <&dmac1 0xfd>, <&dmac1 0xfe>;
0876 dma-names = "tx", "rx", "tx", "rx";
0877 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0878 resets = <&cpg 714>;
0879 status = "disabled";
0880 };
0881
0882 hscif0: serial@e62c0000 {
0883 compatible = "renesas,hscif-r8a7793",
0884 "renesas,rcar-gen2-hscif", "renesas,hscif";
0885 reg = <0 0xe62c0000 0 96>;
0886 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
0887 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
0888 <&scif_clk>;
0889 clock-names = "fck", "brg_int", "scif_clk";
0890 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
0891 <&dmac1 0x39>, <&dmac1 0x3a>;
0892 dma-names = "tx", "rx", "tx", "rx";
0893 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0894 resets = <&cpg 717>;
0895 status = "disabled";
0896 };
0897
0898 hscif1: serial@e62c8000 {
0899 compatible = "renesas,hscif-r8a7793",
0900 "renesas,rcar-gen2-hscif", "renesas,hscif";
0901 reg = <0 0xe62c8000 0 96>;
0902 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
0903 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
0904 <&scif_clk>;
0905 clock-names = "fck", "brg_int", "scif_clk";
0906 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
0907 <&dmac1 0x4d>, <&dmac1 0x4e>;
0908 dma-names = "tx", "rx", "tx", "rx";
0909 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0910 resets = <&cpg 716>;
0911 status = "disabled";
0912 };
0913
0914 hscif2: serial@e62d0000 {
0915 compatible = "renesas,hscif-r8a7793",
0916 "renesas,rcar-gen2-hscif", "renesas,hscif";
0917 reg = <0 0xe62d0000 0 96>;
0918 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
0919 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
0920 <&scif_clk>;
0921 clock-names = "fck", "brg_int", "scif_clk";
0922 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
0923 <&dmac1 0x3b>, <&dmac1 0x3c>;
0924 dma-names = "tx", "rx", "tx", "rx";
0925 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0926 resets = <&cpg 713>;
0927 status = "disabled";
0928 };
0929
0930 can0: can@e6e80000 {
0931 compatible = "renesas,can-r8a7793",
0932 "renesas,rcar-gen2-can";
0933 reg = <0 0xe6e80000 0 0x1000>;
0934 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
0935 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
0936 <&can_clk>;
0937 clock-names = "clkp1", "clkp2", "can_clk";
0938 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0939 resets = <&cpg 916>;
0940 status = "disabled";
0941 };
0942
0943 can1: can@e6e88000 {
0944 compatible = "renesas,can-r8a7793",
0945 "renesas,rcar-gen2-can";
0946 reg = <0 0xe6e88000 0 0x1000>;
0947 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
0948 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
0949 <&can_clk>;
0950 clock-names = "clkp1", "clkp2", "can_clk";
0951 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0952 resets = <&cpg 915>;
0953 status = "disabled";
0954 };
0955
0956 vin0: video@e6ef0000 {
0957 compatible = "renesas,vin-r8a7793",
0958 "renesas,rcar-gen2-vin";
0959 reg = <0 0xe6ef0000 0 0x1000>;
0960 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
0961 clocks = <&cpg CPG_MOD 811>;
0962 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0963 resets = <&cpg 811>;
0964 status = "disabled";
0965 };
0966
0967 vin1: video@e6ef1000 {
0968 compatible = "renesas,vin-r8a7793",
0969 "renesas,rcar-gen2-vin";
0970 reg = <0 0xe6ef1000 0 0x1000>;
0971 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
0972 clocks = <&cpg CPG_MOD 810>;
0973 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0974 resets = <&cpg 810>;
0975 status = "disabled";
0976 };
0977
0978 vin2: video@e6ef2000 {
0979 compatible = "renesas,vin-r8a7793",
0980 "renesas,rcar-gen2-vin";
0981 reg = <0 0xe6ef2000 0 0x1000>;
0982 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
0983 clocks = <&cpg CPG_MOD 809>;
0984 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
0985 resets = <&cpg 809>;
0986 status = "disabled";
0987 };
0988
0989 rcar_sound: sound@ec500000 {
0990 /*
0991 * #sound-dai-cells is required
0992 *
0993 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
0994 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
0995 */
0996 compatible = "renesas,rcar_sound-r8a7793",
0997 "renesas,rcar_sound-gen2";
0998 reg = <0 0xec500000 0 0x1000>, /* SCU */
0999 <0 0xec5a0000 0 0x100>, /* ADG */
1000 <0 0xec540000 0 0x1000>, /* SSIU */
1001 <0 0xec541000 0 0x280>, /* SSI */
1002 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1003 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1004
1005 clocks = <&cpg CPG_MOD 1005>,
1006 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1007 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1008 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1009 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1010 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1011 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1012 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1013 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1014 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1015 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1016 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1017 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1018 <&cpg CPG_CORE R8A7793_CLK_M2>;
1019 clock-names = "ssi-all",
1020 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1021 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1022 "ssi.1", "ssi.0",
1023 "src.9", "src.8", "src.7", "src.6",
1024 "src.5", "src.4", "src.3", "src.2",
1025 "src.1", "src.0",
1026 "dvc.0", "dvc.1",
1027 "clk_a", "clk_b", "clk_c", "clk_i";
1028 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1029 resets = <&cpg 1005>,
1030 <&cpg 1006>, <&cpg 1007>,
1031 <&cpg 1008>, <&cpg 1009>,
1032 <&cpg 1010>, <&cpg 1011>,
1033 <&cpg 1012>, <&cpg 1013>,
1034 <&cpg 1014>, <&cpg 1015>;
1035 reset-names = "ssi-all",
1036 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1037 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1038 "ssi.1", "ssi.0";
1039
1040 status = "disabled";
1041
1042 rcar_sound,dvc {
1043 dvc0: dvc-0 {
1044 dmas = <&audma1 0xbc>;
1045 dma-names = "tx";
1046 };
1047 dvc1: dvc-1 {
1048 dmas = <&audma1 0xbe>;
1049 dma-names = "tx";
1050 };
1051 };
1052
1053 rcar_sound,src {
1054 src0: src-0 {
1055 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1056 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1057 dma-names = "rx", "tx";
1058 };
1059 src1: src-1 {
1060 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1061 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1062 dma-names = "rx", "tx";
1063 };
1064 src2: src-2 {
1065 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1066 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1067 dma-names = "rx", "tx";
1068 };
1069 src3: src-3 {
1070 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1071 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1072 dma-names = "rx", "tx";
1073 };
1074 src4: src-4 {
1075 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1076 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1077 dma-names = "rx", "tx";
1078 };
1079 src5: src-5 {
1080 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1081 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1082 dma-names = "rx", "tx";
1083 };
1084 src6: src-6 {
1085 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1086 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1087 dma-names = "rx", "tx";
1088 };
1089 src7: src-7 {
1090 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1091 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1092 dma-names = "rx", "tx";
1093 };
1094 src8: src-8 {
1095 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1096 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1097 dma-names = "rx", "tx";
1098 };
1099 src9: src-9 {
1100 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1101 dmas = <&audma0 0x97>, <&audma1 0xba>;
1102 dma-names = "rx", "tx";
1103 };
1104 };
1105
1106 rcar_sound,ssi {
1107 ssi0: ssi-0 {
1108 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1109 dmas = <&audma0 0x01>, <&audma1 0x02>,
1110 <&audma0 0x15>, <&audma1 0x16>;
1111 dma-names = "rx", "tx", "rxu", "txu";
1112 };
1113 ssi1: ssi-1 {
1114 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1115 dmas = <&audma0 0x03>, <&audma1 0x04>,
1116 <&audma0 0x49>, <&audma1 0x4a>;
1117 dma-names = "rx", "tx", "rxu", "txu";
1118 };
1119 ssi2: ssi-2 {
1120 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1121 dmas = <&audma0 0x05>, <&audma1 0x06>,
1122 <&audma0 0x63>, <&audma1 0x64>;
1123 dma-names = "rx", "tx", "rxu", "txu";
1124 };
1125 ssi3: ssi-3 {
1126 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1127 dmas = <&audma0 0x07>, <&audma1 0x08>,
1128 <&audma0 0x6f>, <&audma1 0x70>;
1129 dma-names = "rx", "tx", "rxu", "txu";
1130 };
1131 ssi4: ssi-4 {
1132 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1133 dmas = <&audma0 0x09>, <&audma1 0x0a>,
1134 <&audma0 0x71>, <&audma1 0x72>;
1135 dma-names = "rx", "tx", "rxu", "txu";
1136 };
1137 ssi5: ssi-5 {
1138 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1139 dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1140 <&audma0 0x73>, <&audma1 0x74>;
1141 dma-names = "rx", "tx", "rxu", "txu";
1142 };
1143 ssi6: ssi-6 {
1144 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1145 dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1146 <&audma0 0x75>, <&audma1 0x76>;
1147 dma-names = "rx", "tx", "rxu", "txu";
1148 };
1149 ssi7: ssi-7 {
1150 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1151 dmas = <&audma0 0x0f>, <&audma1 0x10>,
1152 <&audma0 0x79>, <&audma1 0x7a>;
1153 dma-names = "rx", "tx", "rxu", "txu";
1154 };
1155 ssi8: ssi-8 {
1156 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1157 dmas = <&audma0 0x11>, <&audma1 0x12>,
1158 <&audma0 0x7b>, <&audma1 0x7c>;
1159 dma-names = "rx", "tx", "rxu", "txu";
1160 };
1161 ssi9: ssi-9 {
1162 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1163 dmas = <&audma0 0x13>, <&audma1 0x14>,
1164 <&audma0 0x7d>, <&audma1 0x7e>;
1165 dma-names = "rx", "tx", "rxu", "txu";
1166 };
1167 };
1168 };
1169
1170 audma0: dma-controller@ec700000 {
1171 compatible = "renesas,dmac-r8a7793",
1172 "renesas,rcar-dmac";
1173 reg = <0 0xec700000 0 0x10000>;
1174 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1175 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1176 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1177 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1178 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1179 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1180 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1181 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1182 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1183 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1184 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1185 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1186 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1187 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1188 interrupt-names = "error",
1189 "ch0", "ch1", "ch2", "ch3",
1190 "ch4", "ch5", "ch6", "ch7",
1191 "ch8", "ch9", "ch10", "ch11",
1192 "ch12";
1193 clocks = <&cpg CPG_MOD 502>;
1194 clock-names = "fck";
1195 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1196 resets = <&cpg 502>;
1197 #dma-cells = <1>;
1198 dma-channels = <13>;
1199 };
1200
1201 audma1: dma-controller@ec720000 {
1202 compatible = "renesas,dmac-r8a7793",
1203 "renesas,rcar-dmac";
1204 reg = <0 0xec720000 0 0x10000>;
1205 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1206 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1207 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1208 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1209 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1210 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1211 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1212 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1213 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1214 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1215 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1216 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1217 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1218 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1219 interrupt-names = "error",
1220 "ch0", "ch1", "ch2", "ch3",
1221 "ch4", "ch5", "ch6", "ch7",
1222 "ch8", "ch9", "ch10", "ch11",
1223 "ch12";
1224 clocks = <&cpg CPG_MOD 501>;
1225 clock-names = "fck";
1226 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1227 resets = <&cpg 501>;
1228 #dma-cells = <1>;
1229 dma-channels = <13>;
1230 };
1231
1232 sdhi0: mmc@ee100000 {
1233 compatible = "renesas,sdhi-r8a7793",
1234 "renesas,rcar-gen2-sdhi";
1235 reg = <0 0xee100000 0 0x328>;
1236 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1237 clocks = <&cpg CPG_MOD 314>;
1238 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1239 <&dmac1 0xcd>, <&dmac1 0xce>;
1240 dma-names = "tx", "rx", "tx", "rx";
1241 max-frequency = <195000000>;
1242 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1243 resets = <&cpg 314>;
1244 status = "disabled";
1245 };
1246
1247 sdhi1: mmc@ee140000 {
1248 compatible = "renesas,sdhi-r8a7793",
1249 "renesas,rcar-gen2-sdhi";
1250 reg = <0 0xee140000 0 0x100>;
1251 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1252 clocks = <&cpg CPG_MOD 312>;
1253 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1254 <&dmac1 0xc1>, <&dmac1 0xc2>;
1255 dma-names = "tx", "rx", "tx", "rx";
1256 max-frequency = <97500000>;
1257 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1258 resets = <&cpg 312>;
1259 status = "disabled";
1260 };
1261
1262 sdhi2: mmc@ee160000 {
1263 compatible = "renesas,sdhi-r8a7793",
1264 "renesas,rcar-gen2-sdhi";
1265 reg = <0 0xee160000 0 0x100>;
1266 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1267 clocks = <&cpg CPG_MOD 311>;
1268 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1269 <&dmac1 0xd3>, <&dmac1 0xd4>;
1270 dma-names = "tx", "rx", "tx", "rx";
1271 max-frequency = <97500000>;
1272 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1273 resets = <&cpg 311>;
1274 status = "disabled";
1275 };
1276
1277 mmcif0: mmc@ee200000 {
1278 compatible = "renesas,mmcif-r8a7793",
1279 "renesas,sh-mmcif";
1280 reg = <0 0xee200000 0 0x80>;
1281 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1282 clocks = <&cpg CPG_MOD 315>;
1283 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1284 <&dmac1 0xd1>, <&dmac1 0xd2>;
1285 dma-names = "tx", "rx", "tx", "rx";
1286 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1287 resets = <&cpg 315>;
1288 reg-io-width = <4>;
1289 status = "disabled";
1290 max-frequency = <97500000>;
1291 };
1292
1293 ether: ethernet@ee700000 {
1294 compatible = "renesas,ether-r8a7793",
1295 "renesas,rcar-gen2-ether";
1296 reg = <0 0xee700000 0 0x400>;
1297 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1298 clocks = <&cpg CPG_MOD 813>;
1299 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1300 resets = <&cpg 813>;
1301 phy-mode = "rmii";
1302 #address-cells = <1>;
1303 #size-cells = <0>;
1304 status = "disabled";
1305 };
1306
1307 gic: interrupt-controller@f1001000 {
1308 compatible = "arm,gic-400";
1309 #interrupt-cells = <3>;
1310 #address-cells = <0>;
1311 interrupt-controller;
1312 reg = <0 0xf1001000 0 0x1000>,
1313 <0 0xf1002000 0 0x2000>,
1314 <0 0xf1004000 0 0x2000>,
1315 <0 0xf1006000 0 0x2000>;
1316 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1317 clocks = <&cpg CPG_MOD 408>;
1318 clock-names = "clk";
1319 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1320 resets = <&cpg 408>;
1321 };
1322
1323 fdp1@fe940000 {
1324 compatible = "renesas,fdp1";
1325 reg = <0 0xfe940000 0 0x2400>;
1326 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1327 clocks = <&cpg CPG_MOD 119>;
1328 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1329 resets = <&cpg 119>;
1330 };
1331
1332 fdp1@fe944000 {
1333 compatible = "renesas,fdp1";
1334 reg = <0 0xfe944000 0 0x2400>;
1335 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1336 clocks = <&cpg CPG_MOD 118>;
1337 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1338 resets = <&cpg 118>;
1339 };
1340
1341 du: display@feb00000 {
1342 compatible = "renesas,du-r8a7793";
1343 reg = <0 0xfeb00000 0 0x40000>;
1344 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1345 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1346 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1347 clock-names = "du.0", "du.1";
1348 resets = <&cpg 724>;
1349 reset-names = "du.0";
1350 status = "disabled";
1351
1352 ports {
1353 #address-cells = <1>;
1354 #size-cells = <0>;
1355
1356 port@0 {
1357 reg = <0>;
1358 du_out_rgb: endpoint {
1359 };
1360 };
1361 port@1 {
1362 reg = <1>;
1363 du_out_lvds0: endpoint {
1364 remote-endpoint = <&lvds0_in>;
1365 };
1366 };
1367 };
1368 };
1369
1370 lvds0: lvds@feb90000 {
1371 compatible = "renesas,r8a7793-lvds";
1372 reg = <0 0xfeb90000 0 0x1c>;
1373 clocks = <&cpg CPG_MOD 726>;
1374 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1375 resets = <&cpg 726>;
1376
1377 status = "disabled";
1378
1379 ports {
1380 #address-cells = <1>;
1381 #size-cells = <0>;
1382
1383 port@0 {
1384 reg = <0>;
1385 lvds0_in: endpoint {
1386 remote-endpoint = <&du_out_lvds0>;
1387 };
1388 };
1389 port@1 {
1390 reg = <1>;
1391 lvds0_out: endpoint {
1392 };
1393 };
1394 };
1395 };
1396
1397 prr: chipid@ff000044 {
1398 compatible = "renesas,prr";
1399 reg = <0 0xff000044 0 4>;
1400 };
1401
1402 cmt0: timer@ffca0000 {
1403 compatible = "renesas,r8a7793-cmt0",
1404 "renesas,rcar-gen2-cmt0";
1405 reg = <0 0xffca0000 0 0x1004>;
1406 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1407 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1408 clocks = <&cpg CPG_MOD 124>;
1409 clock-names = "fck";
1410 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1411 resets = <&cpg 124>;
1412
1413 status = "disabled";
1414 };
1415
1416 cmt1: timer@e6130000 {
1417 compatible = "renesas,r8a7793-cmt1",
1418 "renesas,rcar-gen2-cmt1";
1419 reg = <0 0xe6130000 0 0x1004>;
1420 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1421 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1422 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1423 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1424 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1425 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1426 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1427 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1428 clocks = <&cpg CPG_MOD 329>;
1429 clock-names = "fck";
1430 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1431 resets = <&cpg 329>;
1432
1433 status = "disabled";
1434 };
1435 };
1436
1437 thermal-zones {
1438 cpu_thermal: cpu-thermal {
1439 polling-delay-passive = <0>;
1440 polling-delay = <0>;
1441
1442 thermal-sensors = <&thermal>;
1443
1444 trips {
1445 cpu-crit {
1446 temperature = <95000>;
1447 hysteresis = <0>;
1448 type = "critical";
1449 };
1450 };
1451 cooling-maps {
1452 };
1453 };
1454 };
1455
1456 timer {
1457 compatible = "arm,armv7-timer";
1458 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1459 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1460 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1461 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1462 };
1463
1464 /* External USB clock - can be overridden by the board */
1465 usb_extal_clk: usb_extal {
1466 compatible = "fixed-clock";
1467 #clock-cells = <0>;
1468 clock-frequency = <48000000>;
1469 };
1470 };
