0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the r8a7743 SoC
0004 *
0005 * Copyright (C) 2016-2017 Cogent Embedded Inc.
0006 */
0007
0008 #include <dt-bindings/interrupt-controller/irq.h>
0009 #include <dt-bindings/interrupt-controller/arm-gic.h>
0010 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
0011 #include <dt-bindings/power/r8a7743-sysc.h>
0012
0013 / {
0014 compatible = "renesas,r8a7743";
0015 #address-cells = <2>;
0016 #size-cells = <2>;
0017
0018 /*
0019 * The external audio clocks are configured as 0 Hz fixed frequency
0020 * clocks by default.
0021 * Boards that provide audio clocks should override them.
0022 */
0023 audio_clk_a: audio_clk_a {
0024 compatible = "fixed-clock";
0025 #clock-cells = <0>;
0026 clock-frequency = <0>;
0027 };
0028
0029 audio_clk_b: audio_clk_b {
0030 compatible = "fixed-clock";
0031 #clock-cells = <0>;
0032 clock-frequency = <0>;
0033 };
0034
0035 audio_clk_c: audio_clk_c {
0036 compatible = "fixed-clock";
0037 #clock-cells = <0>;
0038 clock-frequency = <0>;
0039 };
0040
0041 /* External CAN clock */
0042 can_clk: can {
0043 compatible = "fixed-clock";
0044 #clock-cells = <0>;
0045 /* This value must be overridden by the board. */
0046 clock-frequency = <0>;
0047 };
0048
0049 cpus {
0050 #address-cells = <1>;
0051 #size-cells = <0>;
0052
0053 cpu0: cpu@0 {
0054 device_type = "cpu";
0055 compatible = "arm,cortex-a15";
0056 reg = <0>;
0057 clock-frequency = <1500000000>;
0058 clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
0059 clock-latency = <300000>; /* 300 us */
0060 power-domains = <&sysc R8A7743_PD_CA15_CPU0>;
0061 enable-method = "renesas,apmu";
0062 next-level-cache = <&L2_CA15>;
0063
0064 /* kHz - uV - OPPs unknown yet */
0065 operating-points = <1500000 1000000>,
0066 <1312500 1000000>,
0067 <1125000 1000000>,
0068 < 937500 1000000>,
0069 < 750000 1000000>,
0070 < 375000 1000000>;
0071 };
0072
0073 cpu1: cpu@1 {
0074 device_type = "cpu";
0075 compatible = "arm,cortex-a15";
0076 reg = <1>;
0077 clock-frequency = <1500000000>;
0078 clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
0079 clock-latency = <300000>; /* 300 us */
0080 power-domains = <&sysc R8A7743_PD_CA15_CPU1>;
0081 enable-method = "renesas,apmu";
0082 next-level-cache = <&L2_CA15>;
0083
0084 /* kHz - uV - OPPs unknown yet */
0085 operating-points = <1500000 1000000>,
0086 <1312500 1000000>,
0087 <1125000 1000000>,
0088 < 937500 1000000>,
0089 < 750000 1000000>,
0090 < 375000 1000000>;
0091 };
0092
0093 L2_CA15: cache-controller-0 {
0094 compatible = "cache";
0095 cache-unified;
0096 cache-level = <2>;
0097 power-domains = <&sysc R8A7743_PD_CA15_SCU>;
0098 };
0099 };
0100
0101 /* External root clock */
0102 extal_clk: extal {
0103 compatible = "fixed-clock";
0104 #clock-cells = <0>;
0105 /* This value must be overridden by the board. */
0106 clock-frequency = <0>;
0107 };
0108
0109 /* External PCIe clock - can be overridden by the board */
0110 pcie_bus_clk: pcie_bus {
0111 compatible = "fixed-clock";
0112 #clock-cells = <0>;
0113 clock-frequency = <0>;
0114 };
0115
0116 pmu {
0117 compatible = "arm,cortex-a15-pmu";
0118 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
0119 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
0120 interrupt-affinity = <&cpu0>, <&cpu1>;
0121 };
0122
0123 /* External SCIF clock */
0124 scif_clk: scif {
0125 compatible = "fixed-clock";
0126 #clock-cells = <0>;
0127 /* This value must be overridden by the board. */
0128 clock-frequency = <0>;
0129 };
0130
0131 soc {
0132 compatible = "simple-bus";
0133 interrupt-parent = <&gic>;
0134
0135 #address-cells = <2>;
0136 #size-cells = <2>;
0137 ranges;
0138
0139 rwdt: watchdog@e6020000 {
0140 compatible = "renesas,r8a7743-wdt",
0141 "renesas,rcar-gen2-wdt";
0142 reg = <0 0xe6020000 0 0x0c>;
0143 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
0144 clocks = <&cpg CPG_MOD 402>;
0145 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0146 resets = <&cpg 402>;
0147 status = "disabled";
0148 };
0149
0150 gpio0: gpio@e6050000 {
0151 compatible = "renesas,gpio-r8a7743",
0152 "renesas,rcar-gen2-gpio";
0153 reg = <0 0xe6050000 0 0x50>;
0154 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0155 #gpio-cells = <2>;
0156 gpio-controller;
0157 gpio-ranges = <&pfc 0 0 32>;
0158 #interrupt-cells = <2>;
0159 interrupt-controller;
0160 clocks = <&cpg CPG_MOD 912>;
0161 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0162 resets = <&cpg 912>;
0163 };
0164
0165 gpio1: gpio@e6051000 {
0166 compatible = "renesas,gpio-r8a7743",
0167 "renesas,rcar-gen2-gpio";
0168 reg = <0 0xe6051000 0 0x50>;
0169 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
0170 #gpio-cells = <2>;
0171 gpio-controller;
0172 gpio-ranges = <&pfc 0 32 26>;
0173 #interrupt-cells = <2>;
0174 interrupt-controller;
0175 clocks = <&cpg CPG_MOD 911>;
0176 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0177 resets = <&cpg 911>;
0178 };
0179
0180 gpio2: gpio@e6052000 {
0181 compatible = "renesas,gpio-r8a7743",
0182 "renesas,rcar-gen2-gpio";
0183 reg = <0 0xe6052000 0 0x50>;
0184 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
0185 #gpio-cells = <2>;
0186 gpio-controller;
0187 gpio-ranges = <&pfc 0 64 32>;
0188 #interrupt-cells = <2>;
0189 interrupt-controller;
0190 clocks = <&cpg CPG_MOD 910>;
0191 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0192 resets = <&cpg 910>;
0193 };
0194
0195 gpio3: gpio@e6053000 {
0196 compatible = "renesas,gpio-r8a7743",
0197 "renesas,rcar-gen2-gpio";
0198 reg = <0 0xe6053000 0 0x50>;
0199 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0200 #gpio-cells = <2>;
0201 gpio-controller;
0202 gpio-ranges = <&pfc 0 96 32>;
0203 #interrupt-cells = <2>;
0204 interrupt-controller;
0205 clocks = <&cpg CPG_MOD 909>;
0206 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0207 resets = <&cpg 909>;
0208 };
0209
0210 gpio4: gpio@e6054000 {
0211 compatible = "renesas,gpio-r8a7743",
0212 "renesas,rcar-gen2-gpio";
0213 reg = <0 0xe6054000 0 0x50>;
0214 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0215 #gpio-cells = <2>;
0216 gpio-controller;
0217 gpio-ranges = <&pfc 0 128 32>;
0218 #interrupt-cells = <2>;
0219 interrupt-controller;
0220 clocks = <&cpg CPG_MOD 908>;
0221 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0222 resets = <&cpg 908>;
0223 };
0224
0225 gpio5: gpio@e6055000 {
0226 compatible = "renesas,gpio-r8a7743",
0227 "renesas,rcar-gen2-gpio";
0228 reg = <0 0xe6055000 0 0x50>;
0229 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
0230 #gpio-cells = <2>;
0231 gpio-controller;
0232 gpio-ranges = <&pfc 0 160 32>;
0233 #interrupt-cells = <2>;
0234 interrupt-controller;
0235 clocks = <&cpg CPG_MOD 907>;
0236 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0237 resets = <&cpg 907>;
0238 };
0239
0240 gpio6: gpio@e6055400 {
0241 compatible = "renesas,gpio-r8a7743",
0242 "renesas,rcar-gen2-gpio";
0243 reg = <0 0xe6055400 0 0x50>;
0244 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
0245 #gpio-cells = <2>;
0246 gpio-controller;
0247 gpio-ranges = <&pfc 0 192 32>;
0248 #interrupt-cells = <2>;
0249 interrupt-controller;
0250 clocks = <&cpg CPG_MOD 905>;
0251 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0252 resets = <&cpg 905>;
0253 };
0254
0255 gpio7: gpio@e6055800 {
0256 compatible = "renesas,gpio-r8a7743",
0257 "renesas,rcar-gen2-gpio";
0258 reg = <0 0xe6055800 0 0x50>;
0259 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
0260 #gpio-cells = <2>;
0261 gpio-controller;
0262 gpio-ranges = <&pfc 0 224 26>;
0263 #interrupt-cells = <2>;
0264 interrupt-controller;
0265 clocks = <&cpg CPG_MOD 904>;
0266 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0267 resets = <&cpg 904>;
0268 };
0269
0270 pfc: pinctrl@e6060000 {
0271 compatible = "renesas,pfc-r8a7743";
0272 reg = <0 0xe6060000 0 0x250>;
0273 };
0274
0275 tpu: pwm@e60f0000 {
0276 compatible = "renesas,tpu-r8a7743", "renesas,tpu";
0277 reg = <0 0xe60f0000 0 0x148>;
0278 clocks = <&cpg CPG_MOD 304>;
0279 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0280 resets = <&cpg 304>;
0281 #pwm-cells = <3>;
0282 status = "disabled";
0283 };
0284
0285 cpg: clock-controller@e6150000 {
0286 compatible = "renesas,r8a7743-cpg-mssr";
0287 reg = <0 0xe6150000 0 0x1000>;
0288 clocks = <&extal_clk>, <&usb_extal_clk>;
0289 clock-names = "extal", "usb_extal";
0290 #clock-cells = <2>;
0291 #power-domain-cells = <0>;
0292 #reset-cells = <1>;
0293 };
0294
0295 apmu@e6152000 {
0296 compatible = "renesas,r8a7743-apmu", "renesas,apmu";
0297 reg = <0 0xe6152000 0 0x188>;
0298 cpus = <&cpu0>, <&cpu1>;
0299 };
0300
0301 rst: reset-controller@e6160000 {
0302 compatible = "renesas,r8a7743-rst";
0303 reg = <0 0xe6160000 0 0x100>;
0304 };
0305
0306 sysc: system-controller@e6180000 {
0307 compatible = "renesas,r8a7743-sysc";
0308 reg = <0 0xe6180000 0 0x200>;
0309 #power-domain-cells = <1>;
0310 };
0311
0312 irqc: interrupt-controller@e61c0000 {
0313 compatible = "renesas,irqc-r8a7743", "renesas,irqc";
0314 #interrupt-cells = <2>;
0315 interrupt-controller;
0316 reg = <0 0xe61c0000 0 0x200>;
0317 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
0318 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
0319 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
0320 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
0321 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
0322 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
0323 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
0324 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
0325 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
0326 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
0327 clocks = <&cpg CPG_MOD 407>;
0328 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0329 resets = <&cpg 407>;
0330 };
0331
0332 thermal: thermal@e61f0000 {
0333 compatible = "renesas,thermal-r8a7743",
0334 "renesas,rcar-gen2-thermal";
0335 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
0336 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
0337 clocks = <&cpg CPG_MOD 522>;
0338 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0339 resets = <&cpg 522>;
0340 #thermal-sensor-cells = <0>;
0341 };
0342
0343 ipmmu_sy0: iommu@e6280000 {
0344 compatible = "renesas,ipmmu-r8a7743",
0345 "renesas,ipmmu-vmsa";
0346 reg = <0 0xe6280000 0 0x1000>;
0347 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
0348 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
0349 #iommu-cells = <1>;
0350 status = "disabled";
0351 };
0352
0353 ipmmu_sy1: iommu@e6290000 {
0354 compatible = "renesas,ipmmu-r8a7743",
0355 "renesas,ipmmu-vmsa";
0356 reg = <0 0xe6290000 0 0x1000>;
0357 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
0358 #iommu-cells = <1>;
0359 status = "disabled";
0360 };
0361
0362 ipmmu_ds: iommu@e6740000 {
0363 compatible = "renesas,ipmmu-r8a7743",
0364 "renesas,ipmmu-vmsa";
0365 reg = <0 0xe6740000 0 0x1000>;
0366 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
0367 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
0368 #iommu-cells = <1>;
0369 status = "disabled";
0370 };
0371
0372 ipmmu_mp: iommu@ec680000 {
0373 compatible = "renesas,ipmmu-r8a7743",
0374 "renesas,ipmmu-vmsa";
0375 reg = <0 0xec680000 0 0x1000>;
0376 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
0377 #iommu-cells = <1>;
0378 status = "disabled";
0379 };
0380
0381 ipmmu_mx: iommu@fe951000 {
0382 compatible = "renesas,ipmmu-r8a7743",
0383 "renesas,ipmmu-vmsa";
0384 reg = <0 0xfe951000 0 0x1000>;
0385 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
0386 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
0387 #iommu-cells = <1>;
0388 status = "disabled";
0389 };
0390
0391 ipmmu_gp: iommu@e62a0000 {
0392 compatible = "renesas,ipmmu-r8a7743",
0393 "renesas,ipmmu-vmsa";
0394 reg = <0 0xe62a0000 0 0x1000>;
0395 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
0396 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
0397 #iommu-cells = <1>;
0398 status = "disabled";
0399 };
0400
0401 icram0: sram@e63a0000 {
0402 compatible = "mmio-sram";
0403 reg = <0 0xe63a0000 0 0x12000>;
0404 #address-cells = <1>;
0405 #size-cells = <1>;
0406 ranges = <0 0 0xe63a0000 0x12000>;
0407 };
0408
0409 icram1: sram@e63c0000 {
0410 compatible = "mmio-sram";
0411 reg = <0 0xe63c0000 0 0x1000>;
0412 #address-cells = <1>;
0413 #size-cells = <1>;
0414 ranges = <0 0 0xe63c0000 0x1000>;
0415
0416 smp-sram@0 {
0417 compatible = "renesas,smp-sram";
0418 reg = <0 0x100>;
0419 };
0420 };
0421
0422 icram2: sram@e6300000 {
0423 compatible = "mmio-sram";
0424 reg = <0 0xe6300000 0 0x40000>;
0425 #address-cells = <1>;
0426 #size-cells = <1>;
0427 ranges = <0 0 0xe6300000 0x40000>;
0428 };
0429
0430 /* The memory map in the User's Manual maps the cores to
0431 * bus numbers
0432 */
0433 i2c0: i2c@e6508000 {
0434 #address-cells = <1>;
0435 #size-cells = <0>;
0436 compatible = "renesas,i2c-r8a7743",
0437 "renesas,rcar-gen2-i2c";
0438 reg = <0 0xe6508000 0 0x40>;
0439 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
0440 clocks = <&cpg CPG_MOD 931>;
0441 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0442 resets = <&cpg 931>;
0443 i2c-scl-internal-delay-ns = <6>;
0444 status = "disabled";
0445 };
0446
0447 i2c1: i2c@e6518000 {
0448 #address-cells = <1>;
0449 #size-cells = <0>;
0450 compatible = "renesas,i2c-r8a7743",
0451 "renesas,rcar-gen2-i2c";
0452 reg = <0 0xe6518000 0 0x40>;
0453 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
0454 clocks = <&cpg CPG_MOD 930>;
0455 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0456 resets = <&cpg 930>;
0457 i2c-scl-internal-delay-ns = <6>;
0458 status = "disabled";
0459 };
0460
0461 i2c2: i2c@e6530000 {
0462 #address-cells = <1>;
0463 #size-cells = <0>;
0464 compatible = "renesas,i2c-r8a7743",
0465 "renesas,rcar-gen2-i2c";
0466 reg = <0 0xe6530000 0 0x40>;
0467 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
0468 clocks = <&cpg CPG_MOD 929>;
0469 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0470 resets = <&cpg 929>;
0471 i2c-scl-internal-delay-ns = <6>;
0472 status = "disabled";
0473 };
0474
0475 i2c3: i2c@e6540000 {
0476 #address-cells = <1>;
0477 #size-cells = <0>;
0478 compatible = "renesas,i2c-r8a7743",
0479 "renesas,rcar-gen2-i2c";
0480 reg = <0 0xe6540000 0 0x40>;
0481 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
0482 clocks = <&cpg CPG_MOD 928>;
0483 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0484 resets = <&cpg 928>;
0485 i2c-scl-internal-delay-ns = <6>;
0486 status = "disabled";
0487 };
0488
0489 i2c4: i2c@e6520000 {
0490 #address-cells = <1>;
0491 #size-cells = <0>;
0492 compatible = "renesas,i2c-r8a7743",
0493 "renesas,rcar-gen2-i2c";
0494 reg = <0 0xe6520000 0 0x40>;
0495 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
0496 clocks = <&cpg CPG_MOD 927>;
0497 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0498 resets = <&cpg 927>;
0499 i2c-scl-internal-delay-ns = <6>;
0500 status = "disabled";
0501 };
0502
0503 i2c5: i2c@e6528000 {
0504 /* doesn't need pinmux */
0505 #address-cells = <1>;
0506 #size-cells = <0>;
0507 compatible = "renesas,i2c-r8a7743",
0508 "renesas,rcar-gen2-i2c";
0509 reg = <0 0xe6528000 0 0x40>;
0510 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
0511 clocks = <&cpg CPG_MOD 925>;
0512 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0513 resets = <&cpg 925>;
0514 i2c-scl-internal-delay-ns = <110>;
0515 status = "disabled";
0516 };
0517
0518 iic0: i2c@e6500000 {
0519 #address-cells = <1>;
0520 #size-cells = <0>;
0521 compatible = "renesas,iic-r8a7743",
0522 "renesas,rcar-gen2-iic",
0523 "renesas,rmobile-iic";
0524 reg = <0 0xe6500000 0 0x425>;
0525 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
0526 clocks = <&cpg CPG_MOD 318>;
0527 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
0528 <&dmac1 0x61>, <&dmac1 0x62>;
0529 dma-names = "tx", "rx", "tx", "rx";
0530 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0531 resets = <&cpg 318>;
0532 status = "disabled";
0533 };
0534
0535 iic1: i2c@e6510000 {
0536 #address-cells = <1>;
0537 #size-cells = <0>;
0538 compatible = "renesas,iic-r8a7743",
0539 "renesas,rcar-gen2-iic",
0540 "renesas,rmobile-iic";
0541 reg = <0 0xe6510000 0 0x425>;
0542 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
0543 clocks = <&cpg CPG_MOD 323>;
0544 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
0545 <&dmac1 0x65>, <&dmac1 0x66>;
0546 dma-names = "tx", "rx", "tx", "rx";
0547 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0548 resets = <&cpg 323>;
0549 status = "disabled";
0550 };
0551
0552 iic3: i2c@e60b0000 {
0553 /* doesn't need pinmux */
0554 #address-cells = <1>;
0555 #size-cells = <0>;
0556 compatible = "renesas,iic-r8a7743",
0557 "renesas,rcar-gen2-iic",
0558 "renesas,rmobile-iic";
0559 reg = <0 0xe60b0000 0 0x425>;
0560 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
0561 clocks = <&cpg CPG_MOD 926>;
0562 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
0563 <&dmac1 0x77>, <&dmac1 0x78>;
0564 dma-names = "tx", "rx", "tx", "rx";
0565 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0566 resets = <&cpg 926>;
0567 status = "disabled";
0568 };
0569
0570 hsusb: usb@e6590000 {
0571 compatible = "renesas,usbhs-r8a7743",
0572 "renesas,rcar-gen2-usbhs";
0573 reg = <0 0xe6590000 0 0x100>;
0574 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
0575 clocks = <&cpg CPG_MOD 704>;
0576 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
0577 <&usb_dmac1 0>, <&usb_dmac1 1>;
0578 dma-names = "ch0", "ch1", "ch2", "ch3";
0579 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0580 resets = <&cpg 704>;
0581 renesas,buswait = <4>;
0582 phys = <&usb0 1>;
0583 phy-names = "usb";
0584 status = "disabled";
0585 };
0586
0587 usbphy: usb-phy@e6590100 {
0588 compatible = "renesas,usb-phy-r8a7743",
0589 "renesas,rcar-gen2-usb-phy";
0590 reg = <0 0xe6590100 0 0x100>;
0591 #address-cells = <1>;
0592 #size-cells = <0>;
0593 clocks = <&cpg CPG_MOD 704>;
0594 clock-names = "usbhs";
0595 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0596 resets = <&cpg 704>;
0597 status = "disabled";
0598
0599 usb0: usb-channel@0 {
0600 reg = <0>;
0601 #phy-cells = <1>;
0602 };
0603 usb2: usb-channel@2 {
0604 reg = <2>;
0605 #phy-cells = <1>;
0606 };
0607 };
0608
0609 usb_dmac0: dma-controller@e65a0000 {
0610 compatible = "renesas,r8a7743-usb-dmac",
0611 "renesas,usb-dmac";
0612 reg = <0 0xe65a0000 0 0x100>;
0613 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
0614 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
0615 interrupt-names = "ch0", "ch1";
0616 clocks = <&cpg CPG_MOD 330>;
0617 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0618 resets = <&cpg 330>;
0619 #dma-cells = <1>;
0620 dma-channels = <2>;
0621 };
0622
0623 usb_dmac1: dma-controller@e65b0000 {
0624 compatible = "renesas,r8a7743-usb-dmac",
0625 "renesas,usb-dmac";
0626 reg = <0 0xe65b0000 0 0x100>;
0627 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
0628 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
0629 interrupt-names = "ch0", "ch1";
0630 clocks = <&cpg CPG_MOD 331>;
0631 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0632 resets = <&cpg 331>;
0633 #dma-cells = <1>;
0634 dma-channels = <2>;
0635 };
0636
0637 dmac0: dma-controller@e6700000 {
0638 compatible = "renesas,dmac-r8a7743",
0639 "renesas,rcar-dmac";
0640 reg = <0 0xe6700000 0 0x20000>;
0641 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
0642 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
0643 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
0644 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
0645 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
0646 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
0647 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
0648 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
0649 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
0650 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
0651 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
0652 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
0653 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
0654 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
0655 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
0656 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
0657 interrupt-names = "error",
0658 "ch0", "ch1", "ch2", "ch3",
0659 "ch4", "ch5", "ch6", "ch7",
0660 "ch8", "ch9", "ch10", "ch11",
0661 "ch12", "ch13", "ch14";
0662 clocks = <&cpg CPG_MOD 219>;
0663 clock-names = "fck";
0664 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0665 resets = <&cpg 219>;
0666 #dma-cells = <1>;
0667 dma-channels = <15>;
0668 };
0669
0670 dmac1: dma-controller@e6720000 {
0671 compatible = "renesas,dmac-r8a7743",
0672 "renesas,rcar-dmac";
0673 reg = <0 0xe6720000 0 0x20000>;
0674 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
0675 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
0676 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
0677 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
0678 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
0679 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
0680 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
0681 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
0682 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
0683 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
0684 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
0685 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
0686 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
0687 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
0688 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
0689 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
0690 interrupt-names = "error",
0691 "ch0", "ch1", "ch2", "ch3",
0692 "ch4", "ch5", "ch6", "ch7",
0693 "ch8", "ch9", "ch10", "ch11",
0694 "ch12", "ch13", "ch14";
0695 clocks = <&cpg CPG_MOD 218>;
0696 clock-names = "fck";
0697 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0698 resets = <&cpg 218>;
0699 #dma-cells = <1>;
0700 dma-channels = <15>;
0701 };
0702
0703 avb: ethernet@e6800000 {
0704 compatible = "renesas,etheravb-r8a7743",
0705 "renesas,etheravb-rcar-gen2";
0706 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
0707 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
0708 clocks = <&cpg CPG_MOD 812>;
0709 clock-names = "fck";
0710 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0711 resets = <&cpg 812>;
0712 #address-cells = <1>;
0713 #size-cells = <0>;
0714 status = "disabled";
0715 };
0716
0717 qspi: spi@e6b10000 {
0718 compatible = "renesas,qspi-r8a7743", "renesas,qspi";
0719 reg = <0 0xe6b10000 0 0x2c>;
0720 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
0721 clocks = <&cpg CPG_MOD 917>;
0722 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
0723 <&dmac1 0x17>, <&dmac1 0x18>;
0724 dma-names = "tx", "rx", "tx", "rx";
0725 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0726 num-cs = <1>;
0727 #address-cells = <1>;
0728 #size-cells = <0>;
0729 resets = <&cpg 917>;
0730 status = "disabled";
0731 };
0732
0733 scifa0: serial@e6c40000 {
0734 compatible = "renesas,scifa-r8a7743",
0735 "renesas,rcar-gen2-scifa", "renesas,scifa";
0736 reg = <0 0xe6c40000 0 0x40>;
0737 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
0738 clocks = <&cpg CPG_MOD 204>;
0739 clock-names = "fck";
0740 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
0741 <&dmac1 0x21>, <&dmac1 0x22>;
0742 dma-names = "tx", "rx", "tx", "rx";
0743 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0744 resets = <&cpg 204>;
0745 status = "disabled";
0746 };
0747
0748 scifa1: serial@e6c50000 {
0749 compatible = "renesas,scifa-r8a7743",
0750 "renesas,rcar-gen2-scifa", "renesas,scifa";
0751 reg = <0 0xe6c50000 0 0x40>;
0752 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
0753 clocks = <&cpg CPG_MOD 203>;
0754 clock-names = "fck";
0755 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
0756 <&dmac1 0x25>, <&dmac1 0x26>;
0757 dma-names = "tx", "rx", "tx", "rx";
0758 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0759 resets = <&cpg 203>;
0760 status = "disabled";
0761 };
0762
0763 scifa2: serial@e6c60000 {
0764 compatible = "renesas,scifa-r8a7743",
0765 "renesas,rcar-gen2-scifa", "renesas,scifa";
0766 reg = <0 0xe6c60000 0 0x40>;
0767 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
0768 clocks = <&cpg CPG_MOD 202>;
0769 clock-names = "fck";
0770 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
0771 <&dmac1 0x27>, <&dmac1 0x28>;
0772 dma-names = "tx", "rx", "tx", "rx";
0773 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0774 resets = <&cpg 202>;
0775 status = "disabled";
0776 };
0777
0778 scifa3: serial@e6c70000 {
0779 compatible = "renesas,scifa-r8a7743",
0780 "renesas,rcar-gen2-scifa", "renesas,scifa";
0781 reg = <0 0xe6c70000 0 0x40>;
0782 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
0783 clocks = <&cpg CPG_MOD 1106>;
0784 clock-names = "fck";
0785 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
0786 <&dmac1 0x1b>, <&dmac1 0x1c>;
0787 dma-names = "tx", "rx", "tx", "rx";
0788 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0789 resets = <&cpg 1106>;
0790 status = "disabled";
0791 };
0792
0793 scifa4: serial@e6c78000 {
0794 compatible = "renesas,scifa-r8a7743",
0795 "renesas,rcar-gen2-scifa", "renesas,scifa";
0796 reg = <0 0xe6c78000 0 0x40>;
0797 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
0798 clocks = <&cpg CPG_MOD 1107>;
0799 clock-names = "fck";
0800 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
0801 <&dmac1 0x1f>, <&dmac1 0x20>;
0802 dma-names = "tx", "rx", "tx", "rx";
0803 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0804 resets = <&cpg 1107>;
0805 status = "disabled";
0806 };
0807
0808 scifa5: serial@e6c80000 {
0809 compatible = "renesas,scifa-r8a7743",
0810 "renesas,rcar-gen2-scifa", "renesas,scifa";
0811 reg = <0 0xe6c80000 0 0x40>;
0812 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
0813 clocks = <&cpg CPG_MOD 1108>;
0814 clock-names = "fck";
0815 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
0816 <&dmac1 0x23>, <&dmac1 0x24>;
0817 dma-names = "tx", "rx", "tx", "rx";
0818 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0819 resets = <&cpg 1108>;
0820 status = "disabled";
0821 };
0822
0823 scifb0: serial@e6c20000 {
0824 compatible = "renesas,scifb-r8a7743",
0825 "renesas,rcar-gen2-scifb", "renesas,scifb";
0826 reg = <0 0xe6c20000 0 0x100>;
0827 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
0828 clocks = <&cpg CPG_MOD 206>;
0829 clock-names = "fck";
0830 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
0831 <&dmac1 0x3d>, <&dmac1 0x3e>;
0832 dma-names = "tx", "rx", "tx", "rx";
0833 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0834 resets = <&cpg 206>;
0835 status = "disabled";
0836 };
0837
0838 scifb1: serial@e6c30000 {
0839 compatible = "renesas,scifb-r8a7743",
0840 "renesas,rcar-gen2-scifb", "renesas,scifb";
0841 reg = <0 0xe6c30000 0 0x100>;
0842 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
0843 clocks = <&cpg CPG_MOD 207>;
0844 clock-names = "fck";
0845 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
0846 <&dmac1 0x19>, <&dmac1 0x1a>;
0847 dma-names = "tx", "rx", "tx", "rx";
0848 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0849 resets = <&cpg 207>;
0850 status = "disabled";
0851 };
0852
0853 scifb2: serial@e6ce0000 {
0854 compatible = "renesas,scifb-r8a7743",
0855 "renesas,rcar-gen2-scifb", "renesas,scifb";
0856 reg = <0 0xe6ce0000 0 0x100>;
0857 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
0858 clocks = <&cpg CPG_MOD 216>;
0859 clock-names = "fck";
0860 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
0861 <&dmac1 0x1d>, <&dmac1 0x1e>;
0862 dma-names = "tx", "rx", "tx", "rx";
0863 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0864 resets = <&cpg 216>;
0865 status = "disabled";
0866 };
0867
0868 scif0: serial@e6e60000 {
0869 compatible = "renesas,scif-r8a7743",
0870 "renesas,rcar-gen2-scif", "renesas,scif";
0871 reg = <0 0xe6e60000 0 0x40>;
0872 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
0873 clocks = <&cpg CPG_MOD 721>,
0874 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
0875 clock-names = "fck", "brg_int", "scif_clk";
0876 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
0877 <&dmac1 0x29>, <&dmac1 0x2a>;
0878 dma-names = "tx", "rx", "tx", "rx";
0879 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0880 resets = <&cpg 721>;
0881 status = "disabled";
0882 };
0883
0884 scif1: serial@e6e68000 {
0885 compatible = "renesas,scif-r8a7743",
0886 "renesas,rcar-gen2-scif", "renesas,scif";
0887 reg = <0 0xe6e68000 0 0x40>;
0888 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
0889 clocks = <&cpg CPG_MOD 720>,
0890 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
0891 clock-names = "fck", "brg_int", "scif_clk";
0892 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
0893 <&dmac1 0x2d>, <&dmac1 0x2e>;
0894 dma-names = "tx", "rx", "tx", "rx";
0895 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0896 resets = <&cpg 720>;
0897 status = "disabled";
0898 };
0899
0900 scif2: serial@e6e58000 {
0901 compatible = "renesas,scif-r8a7743",
0902 "renesas,rcar-gen2-scif", "renesas,scif";
0903 reg = <0 0xe6e58000 0 0x40>;
0904 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
0905 clocks = <&cpg CPG_MOD 719>,
0906 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
0907 clock-names = "fck", "brg_int", "scif_clk";
0908 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
0909 <&dmac1 0x2b>, <&dmac1 0x2c>;
0910 dma-names = "tx", "rx", "tx", "rx";
0911 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0912 resets = <&cpg 719>;
0913 status = "disabled";
0914 };
0915
0916 scif3: serial@e6ea8000 {
0917 compatible = "renesas,scif-r8a7743",
0918 "renesas,rcar-gen2-scif", "renesas,scif";
0919 reg = <0 0xe6ea8000 0 0x40>;
0920 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
0921 clocks = <&cpg CPG_MOD 718>,
0922 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
0923 clock-names = "fck", "brg_int", "scif_clk";
0924 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
0925 <&dmac1 0x2f>, <&dmac1 0x30>;
0926 dma-names = "tx", "rx", "tx", "rx";
0927 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0928 resets = <&cpg 718>;
0929 status = "disabled";
0930 };
0931
0932 scif4: serial@e6ee0000 {
0933 compatible = "renesas,scif-r8a7743",
0934 "renesas,rcar-gen2-scif", "renesas,scif";
0935 reg = <0 0xe6ee0000 0 0x40>;
0936 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
0937 clocks = <&cpg CPG_MOD 715>,
0938 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
0939 clock-names = "fck", "brg_int", "scif_clk";
0940 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
0941 <&dmac1 0xfb>, <&dmac1 0xfc>;
0942 dma-names = "tx", "rx", "tx", "rx";
0943 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0944 resets = <&cpg 715>;
0945 status = "disabled";
0946 };
0947
0948 scif5: serial@e6ee8000 {
0949 compatible = "renesas,scif-r8a7743",
0950 "renesas,rcar-gen2-scif", "renesas,scif";
0951 reg = <0 0xe6ee8000 0 0x40>;
0952 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
0953 clocks = <&cpg CPG_MOD 714>,
0954 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
0955 clock-names = "fck", "brg_int", "scif_clk";
0956 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
0957 <&dmac1 0xfd>, <&dmac1 0xfe>;
0958 dma-names = "tx", "rx", "tx", "rx";
0959 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0960 resets = <&cpg 714>;
0961 status = "disabled";
0962 };
0963
0964 hscif0: serial@e62c0000 {
0965 compatible = "renesas,hscif-r8a7743",
0966 "renesas,rcar-gen2-hscif", "renesas,hscif";
0967 reg = <0 0xe62c0000 0 0x60>;
0968 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
0969 clocks = <&cpg CPG_MOD 717>,
0970 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
0971 clock-names = "fck", "brg_int", "scif_clk";
0972 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
0973 <&dmac1 0x39>, <&dmac1 0x3a>;
0974 dma-names = "tx", "rx", "tx", "rx";
0975 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0976 resets = <&cpg 717>;
0977 status = "disabled";
0978 };
0979
0980 hscif1: serial@e62c8000 {
0981 compatible = "renesas,hscif-r8a7743",
0982 "renesas,rcar-gen2-hscif", "renesas,hscif";
0983 reg = <0 0xe62c8000 0 0x60>;
0984 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
0985 clocks = <&cpg CPG_MOD 716>,
0986 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
0987 clock-names = "fck", "brg_int", "scif_clk";
0988 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
0989 <&dmac1 0x4d>, <&dmac1 0x4e>;
0990 dma-names = "tx", "rx", "tx", "rx";
0991 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0992 resets = <&cpg 716>;
0993 status = "disabled";
0994 };
0995
0996 hscif2: serial@e62d0000 {
0997 compatible = "renesas,hscif-r8a7743",
0998 "renesas,rcar-gen2-hscif", "renesas,hscif";
0999 reg = <0 0xe62d0000 0 0x60>;
1000 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1001 clocks = <&cpg CPG_MOD 713>,
1002 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
1003 clock-names = "fck", "brg_int", "scif_clk";
1004 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
1005 <&dmac1 0x3b>, <&dmac1 0x3c>;
1006 dma-names = "tx", "rx", "tx", "rx";
1007 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1008 resets = <&cpg 713>;
1009 status = "disabled";
1010 };
1011
1012 msiof0: spi@e6e20000 {
1013 compatible = "renesas,msiof-r8a7743",
1014 "renesas,rcar-gen2-msiof";
1015 reg = <0 0xe6e20000 0 0x0064>;
1016 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1017 clocks = <&cpg CPG_MOD 000>;
1018 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1019 <&dmac1 0x51>, <&dmac1 0x52>;
1020 dma-names = "tx", "rx", "tx", "rx";
1021 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1022 #address-cells = <1>;
1023 #size-cells = <0>;
1024 resets = <&cpg 000>;
1025 status = "disabled";
1026 };
1027
1028 msiof1: spi@e6e10000 {
1029 compatible = "renesas,msiof-r8a7743",
1030 "renesas,rcar-gen2-msiof";
1031 reg = <0 0xe6e10000 0 0x0064>;
1032 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1033 clocks = <&cpg CPG_MOD 208>;
1034 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1035 <&dmac1 0x55>, <&dmac1 0x56>;
1036 dma-names = "tx", "rx", "tx", "rx";
1037 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1038 #address-cells = <1>;
1039 #size-cells = <0>;
1040 resets = <&cpg 208>;
1041 status = "disabled";
1042 };
1043
1044 msiof2: spi@e6e00000 {
1045 compatible = "renesas,msiof-r8a7743",
1046 "renesas,rcar-gen2-msiof";
1047 reg = <0 0xe6e00000 0 0x0064>;
1048 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1049 clocks = <&cpg CPG_MOD 205>;
1050 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1051 <&dmac1 0x41>, <&dmac1 0x42>;
1052 dma-names = "tx", "rx", "tx", "rx";
1053 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1054 #address-cells = <1>;
1055 #size-cells = <0>;
1056 resets = <&cpg 205>;
1057 status = "disabled";
1058 };
1059
1060 pwm0: pwm@e6e30000 {
1061 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1062 reg = <0 0xe6e30000 0 0x8>;
1063 clocks = <&cpg CPG_MOD 523>;
1064 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1065 resets = <&cpg 523>;
1066 #pwm-cells = <2>;
1067 status = "disabled";
1068 };
1069
1070 pwm1: pwm@e6e31000 {
1071 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1072 reg = <0 0xe6e31000 0 0x8>;
1073 clocks = <&cpg CPG_MOD 523>;
1074 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1075 resets = <&cpg 523>;
1076 #pwm-cells = <2>;
1077 status = "disabled";
1078 };
1079
1080 pwm2: pwm@e6e32000 {
1081 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1082 reg = <0 0xe6e32000 0 0x8>;
1083 clocks = <&cpg CPG_MOD 523>;
1084 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1085 resets = <&cpg 523>;
1086 #pwm-cells = <2>;
1087 status = "disabled";
1088 };
1089
1090 pwm3: pwm@e6e33000 {
1091 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1092 reg = <0 0xe6e33000 0 0x8>;
1093 clocks = <&cpg CPG_MOD 523>;
1094 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1095 resets = <&cpg 523>;
1096 #pwm-cells = <2>;
1097 status = "disabled";
1098 };
1099
1100 pwm4: pwm@e6e34000 {
1101 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1102 reg = <0 0xe6e34000 0 0x8>;
1103 clocks = <&cpg CPG_MOD 523>;
1104 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1105 resets = <&cpg 523>;
1106 #pwm-cells = <2>;
1107 status = "disabled";
1108 };
1109
1110 pwm5: pwm@e6e35000 {
1111 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1112 reg = <0 0xe6e35000 0 0x8>;
1113 clocks = <&cpg CPG_MOD 523>;
1114 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1115 resets = <&cpg 523>;
1116 #pwm-cells = <2>;
1117 status = "disabled";
1118 };
1119
1120 pwm6: pwm@e6e36000 {
1121 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1122 reg = <0 0xe6e36000 0 0x8>;
1123 clocks = <&cpg CPG_MOD 523>;
1124 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1125 resets = <&cpg 523>;
1126 #pwm-cells = <2>;
1127 status = "disabled";
1128 };
1129
1130 can0: can@e6e80000 {
1131 compatible = "renesas,can-r8a7743",
1132 "renesas,rcar-gen2-can";
1133 reg = <0 0xe6e80000 0 0x1000>;
1134 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1135 clocks = <&cpg CPG_MOD 916>,
1136 <&cpg CPG_CORE R8A7743_CLK_RCAN>,
1137 <&can_clk>;
1138 clock-names = "clkp1", "clkp2", "can_clk";
1139 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1140 resets = <&cpg 916>;
1141 status = "disabled";
1142 };
1143
1144 can1: can@e6e88000 {
1145 compatible = "renesas,can-r8a7743",
1146 "renesas,rcar-gen2-can";
1147 reg = <0 0xe6e88000 0 0x1000>;
1148 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1149 clocks = <&cpg CPG_MOD 915>,
1150 <&cpg CPG_CORE R8A7743_CLK_RCAN>,
1151 <&can_clk>;
1152 clock-names = "clkp1", "clkp2", "can_clk";
1153 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1154 resets = <&cpg 915>;
1155 status = "disabled";
1156 };
1157
1158 vin0: video@e6ef0000 {
1159 compatible = "renesas,vin-r8a7743",
1160 "renesas,rcar-gen2-vin";
1161 reg = <0 0xe6ef0000 0 0x1000>;
1162 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1163 clocks = <&cpg CPG_MOD 811>;
1164 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1165 resets = <&cpg 811>;
1166 status = "disabled";
1167 };
1168
1169 vin1: video@e6ef1000 {
1170 compatible = "renesas,vin-r8a7743",
1171 "renesas,rcar-gen2-vin";
1172 reg = <0 0xe6ef1000 0 0x1000>;
1173 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1174 clocks = <&cpg CPG_MOD 810>;
1175 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1176 resets = <&cpg 810>;
1177 status = "disabled";
1178 };
1179
1180 vin2: video@e6ef2000 {
1181 compatible = "renesas,vin-r8a7743",
1182 "renesas,rcar-gen2-vin";
1183 reg = <0 0xe6ef2000 0 0x1000>;
1184 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1185 clocks = <&cpg CPG_MOD 809>;
1186 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1187 resets = <&cpg 809>;
1188 status = "disabled";
1189 };
1190
1191 rcar_sound: sound@ec500000 {
1192 /*
1193 * #sound-dai-cells is required
1194 *
1195 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1196 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1197 */
1198 compatible = "renesas,rcar_sound-r8a7743",
1199 "renesas,rcar_sound-gen2";
1200 reg = <0 0xec500000 0 0x1000>, /* SCU */
1201 <0 0xec5a0000 0 0x100>, /* ADG */
1202 <0 0xec540000 0 0x1000>, /* SSIU */
1203 <0 0xec541000 0 0x280>, /* SSI */
1204 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1205 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1206
1207 clocks = <&cpg CPG_MOD 1005>,
1208 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1209 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1210 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1211 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1212 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1213 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1214 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1215 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1216 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1217 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1218 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1219 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1220 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1221 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1222 <&cpg CPG_CORE R8A7743_CLK_M2>;
1223 clock-names = "ssi-all",
1224 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1225 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1226 "src.9", "src.8", "src.7", "src.6", "src.5",
1227 "src.4", "src.3", "src.2", "src.1", "src.0",
1228 "ctu.0", "ctu.1",
1229 "mix.0", "mix.1",
1230 "dvc.0", "dvc.1",
1231 "clk_a", "clk_b", "clk_c", "clk_i";
1232 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1233 resets = <&cpg 1005>,
1234 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1235 <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1236 <&cpg 1014>, <&cpg 1015>;
1237 reset-names = "ssi-all",
1238 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1239 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1240 status = "disabled";
1241
1242 rcar_sound,dvc {
1243 dvc0: dvc-0 {
1244 dmas = <&audma1 0xbc>;
1245 dma-names = "tx";
1246 };
1247 dvc1: dvc-1 {
1248 dmas = <&audma1 0xbe>;
1249 dma-names = "tx";
1250 };
1251 };
1252
1253 rcar_sound,mix {
1254 mix0: mix-0 { };
1255 mix1: mix-1 { };
1256 };
1257
1258 rcar_sound,ctu {
1259 ctu00: ctu-0 { };
1260 ctu01: ctu-1 { };
1261 ctu02: ctu-2 { };
1262 ctu03: ctu-3 { };
1263 ctu10: ctu-4 { };
1264 ctu11: ctu-5 { };
1265 ctu12: ctu-6 { };
1266 ctu13: ctu-7 { };
1267 };
1268
1269 rcar_sound,src {
1270 src0: src-0 {
1271 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1272 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1273 dma-names = "rx", "tx";
1274 };
1275 src1: src-1 {
1276 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1277 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1278 dma-names = "rx", "tx";
1279 };
1280 src2: src-2 {
1281 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1282 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1283 dma-names = "rx", "tx";
1284 };
1285 src3: src-3 {
1286 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1287 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1288 dma-names = "rx", "tx";
1289 };
1290 src4: src-4 {
1291 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1292 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1293 dma-names = "rx", "tx";
1294 };
1295 src5: src-5 {
1296 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1297 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1298 dma-names = "rx", "tx";
1299 };
1300 src6: src-6 {
1301 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1302 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1303 dma-names = "rx", "tx";
1304 };
1305 src7: src-7 {
1306 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1307 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1308 dma-names = "rx", "tx";
1309 };
1310 src8: src-8 {
1311 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1312 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1313 dma-names = "rx", "tx";
1314 };
1315 src9: src-9 {
1316 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1317 dmas = <&audma0 0x97>, <&audma1 0xba>;
1318 dma-names = "rx", "tx";
1319 };
1320 };
1321
1322 rcar_sound,ssi {
1323 ssi0: ssi-0 {
1324 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1325 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1326 dma-names = "rx", "tx", "rxu", "txu";
1327 };
1328 ssi1: ssi-1 {
1329 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1330 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1331 dma-names = "rx", "tx", "rxu", "txu";
1332 };
1333 ssi2: ssi-2 {
1334 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1335 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1336 dma-names = "rx", "tx", "rxu", "txu";
1337 };
1338 ssi3: ssi-3 {
1339 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1340 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1341 dma-names = "rx", "tx", "rxu", "txu";
1342 };
1343 ssi4: ssi-4 {
1344 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1345 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1346 dma-names = "rx", "tx", "rxu", "txu";
1347 };
1348 ssi5: ssi-5 {
1349 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1350 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1351 dma-names = "rx", "tx", "rxu", "txu";
1352 };
1353 ssi6: ssi-6 {
1354 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1355 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1356 dma-names = "rx", "tx", "rxu", "txu";
1357 };
1358 ssi7: ssi-7 {
1359 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1360 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1361 dma-names = "rx", "tx", "rxu", "txu";
1362 };
1363 ssi8: ssi-8 {
1364 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1365 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1366 dma-names = "rx", "tx", "rxu", "txu";
1367 };
1368 ssi9: ssi-9 {
1369 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1370 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1371 dma-names = "rx", "tx", "rxu", "txu";
1372 };
1373 };
1374 };
1375
1376 audma0: dma-controller@ec700000 {
1377 compatible = "renesas,dmac-r8a7743",
1378 "renesas,rcar-dmac";
1379 reg = <0 0xec700000 0 0x10000>;
1380 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1381 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1382 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1383 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1384 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1385 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1386 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1387 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1388 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1389 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1390 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1391 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1392 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1393 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1394 interrupt-names = "error",
1395 "ch0", "ch1", "ch2", "ch3",
1396 "ch4", "ch5", "ch6", "ch7",
1397 "ch8", "ch9", "ch10", "ch11",
1398 "ch12";
1399 clocks = <&cpg CPG_MOD 502>;
1400 clock-names = "fck";
1401 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1402 resets = <&cpg 502>;
1403 #dma-cells = <1>;
1404 dma-channels = <13>;
1405 };
1406
1407 audma1: dma-controller@ec720000 {
1408 compatible = "renesas,dmac-r8a7743",
1409 "renesas,rcar-dmac";
1410 reg = <0 0xec720000 0 0x10000>;
1411 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1412 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1413 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1414 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1415 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1416 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1417 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1418 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1419 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1420 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1421 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1422 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1423 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1424 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1425 interrupt-names = "error",
1426 "ch0", "ch1", "ch2", "ch3",
1427 "ch4", "ch5", "ch6", "ch7",
1428 "ch8", "ch9", "ch10", "ch11",
1429 "ch12";
1430 clocks = <&cpg CPG_MOD 501>;
1431 clock-names = "fck";
1432 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1433 resets = <&cpg 501>;
1434 #dma-cells = <1>;
1435 dma-channels = <13>;
1436 };
1437
1438 /*
1439 * pci1 and xhci share the same phy, therefore only one of them
1440 * can be active at any one time. If both of them are enabled,
1441 * a race condition will determine who'll control the phy.
1442 * A firmware file is needed by the xhci driver in order for
1443 * USB 3.0 to work properly.
1444 */
1445 xhci: usb@ee000000 {
1446 compatible = "renesas,xhci-r8a7743",
1447 "renesas,rcar-gen2-xhci";
1448 reg = <0 0xee000000 0 0xc00>;
1449 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1450 clocks = <&cpg CPG_MOD 328>;
1451 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1452 resets = <&cpg 328>;
1453 phys = <&usb2 1>;
1454 phy-names = "usb";
1455 status = "disabled";
1456 };
1457
1458 pci0: pci@ee090000 {
1459 compatible = "renesas,pci-r8a7743",
1460 "renesas,pci-rcar-gen2";
1461 device_type = "pci";
1462 reg = <0 0xee090000 0 0xc00>,
1463 <0 0xee080000 0 0x1100>;
1464 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1465 clocks = <&cpg CPG_MOD 703>;
1466 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1467 resets = <&cpg 703>;
1468 status = "disabled";
1469
1470 bus-range = <0 0>;
1471 #address-cells = <3>;
1472 #size-cells = <2>;
1473 #interrupt-cells = <1>;
1474 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1475 interrupt-map-mask = <0xf800 0 0 0x7>;
1476 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1477 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1478 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1479
1480 usb@1,0 {
1481 reg = <0x800 0 0 0 0>;
1482 phys = <&usb0 0>;
1483 phy-names = "usb";
1484 };
1485
1486 usb@2,0 {
1487 reg = <0x1000 0 0 0 0>;
1488 phys = <&usb0 0>;
1489 phy-names = "usb";
1490 };
1491 };
1492
1493 pci1: pci@ee0d0000 {
1494 compatible = "renesas,pci-r8a7743",
1495 "renesas,pci-rcar-gen2";
1496 device_type = "pci";
1497 reg = <0 0xee0d0000 0 0xc00>,
1498 <0 0xee0c0000 0 0x1100>;
1499 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1500 clocks = <&cpg CPG_MOD 703>;
1501 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1502 resets = <&cpg 703>;
1503 status = "disabled";
1504
1505 bus-range = <1 1>;
1506 #address-cells = <3>;
1507 #size-cells = <2>;
1508 #interrupt-cells = <1>;
1509 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1510 interrupt-map-mask = <0xf800 0 0 0x7>;
1511 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1512 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1513 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1514
1515 usb@1,0 {
1516 reg = <0x10800 0 0 0 0>;
1517 phys = <&usb2 0>;
1518 phy-names = "usb";
1519 };
1520
1521 usb@2,0 {
1522 reg = <0x11000 0 0 0 0>;
1523 phys = <&usb2 0>;
1524 phy-names = "usb";
1525 };
1526 };
1527
1528 sdhi0: mmc@ee100000 {
1529 compatible = "renesas,sdhi-r8a7743",
1530 "renesas,rcar-gen2-sdhi";
1531 reg = <0 0xee100000 0 0x328>;
1532 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1533 clocks = <&cpg CPG_MOD 314>;
1534 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1535 <&dmac1 0xcd>, <&dmac1 0xce>;
1536 dma-names = "tx", "rx", "tx", "rx";
1537 max-frequency = <195000000>;
1538 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1539 resets = <&cpg 314>;
1540 status = "disabled";
1541 };
1542
1543 sdhi1: mmc@ee140000 {
1544 compatible = "renesas,sdhi-r8a7743",
1545 "renesas,rcar-gen2-sdhi";
1546 reg = <0 0xee140000 0 0x100>;
1547 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1548 clocks = <&cpg CPG_MOD 312>;
1549 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1550 <&dmac1 0xc1>, <&dmac1 0xc2>;
1551 dma-names = "tx", "rx", "tx", "rx";
1552 max-frequency = <97500000>;
1553 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1554 resets = <&cpg 312>;
1555 status = "disabled";
1556 };
1557
1558 sdhi2: mmc@ee160000 {
1559 compatible = "renesas,sdhi-r8a7743",
1560 "renesas,rcar-gen2-sdhi";
1561 reg = <0 0xee160000 0 0x100>;
1562 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1563 clocks = <&cpg CPG_MOD 311>;
1564 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1565 <&dmac1 0xd3>, <&dmac1 0xd4>;
1566 dma-names = "tx", "rx", "tx", "rx";
1567 max-frequency = <97500000>;
1568 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1569 resets = <&cpg 311>;
1570 status = "disabled";
1571 };
1572
1573 mmcif0: mmc@ee200000 {
1574 compatible = "renesas,mmcif-r8a7743",
1575 "renesas,sh-mmcif";
1576 reg = <0 0xee200000 0 0x80>;
1577 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1578 clocks = <&cpg CPG_MOD 315>;
1579 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1580 <&dmac1 0xd1>, <&dmac1 0xd2>;
1581 dma-names = "tx", "rx", "tx", "rx";
1582 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1583 resets = <&cpg 315>;
1584 reg-io-width = <4>;
1585 max-frequency = <97500000>;
1586 status = "disabled";
1587 };
1588
1589 ether: ethernet@ee700000 {
1590 compatible = "renesas,ether-r8a7743",
1591 "renesas,rcar-gen2-ether";
1592 reg = <0 0xee700000 0 0x400>;
1593 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1594 clocks = <&cpg CPG_MOD 813>;
1595 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1596 resets = <&cpg 813>;
1597 phy-mode = "rmii";
1598 #address-cells = <1>;
1599 #size-cells = <0>;
1600 status = "disabled";
1601 };
1602
1603 gic: interrupt-controller@f1001000 {
1604 compatible = "arm,gic-400";
1605 #interrupt-cells = <3>;
1606 #address-cells = <0>;
1607 interrupt-controller;
1608 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1609 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1610 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1611 clocks = <&cpg CPG_MOD 408>;
1612 clock-names = "clk";
1613 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1614 resets = <&cpg 408>;
1615 };
1616
1617 pciec: pcie@fe000000 {
1618 compatible = "renesas,pcie-r8a7743",
1619 "renesas,pcie-rcar-gen2";
1620 reg = <0 0xfe000000 0 0x80000>;
1621 #address-cells = <3>;
1622 #size-cells = <2>;
1623 bus-range = <0x00 0xff>;
1624 device_type = "pci";
1625 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1626 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1627 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1628 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1629 /* Map all possible DDR as inbound ranges */
1630 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
1631 <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1632 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1633 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1634 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1635 #interrupt-cells = <1>;
1636 interrupt-map-mask = <0 0 0 0>;
1637 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1638 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1639 clock-names = "pcie", "pcie_bus";
1640 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1641 resets = <&cpg 319>;
1642 status = "disabled";
1643 };
1644
1645 vsp@fe928000 {
1646 compatible = "renesas,vsp1";
1647 reg = <0 0xfe928000 0 0x8000>;
1648 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1649 clocks = <&cpg CPG_MOD 131>;
1650 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1651 resets = <&cpg 131>;
1652 };
1653
1654 vsp@fe930000 {
1655 compatible = "renesas,vsp1";
1656 reg = <0 0xfe930000 0 0x8000>;
1657 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1658 clocks = <&cpg CPG_MOD 128>;
1659 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1660 resets = <&cpg 128>;
1661 };
1662
1663 vsp@fe938000 {
1664 compatible = "renesas,vsp1";
1665 reg = <0 0xfe938000 0 0x8000>;
1666 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1667 clocks = <&cpg CPG_MOD 127>;
1668 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1669 resets = <&cpg 127>;
1670 };
1671
1672 du: display@feb00000 {
1673 compatible = "renesas,du-r8a7743";
1674 reg = <0 0xfeb00000 0 0x40000>;
1675 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1676 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1677 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1678 clock-names = "du.0", "du.1";
1679 resets = <&cpg 724>;
1680 reset-names = "du.0";
1681 status = "disabled";
1682
1683 ports {
1684 #address-cells = <1>;
1685 #size-cells = <0>;
1686
1687 port@0 {
1688 reg = <0>;
1689 du_out_rgb: endpoint {
1690 };
1691 };
1692 port@1 {
1693 reg = <1>;
1694 du_out_lvds0: endpoint {
1695 remote-endpoint = <&lvds0_in>;
1696 };
1697 };
1698 };
1699 };
1700
1701 lvds0: lvds@feb90000 {
1702 compatible = "renesas,r8a7743-lvds";
1703 reg = <0 0xfeb90000 0 0x1c>;
1704 clocks = <&cpg CPG_MOD 726>;
1705 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1706 resets = <&cpg 726>;
1707 status = "disabled";
1708
1709 ports {
1710 #address-cells = <1>;
1711 #size-cells = <0>;
1712
1713 port@0 {
1714 reg = <0>;
1715 lvds0_in: endpoint {
1716 remote-endpoint = <&du_out_lvds0>;
1717 };
1718 };
1719 port@1 {
1720 reg = <1>;
1721 lvds0_out: endpoint {
1722 };
1723 };
1724 };
1725 };
1726
1727 prr: chipid@ff000044 {
1728 compatible = "renesas,prr";
1729 reg = <0 0xff000044 0 4>;
1730 };
1731
1732 cmt0: timer@ffca0000 {
1733 compatible = "renesas,r8a7743-cmt0",
1734 "renesas,rcar-gen2-cmt0";
1735 reg = <0 0xffca0000 0 0x1004>;
1736 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1737 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1738 clocks = <&cpg CPG_MOD 124>;
1739 clock-names = "fck";
1740 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1741 resets = <&cpg 124>;
1742 status = "disabled";
1743 };
1744
1745 cmt1: timer@e6130000 {
1746 compatible = "renesas,r8a7743-cmt1",
1747 "renesas,rcar-gen2-cmt1";
1748 reg = <0 0xe6130000 0 0x1004>;
1749 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1750 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1751 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1752 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1753 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1754 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1755 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1756 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1757 clocks = <&cpg CPG_MOD 329>;
1758 clock-names = "fck";
1759 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1760 resets = <&cpg 329>;
1761 status = "disabled";
1762 };
1763 };
1764
1765 thermal-zones {
1766 cpu_thermal: cpu-thermal {
1767 polling-delay-passive = <0>;
1768 polling-delay = <0>;
1769
1770 thermal-sensors = <&thermal>;
1771
1772 trips {
1773 cpu-crit {
1774 temperature = <95000>;
1775 hysteresis = <0>;
1776 type = "critical";
1777 };
1778 };
1779
1780 cooling-maps {
1781 };
1782 };
1783 };
1784
1785 timer {
1786 compatible = "arm,armv7-timer";
1787 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1788 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1789 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1790 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1791 };
1792
1793 /* External USB clock - can be overridden by the board */
1794 usb_extal_clk: usb_extal {
1795 compatible = "fixed-clock";
1796 #clock-cells = <0>;
1797 clock-frequency = <48000000>;
1798 };
1799 };
